codecs/cs35l34.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * cs35l34.c -- CS35l34 ALSA SoC audio driver
   4  *
   5  * Copyright 2016 Cirrus Logic, Inc.
   6  *
   7  * Author: Paul Handrigan <Paul.Handrigan@cirrus.com>
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/moduleparam.h>
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/delay.h>
  15 #include <linux/i2c.h>
  16 #include <linux/slab.h>
  17 #include <linux/workqueue.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regulator/consumer.h>
  20 #include <linux/regulator/machine.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/of_device.h>
  23 #include <linux/of_irq.h>
  24 #include <sound/core.h>
  25 #include <sound/pcm.h>
  26 #include <sound/pcm_params.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dapm.h>
  29 #include <linux/gpio/consumer.h>
  30 #include <sound/initval.h>
  31 #include <sound/tlv.h>
  32 #include <sound/cs35l34.h>
  33
  34 #include "cs35l34.h"
  35 #include "cirrus_legacy.h"
  36
  37 #define PDN_DONE_ATTEMPTS 10
  38 #define CS35L34_START_DELAY 50
  39
  40 struct  cs35l34_private {
  41         struct snd_soc_component *component;
  42         struct cs35l34_platform_data pdata;
  43         struct regmap *regmap;
  44         struct regulator_bulk_data core_supplies[2];
  45         int num_core_supplies;
  46         int mclk_int;
  47         bool tdm_mode;
  48         struct gpio_desc *reset_gpio;   /* Active-low reset GPIO */
  49 };
  50
  51 static const struct reg_default cs35l34_reg[] = {
  52         {CS35L34_PWRCTL1, 0x01},
  53         {CS35L34_PWRCTL2, 0x19},
  54         {CS35L34_PWRCTL3, 0x01},
  55         {CS35L34_ADSP_CLK_CTL, 0x08},
  56         {CS35L34_MCLK_CTL, 0x11},
  57         {CS35L34_AMP_INP_DRV_CTL, 0x01},
  58         {CS35L34_AMP_DIG_VOL_CTL, 0x12},
  59         {CS35L34_AMP_DIG_VOL, 0x00},
  60         {CS35L34_AMP_ANLG_GAIN_CTL, 0x0F},
  61         {CS35L34_PROTECT_CTL, 0x06},
  62         {CS35L34_AMP_KEEP_ALIVE_CTL, 0x04},
  63         {CS35L34_BST_CVTR_V_CTL, 0x00},
  64         {CS35L34_BST_PEAK_I, 0x10},
  65         {CS35L34_BST_RAMP_CTL, 0x87},
  66         {CS35L34_BST_CONV_COEF_1, 0x24},
  67         {CS35L34_BST_CONV_COEF_2, 0x24},
  68         {CS35L34_BST_CONV_SLOPE_COMP, 0x4E},
  69         {CS35L34_BST_CONV_SW_FREQ, 0x08},
  70         {CS35L34_CLASS_H_CTL, 0x0D},
  71         {CS35L34_CLASS_H_HEADRM_CTL, 0x0D},
  72         {CS35L34_CLASS_H_RELEASE_RATE, 0x08},
  73         {CS35L34_CLASS_H_FET_DRIVE_CTL, 0x41},
  74         {CS35L34_CLASS_H_STATUS, 0x05},
  75         {CS35L34_VPBR_CTL, 0x0A},
  76         {CS35L34_VPBR_VOL_CTL, 0x90},
  77         {CS35L34_VPBR_TIMING_CTL, 0x6A},
  78         {CS35L34_PRED_MAX_ATTEN_SPK_LOAD, 0x95},
  79         {CS35L34_PRED_BROWNOUT_THRESH, 0x1C},
  80         {CS35L34_PRED_BROWNOUT_VOL_CTL, 0x00},
  81         {CS35L34_PRED_BROWNOUT_RATE_CTL, 0x10},
  82         {CS35L34_PRED_WAIT_CTL, 0x10},
  83         {CS35L34_PRED_ZVP_INIT_IMP_CTL, 0x08},
  84         {CS35L34_PRED_MAN_SAFE_VPI_CTL, 0x80},
  85         {CS35L34_VPBR_ATTEN_STATUS, 0x00},
  86         {CS35L34_PRED_BRWNOUT_ATT_STATUS, 0x00},
  87         {CS35L34_SPKR_MON_CTL, 0xC6},
  88         {CS35L34_ADSP_I2S_CTL, 0x00},
  89         {CS35L34_ADSP_TDM_CTL, 0x00},
  90         {CS35L34_TDM_TX_CTL_1_VMON, 0x00},
  91         {CS35L34_TDM_TX_CTL_2_IMON, 0x04},
  92         {CS35L34_TDM_TX_CTL_3_VPMON, 0x03},
  93         {CS35L34_TDM_TX_CTL_4_VBSTMON, 0x07},
  94         {CS35L34_TDM_TX_CTL_5_FLAG1, 0x08},
  95         {CS35L34_TDM_TX_CTL_6_FLAG2, 0x09},
  96         {CS35L34_TDM_TX_SLOT_EN_1, 0x00},
  97         {CS35L34_TDM_TX_SLOT_EN_2, 0x00},
  98         {CS35L34_TDM_TX_SLOT_EN_3, 0x00},
  99         {CS35L34_TDM_TX_SLOT_EN_4, 0x00},
 100         {CS35L34_TDM_RX_CTL_1_AUDIN, 0x40},
 101         {CS35L34_TDM_RX_CTL_3_ALIVE, 0x04},
 102         {CS35L34_MULT_DEV_SYNCH1, 0x00},
 103         {CS35L34_MULT_DEV_SYNCH2, 0x80},
 104         {CS35L34_PROT_RELEASE_CTL, 0x00},
 105         {CS35L34_DIAG_MODE_REG_LOCK, 0x00},
 106         {CS35L34_DIAG_MODE_CTL_1, 0x00},
 107         {CS35L34_DIAG_MODE_CTL_2, 0x00},
 108         {CS35L34_INT_MASK_1, 0xFF},
 109         {CS35L34_INT_MASK_2, 0xFF},
 110         {CS35L34_INT_MASK_3, 0xFF},
 111         {CS35L34_INT_MASK_4, 0xFF},
 112         {CS35L34_INT_STATUS_1, 0x30},
 113         {CS35L34_INT_STATUS_2, 0x05},
 114         {CS35L34_INT_STATUS_3, 0x00},
 115         {CS35L34_INT_STATUS_4, 0x00},
 116         {CS35L34_OTP_TRIM_STATUS, 0x00},
 117 };
 118
 119 static bool cs35l34_volatile_register(struct device *dev, unsigned int reg)
 120 {
 121         switch (reg) {
 122         case CS35L34_DEVID_AB:
 123         case CS35L34_DEVID_CD:
 124         case CS35L34_DEVID_E:
 125         case CS35L34_FAB_ID:
 126         case CS35L34_REV_ID:
 127         case CS35L34_INT_STATUS_1:
 128         case CS35L34_INT_STATUS_2:
 129         case CS35L34_INT_STATUS_3:
 130         case CS35L34_INT_STATUS_4:
 131         case CS35L34_CLASS_H_STATUS:
 132         case CS35L34_VPBR_ATTEN_STATUS:
 133         case CS35L34_OTP_TRIM_STATUS:
 134                 return true;
 135         default:
 136                 return false;
 137         }
 138 }
 139
 140 static bool cs35l34_readable_register(struct device *dev, unsigned int reg)
 141 {
 142         switch (reg) {
 143         case    CS35L34_DEVID_AB:
 144         case    CS35L34_DEVID_CD:
 145         case    CS35L34_DEVID_E:
 146         case    CS35L34_FAB_ID:
 147         case    CS35L34_REV_ID:
 148         case    CS35L34_PWRCTL1:
 149         case    CS35L34_PWRCTL2:
 150         case    CS35L34_PWRCTL3:
 151         case    CS35L34_ADSP_CLK_CTL:
 152         case    CS35L34_MCLK_CTL:
 153         case    CS35L34_AMP_INP_DRV_CTL:
 154         case    CS35L34_AMP_DIG_VOL_CTL:
 155         case    CS35L34_AMP_DIG_VOL:
 156         case    CS35L34_AMP_ANLG_GAIN_CTL:
 157         case    CS35L34_PROTECT_CTL:
 158         case    CS35L34_AMP_KEEP_ALIVE_CTL:
 159         case    CS35L34_BST_CVTR_V_CTL:
 160         case    CS35L34_BST_PEAK_I:
 161         case    CS35L34_BST_RAMP_CTL:
 162         case    CS35L34_BST_CONV_COEF_1:
 163         case    CS35L34_BST_CONV_COEF_2:
 164         case    CS35L34_BST_CONV_SLOPE_COMP:
 165         case    CS35L34_BST_CONV_SW_FREQ:
 166         case    CS35L34_CLASS_H_CTL:
 167         case    CS35L34_CLASS_H_HEADRM_CTL:
 168         case    CS35L34_CLASS_H_RELEASE_RATE:
 169         case    CS35L34_CLASS_H_FET_DRIVE_CTL:
 170         case    CS35L34_CLASS_H_STATUS:
 171         case    CS35L34_VPBR_CTL:
 172         case    CS35L34_VPBR_VOL_CTL:
 173         case    CS35L34_VPBR_TIMING_CTL:
 174         case    CS35L34_PRED_MAX_ATTEN_SPK_LOAD:
 175         case    CS35L34_PRED_BROWNOUT_THRESH:
 176         case    CS35L34_PRED_BROWNOUT_VOL_CTL:
 177         case    CS35L34_PRED_BROWNOUT_RATE_CTL:
 178         case    CS35L34_PRED_WAIT_CTL:
 179         case    CS35L34_PRED_ZVP_INIT_IMP_CTL:
 180         case    CS35L34_PRED_MAN_SAFE_VPI_CTL:
 181         case    CS35L34_VPBR_ATTEN_STATUS:
 182         case    CS35L34_PRED_BRWNOUT_ATT_STATUS:
 183         case    CS35L34_SPKR_MON_CTL:
 184         case    CS35L34_ADSP_I2S_CTL:
 185         case    CS35L34_ADSP_TDM_CTL:
 186         case    CS35L34_TDM_TX_CTL_1_VMON:
 187         case    CS35L34_TDM_TX_CTL_2_IMON:
 188         case    CS35L34_TDM_TX_CTL_3_VPMON:
 189         case    CS35L34_TDM_TX_CTL_4_VBSTMON:
 190         case    CS35L34_TDM_TX_CTL_5_FLAG1:
 191         case    CS35L34_TDM_TX_CTL_6_FLAG2:
 192         case    CS35L34_TDM_TX_SLOT_EN_1:
 193         case    CS35L34_TDM_TX_SLOT_EN_2:
 194         case    CS35L34_TDM_TX_SLOT_EN_3:
 195         case    CS35L34_TDM_TX_SLOT_EN_4:
 196         case    CS35L34_TDM_RX_CTL_1_AUDIN:
 197         case    CS35L34_TDM_RX_CTL_3_ALIVE:
 198         case    CS35L34_MULT_DEV_SYNCH1:
 199         case    CS35L34_MULT_DEV_SYNCH2:
 200         case    CS35L34_PROT_RELEASE_CTL:
 201         case    CS35L34_DIAG_MODE_REG_LOCK:
 202         case    CS35L34_DIAG_MODE_CTL_1:
 203         case    CS35L34_DIAG_MODE_CTL_2:
 204         case    CS35L34_INT_MASK_1:
 205         case    CS35L34_INT_MASK_2:
 206         case    CS35L34_INT_MASK_3:
 207         case    CS35L34_INT_MASK_4:
 208         case    CS35L34_INT_STATUS_1:
 209         case    CS35L34_INT_STATUS_2:
 210         case    CS35L34_INT_STATUS_3:
 211         case    CS35L34_INT_STATUS_4:
 212         case    CS35L34_OTP_TRIM_STATUS:
 213                 return true;
 214         default:
 215                 return false;
 216         }
 217 }
 218
 219 static bool cs35l34_precious_register(struct device *dev, unsigned int reg)
 220 {
 221         switch (reg) {
 222         case CS35L34_INT_STATUS_1:
 223         case CS35L34_INT_STATUS_2:
 224         case CS35L34_INT_STATUS_3:
 225         case CS35L34_INT_STATUS_4:
 226                 return true;
 227         default:
 228                 return false;
 229         }
 230 }
 231
 232 static int cs35l34_sdin_event(struct snd_soc_dapm_widget *w,
 233                 struct snd_kcontrol *kcontrol, int event)
 234 {
 235         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 236         struct cs35l34_private *priv = snd_soc_component_get_drvdata(component);
 237         int ret;
 238
 239         switch (event) {
 240         case SND_SOC_DAPM_PRE_PMU:
 241                 if (priv->tdm_mode)
 242                         regmap_update_bits(priv->regmap, CS35L34_PWRCTL3,
 243                                                 CS35L34_PDN_TDM, 0x00);
 244
 245                 ret = regmap_update_bits(priv->regmap, CS35L34_PWRCTL1,
 246                                                 CS35L34_PDN_ALL, 0);
 247                 if (ret < 0) {
 248                         dev_err(component->dev, "Cannot set Power bits %d\n", ret);
 249                         return ret;
 250                 }
 251                 usleep_range(5000, 5100);
 252         break;
 253         case SND_SOC_DAPM_POST_PMD:
 254                 if (priv->tdm_mode) {
 255                         regmap_update_bits(priv->regmap, CS35L34_PWRCTL3,
 256                                         CS35L34_PDN_TDM, CS35L34_PDN_TDM);
 257                 }
 258                 ret = regmap_update_bits(priv->regmap, CS35L34_PWRCTL1,
 259                                         CS35L34_PDN_ALL, CS35L34_PDN_ALL);
 260         break;
 261         default:
 262                 pr_err("Invalid event = 0x%x\n", event);
 263         }
 264         return 0;
 265 }
 266
 267 static int cs35l34_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
 268                                 unsigned int rx_mask, int slots, int slot_width)
 269 {
 270         struct snd_soc_component *component = dai->component;
 271         struct cs35l34_private *priv = snd_soc_component_get_drvdata(component);
 272         unsigned int reg, bit_pos;
 273         int slot, slot_num;
 274
 275         if (slot_width != 8)
 276                 return -EINVAL;
 277
 278         priv->tdm_mode = true;
 279         /* scan rx_mask for aud slot */
 280         slot = ffs(rx_mask) - 1;
 281         if (slot >= 0)
 282                 snd_soc_component_update_bits(component, CS35L34_TDM_RX_CTL_1_AUDIN,
 283                                         CS35L34_X_LOC, slot);
 284
 285         /* scan tx_mask: vmon(2 slots); imon (2 slots); vpmon (1 slot)
 286          * vbstmon (1 slot)
 287          */
 288         slot = ffs(tx_mask) - 1;
 289         slot_num = 0;
 290
 291         /* disable vpmon/vbstmon: enable later if set in tx_mask */
 292         snd_soc_component_update_bits(component, CS35L34_TDM_TX_CTL_3_VPMON,
 293                                 CS35L34_X_STATE | CS35L34_X_LOC,
 294                                 CS35L34_X_STATE | CS35L34_X_LOC);
 295         snd_soc_component_update_bits(component, CS35L34_TDM_TX_CTL_4_VBSTMON,
 296                                 CS35L34_X_STATE | CS35L34_X_LOC,
 297                                 CS35L34_X_STATE | CS35L34_X_LOC);
 298
 299         /* disconnect {vp,vbst}_mon routes: eanble later if set in tx_mask*/
 300         while (slot >= 0) {
 301                 /* configure VMON_TX_LOC */
 302                 if (slot_num == 0)
 303                         snd_soc_component_update_bits(component, CS35L34_TDM_TX_CTL_1_VMON,
 304                                         CS35L34_X_STATE | CS35L34_X_LOC, slot);
 305
 306                 /* configure IMON_TX_LOC */
 307                 if (slot_num == 4) {
 308                         snd_soc_component_update_bits(component, CS35L34_TDM_TX_CTL_2_IMON,
 309                                         CS35L34_X_STATE | CS35L34_X_LOC, slot);
 310                 }
 311                 /* configure VPMON_TX_LOC */
 312                 if (slot_num == 3) {
 313                         snd_soc_component_update_bits(component, CS35L34_TDM_TX_CTL_3_VPMON,
 314                                         CS35L34_X_STATE | CS35L34_X_LOC, slot);
 315                 }
 316                 /* configure VBSTMON_TX_LOC */
 317                 if (slot_num == 7) {
 318                         snd_soc_component_update_bits(component,
 319                                 CS35L34_TDM_TX_CTL_4_VBSTMON,
 320                                 CS35L34_X_STATE | CS35L34_X_LOC, slot);
 321                 }
 322
 323                 /* Enable the relevant tx slot */
 324                 reg = CS35L34_TDM_TX_SLOT_EN_4 - (slot/8);
 325                 bit_pos = slot - ((slot / 8) * (8));
 326                 snd_soc_component_update_bits(component, reg,
 327                         1 << bit_pos, 1 << bit_pos);
 328
 329                 tx_mask &= ~(1 << slot);
 330                 slot = ffs(tx_mask) - 1;
 331                 slot_num++;
 332         }
 333
 334         return 0;
 335 }
 336
 337 static int cs35l34_main_amp_event(struct snd_soc_dapm_widget *w,
 338                 struct snd_kcontrol *kcontrol, int event)
 339 {
 340         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 341         struct cs35l34_private *priv = snd_soc_component_get_drvdata(component);
 342
 343         switch (event) {
 344         case SND_SOC_DAPM_POST_PMU:
 345                 regmap_update_bits(priv->regmap, CS35L34_BST_CVTR_V_CTL,
 346                                 CS35L34_BST_CVTL_MASK, priv->pdata.boost_vtge);
 347                 usleep_range(5000, 5100);
 348                 regmap_update_bits(priv->regmap, CS35L34_PROTECT_CTL,
 349                                                 CS35L34_MUTE, 0);
 350                 break;
 351         case SND_SOC_DAPM_POST_PMD:
 352                 regmap_update_bits(priv->regmap, CS35L34_BST_CVTR_V_CTL,
 353                         CS35L34_BST_CVTL_MASK, 0);
 354                 regmap_update_bits(priv->regmap, CS35L34_PROTECT_CTL,
 355                         CS35L34_MUTE, CS35L34_MUTE);
 356                 usleep_range(5000, 5100);
 357                 break;
 358         default:
 359                 pr_err("Invalid event = 0x%x\n", event);
 360         }
 361         return 0;
 362 }
 363
 364 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0);
 365
 366 static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 300, 100, 0);
 367
 368
 369 static const struct snd_kcontrol_new cs35l34_snd_controls[] = {
 370         SOC_SINGLE_SX_TLV("Digital Volume", CS35L34_AMP_DIG_VOL,
 371                       0, 0x34, 0xE4, dig_vol_tlv),
 372         SOC_SINGLE_TLV("Amp Gain Volume", CS35L34_AMP_ANLG_GAIN_CTL,
 373                       0, 0xF, 0, amp_gain_tlv),
 374 };
 375
 376
 377 static int cs35l34_mclk_event(struct snd_soc_dapm_widget *w,
 378                 struct snd_kcontrol *kcontrol, int event)
 379 {
 380         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 381         struct cs35l34_private *priv = snd_soc_component_get_drvdata(component);
 382         int ret, i;
 383         unsigned int reg;
 384
 385         switch (event) {
 386         case SND_SOC_DAPM_PRE_PMD:
 387                 ret = regmap_read(priv->regmap, CS35L34_AMP_DIG_VOL_CTL,
 388                         &reg);
 389                 if (ret != 0) {
 390                         pr_err("%s regmap read failure %d\n", __func__, ret);
 391                         return ret;
 392                 }
 393                 if (reg & CS35L34_AMP_DIGSFT)
 394                         msleep(40);
 395                 else
 396                         usleep_range(2000, 2100);
 397
 398                 for (i = 0; i < PDN_DONE_ATTEMPTS; i++) {
 399                         ret = regmap_read(priv->regmap, CS35L34_INT_STATUS_2,
 400                                 &reg);
 401                         if (ret != 0) {
 402                                 pr_err("%s regmap read failure %d\n",
 403                                         __func__, ret);
 404                                 return ret;
 405                         }
 406                         if (reg & CS35L34_PDN_DONE)
 407                                 break;
 408
 409                         usleep_range(5000, 5100);
 410                 }
 411                 if (i == PDN_DONE_ATTEMPTS)
 412                         pr_err("%s Device did not power down properly\n",
 413                                 __func__);
 414                 break;
 415         default:
 416                 pr_err("Invalid event = 0x%x\n", event);
 417                 break;
 418         }
 419         return 0;
 420 }
 421
 422 static const struct snd_soc_dapm_widget cs35l34_dapm_widgets[] = {
 423         SND_SOC_DAPM_AIF_IN_E("SDIN", NULL, 0, CS35L34_PWRCTL3,
 424                                         1, 1, cs35l34_sdin_event,
 425                                         SND_SOC_DAPM_PRE_PMU |
 426                                         SND_SOC_DAPM_POST_PMD),
 427         SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L34_PWRCTL3, 2, 1),
 428
 429         SND_SOC_DAPM_SUPPLY("EXTCLK", CS35L34_PWRCTL3, 7, 1,
 430                 cs35l34_mclk_event, SND_SOC_DAPM_PRE_PMD),
 431
 432         SND_SOC_DAPM_OUTPUT("SPK"),
 433
 434         SND_SOC_DAPM_INPUT("VP"),
 435         SND_SOC_DAPM_INPUT("VPST"),
 436         SND_SOC_DAPM_INPUT("ISENSE"),
 437         SND_SOC_DAPM_INPUT("VSENSE"),
 438
 439         SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L34_PWRCTL2, 7, 1),
 440         SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L34_PWRCTL2, 6, 1),
 441         SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L34_PWRCTL3, 3, 1),
 442         SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L34_PWRCTL3, 4, 1),
 443         SND_SOC_DAPM_ADC("CLASS H", NULL, CS35L34_PWRCTL2, 5, 1),
 444         SND_SOC_DAPM_ADC("BOOST", NULL, CS35L34_PWRCTL2, 2, 1),
 445
 446         SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L34_PWRCTL2, 0, 1, NULL, 0,
 447                 cs35l34_main_amp_event, SND_SOC_DAPM_POST_PMU |
 448                         SND_SOC_DAPM_POST_PMD),
 449 };
 450
 451 static const struct snd_soc_dapm_route cs35l34_audio_map[] = {
 452         {"SDIN", NULL, "AMP Playback"},
 453         {"BOOST", NULL, "SDIN"},
 454         {"CLASS H", NULL, "BOOST"},
 455         {"Main AMP", NULL, "CLASS H"},
 456         {"SPK", NULL, "Main AMP"},
 457
 458         {"VPMON ADC", NULL, "CLASS H"},
 459         {"VBSTMON ADC", NULL, "CLASS H"},
 460         {"SPK", NULL, "VPMON ADC"},
 461         {"SPK", NULL, "VBSTMON ADC"},
 462
 463         {"IMON ADC", NULL, "ISENSE"},
 464         {"VMON ADC", NULL, "VSENSE"},
 465         {"SDOUT", NULL, "IMON ADC"},
 466         {"SDOUT", NULL, "VMON ADC"},
 467         {"AMP Capture", NULL, "SDOUT"},
 468
 469         {"SDIN", NULL, "EXTCLK"},
 470         {"SDOUT", NULL, "EXTCLK"},
 471 };
 472
 473 struct cs35l34_mclk_div {
 474         int mclk;
 475         int srate;
 476         u8 adsp_rate;
 477 };
 478
 479 static struct cs35l34_mclk_div cs35l34_mclk_coeffs[] = {
 480
 481         /* MCLK, Sample Rate, adsp_rate */
 482
 483         {5644800, 11025, 0x1},
 484         {5644800, 22050, 0x4},
 485         {5644800, 44100, 0x7},
 486
 487         {6000000,  8000, 0x0},
 488         {6000000, 11025, 0x1},
 489         {6000000, 12000, 0x2},
 490         {6000000, 16000, 0x3},
 491         {6000000, 22050, 0x4},
 492         {6000000, 24000, 0x5},
 493         {6000000, 32000, 0x6},
 494         {6000000, 44100, 0x7},
 495         {6000000, 48000, 0x8},
 496
 497         {6144000,  8000, 0x0},
 498         {6144000, 11025, 0x1},
 499         {6144000, 12000, 0x2},
 500         {6144000, 16000, 0x3},
 501         {6144000, 22050, 0x4},
 502         {6144000, 24000, 0x5},
 503         {6144000, 32000, 0x6},
 504         {6144000, 44100, 0x7},
 505         {6144000, 48000, 0x8},
 506 };
 507
 508 static int cs35l34_get_mclk_coeff(int mclk, int srate)
 509 {
 510         int i;
 511
 512         for (i = 0; i < ARRAY_SIZE(cs35l34_mclk_coeffs); i++) {
 513                 if (cs35l34_mclk_coeffs[i].mclk == mclk &&
 514                         cs35l34_mclk_coeffs[i].srate == srate)
 515                         return i;
 516         }
 517         return -EINVAL;
 518 }
 519
 520 static int cs35l34_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
 521 {
 522         struct snd_soc_component *component = codec_dai->component;
 523         struct cs35l34_private *priv = snd_soc_component_get_drvdata(component);
 524
 525         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 526         case SND_SOC_DAIFMT_CBM_CFM:
 527                 regmap_update_bits(priv->regmap, CS35L34_ADSP_CLK_CTL,
 528                                     0x80, 0x80);
 529                 break;
 530         case SND_SOC_DAIFMT_CBS_CFS:
 531                 regmap_update_bits(priv->regmap, CS35L34_ADSP_CLK_CTL,
 532                                     0x80, 0x00);
 533                 break;
 534         default:
 535                 return -EINVAL;
 536         }
 537         return 0;
 538 }
 539
 540 static int cs35l34_pcm_hw_params(struct snd_pcm_substream *substream,
 541                                  struct snd_pcm_hw_params *params,
 542                                  struct snd_soc_dai *dai)
 543 {
 544         struct snd_soc_component *component = dai->component;
 545         struct cs35l34_private *priv = snd_soc_component_get_drvdata(component);
 546         int srate = params_rate(params);
 547         int ret;
 548
 549         int coeff = cs35l34_get_mclk_coeff(priv->mclk_int, srate);
 550
 551         if (coeff < 0) {
 552                 dev_err(component->dev, "ERROR: Invalid mclk %d and/or srate %d\n",
 553                         priv->mclk_int, srate);
 554                 return coeff;
 555         }
 556
 557         ret = regmap_update_bits(priv->regmap, CS35L34_ADSP_CLK_CTL,
 558                 CS35L34_ADSP_RATE, cs35l34_mclk_coeffs[coeff].adsp_rate);
 559         if (ret != 0)
 560                 dev_err(component->dev, "Failed to set clock state %d\n", ret);
 561
 562         return ret;
 563 }
 564
 565 static const unsigned int cs35l34_src_rates[] = {
 566         8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000
 567 };
 568
 569
 570 static const struct snd_pcm_hw_constraint_list cs35l34_constraints = {
 571         .count  = ARRAY_SIZE(cs35l34_src_rates),
 572         .list   = cs35l34_src_rates,
 573 };
 574
 575 static int cs35l34_pcm_startup(struct snd_pcm_substream *substream,
 576                                struct snd_soc_dai *dai)
 577 {
 578
 579         snd_pcm_hw_constraint_list(substream->runtime, 0,
 580                                 SNDRV_PCM_HW_PARAM_RATE, &cs35l34_constraints);
 581         return 0;
 582 }
 583
 584
 585 static int cs35l34_set_tristate(struct snd_soc_dai *dai, int tristate)
 586 {
 587
 588         struct snd_soc_component *component = dai->component;
 589
 590         if (tristate)
 591                 snd_soc_component_update_bits(component, CS35L34_PWRCTL3,
 592                                         CS35L34_PDN_SDOUT, CS35L34_PDN_SDOUT);
 593         else
 594                 snd_soc_component_update_bits(component, CS35L34_PWRCTL3,
 595                                         CS35L34_PDN_SDOUT, 0);
 596         return 0;
 597 }
 598
 599 static int cs35l34_dai_set_sysclk(struct snd_soc_dai *dai,
 600                                 int clk_id, unsigned int freq, int dir)
 601 {
 602         struct snd_soc_component *component = dai->component;
 603         struct cs35l34_private *cs35l34 = snd_soc_component_get_drvdata(component);
 604         unsigned int value;
 605
 606         switch (freq) {
 607         case CS35L34_MCLK_5644:
 608                 value = CS35L34_MCLK_RATE_5P6448;
 609                 cs35l34->mclk_int = freq;
 610         break;
 611         case CS35L34_MCLK_6:
 612                 value = CS35L34_MCLK_RATE_6P0000;
 613                 cs35l34->mclk_int = freq;
 614         break;
 615         case CS35L34_MCLK_6144:
 616                 value = CS35L34_MCLK_RATE_6P1440;
 617                 cs35l34->mclk_int = freq;
 618         break;
 619         case CS35L34_MCLK_11289:
 620                 value = CS35L34_MCLK_DIV | CS35L34_MCLK_RATE_5P6448;
 621                 cs35l34->mclk_int = freq / 2;
 622         break;
 623         case CS35L34_MCLK_12:
 624                 value = CS35L34_MCLK_DIV | CS35L34_MCLK_RATE_6P0000;
 625                 cs35l34->mclk_int = freq / 2;
 626         break;
 627         case CS35L34_MCLK_12288:
 628                 value = CS35L34_MCLK_DIV | CS35L34_MCLK_RATE_6P1440;
 629                 cs35l34->mclk_int = freq / 2;
 630         break;
 631         default:
 632                 dev_err(component->dev, "ERROR: Invalid Frequency %d\n", freq);
 633                 cs35l34->mclk_int = 0;
 634                 return -EINVAL;
 635         }
 636         regmap_update_bits(cs35l34->regmap, CS35L34_MCLK_CTL,
 637                         CS35L34_MCLK_DIV | CS35L34_MCLK_RATE_MASK, value);
 638         return 0;
 639 }
 640
 641 static const struct snd_soc_dai_ops cs35l34_ops = {
 642         .startup = cs35l34_pcm_startup,
 643         .set_tristate = cs35l34_set_tristate,
 644         .set_fmt = cs35l34_set_dai_fmt,
 645         .hw_params = cs35l34_pcm_hw_params,
 646         .set_sysclk = cs35l34_dai_set_sysclk,
 647         .set_tdm_slot = cs35l34_set_tdm_slot,
 648 };
 649
 650 static struct snd_soc_dai_driver cs35l34_dai = {
 651                 .name = "cs35l34",
 652                 .id = 0,
 653                 .playback = {
 654                         .stream_name = "AMP Playback",
 655                         .channels_min = 1,
 656                         .channels_max = 8,
 657                         .rates = CS35L34_RATES,
 658                         .formats = CS35L34_FORMATS,
 659                 },
 660                 .capture = {
 661                         .stream_name = "AMP Capture",
 662                         .channels_min = 1,
 663                         .channels_max = 8,
 664                         .rates = CS35L34_RATES,
 665                         .formats = CS35L34_FORMATS,
 666                 },
 667                 .ops = &cs35l34_ops,
 668                 .symmetric_rate = 1,
 669 };
 670
 671 static int cs35l34_boost_inductor(struct cs35l34_private *cs35l34,
 672         unsigned int inductor)
 673 {
 674         struct snd_soc_component *component = cs35l34->component;
 675
 676         switch (inductor) {
 677         case 1000: /* 1 uH */
 678                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x24);
 679                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x24);
 680                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
 681                         0x4E);
 682                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 0);
 683                 break;
 684         case 1200: /* 1.2 uH */
 685                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x20);
 686                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x20);
 687                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
 688                         0x47);
 689                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 1);
 690                 break;
 691         case 1500: /* 1.5uH */
 692                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x20);
 693                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x20);
 694                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
 695                         0x3C);
 696                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 2);
 697                 break;
 698         case 2200: /* 2.2uH */
 699                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x19);
 700                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x25);
 701                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
 702                         0x23);
 703                 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 3);
 704                 break;
 705         default:
 706                 dev_err(component->dev, "%s Invalid Inductor Value %d uH\n",
 707                         __func__, inductor);
 708                 return -EINVAL;
 709         }
 710         return 0;
 711 }
 712
 713 static int cs35l34_probe(struct snd_soc_component *component)
 714 {
 715         int ret = 0;
 716         struct cs35l34_private *cs35l34 = snd_soc_component_get_drvdata(component);
 717
 718         pm_runtime_get_sync(component->dev);
 719
 720         /* Set over temperature warning attenuation to 6 dB */
 721         regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
 722                  CS35L34_OTW_ATTN_MASK, 0x8);
 723
 724         /* Set Power control registers 2 and 3 to have everything
 725          * powered down at initialization
 726          */
 727         regmap_write(cs35l34->regmap, CS35L34_PWRCTL2, 0xFD);
 728         regmap_write(cs35l34->regmap, CS35L34_PWRCTL3, 0x1F);
 729
 730         /* Set mute bit at startup */
 731         regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
 732                                 CS35L34_MUTE, CS35L34_MUTE);
 733
 734         /* Set Platform Data */
 735         if (cs35l34->pdata.boost_peak)
 736                 regmap_update_bits(cs35l34->regmap, CS35L34_BST_PEAK_I,
 737                                 CS35L34_BST_PEAK_MASK,
 738                                 cs35l34->pdata.boost_peak);
 739
 740         if (cs35l34->pdata.gain_zc_disable)
 741                 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
 742                         CS35L34_GAIN_ZC_MASK, 0);
 743         else
 744                 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
 745                         CS35L34_GAIN_ZC_MASK, CS35L34_GAIN_ZC_MASK);
 746
 747         if (cs35l34->pdata.aif_half_drv)
 748                 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_CLK_CTL,
 749                         CS35L34_ADSP_DRIVE, 0);
 750
 751         if (cs35l34->pdata.digsft_disable)
 752                 regmap_update_bits(cs35l34->regmap, CS35L34_AMP_DIG_VOL_CTL,
 753                         CS35L34_AMP_DIGSFT, 0);
 754
 755         if (cs35l34->pdata.amp_inv)
 756                 regmap_update_bits(cs35l34->regmap, CS35L34_AMP_DIG_VOL_CTL,
 757                         CS35L34_INV, CS35L34_INV);
 758
 759         if (cs35l34->pdata.boost_ind)
 760                 ret = cs35l34_boost_inductor(cs35l34, cs35l34->pdata.boost_ind);
 761
 762         if (cs35l34->pdata.i2s_sdinloc)
 763                 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_I2S_CTL,
 764                         CS35L34_I2S_LOC_MASK,
 765                         cs35l34->pdata.i2s_sdinloc << CS35L34_I2S_LOC_SHIFT);
 766
 767         if (cs35l34->pdata.tdm_rising_edge)
 768                 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_TDM_CTL,
 769                         1, 1);
 770
 771         pm_runtime_put_sync(component->dev);
 772
 773         return ret;
 774 }
 775
 776
 777 static const struct snd_soc_component_driver soc_component_dev_cs35l34 = {
 778         .probe                  = cs35l34_probe,
 779         .dapm_widgets           = cs35l34_dapm_widgets,
 780         .num_dapm_widgets       = ARRAY_SIZE(cs35l34_dapm_widgets),
 781         .dapm_routes            = cs35l34_audio_map,
 782         .num_dapm_routes        = ARRAY_SIZE(cs35l34_audio_map),
 783         .controls               = cs35l34_snd_controls,
 784         .num_controls           = ARRAY_SIZE(cs35l34_snd_controls),
 785         .idle_bias_on           = 1,
 786         .use_pmdown_time        = 1,
 787         .endianness             = 1,
 788 };
 789
 790 static struct regmap_config cs35l34_regmap = {
 791         .reg_bits = 8,
 792         .val_bits = 8,
 793
 794         .max_register = CS35L34_MAX_REGISTER,
 795         .reg_defaults = cs35l34_reg,
 796         .num_reg_defaults = ARRAY_SIZE(cs35l34_reg),
 797         .volatile_reg = cs35l34_volatile_register,
 798         .readable_reg = cs35l34_readable_register,
 799         .precious_reg = cs35l34_precious_register,
 800         .cache_type = REGCACHE_RBTREE,
 801
 802         .use_single_read = true,
 803         .use_single_write = true,
 804 };
 805
 806 static int cs35l34_handle_of_data(struct i2c_client *i2c_client,
 807                                 struct cs35l34_platform_data *pdata)
 808 {
 809         struct device_node *np = i2c_client->dev.of_node;
 810         unsigned int val;
 811
 812         if (of_property_read_u32(np, "cirrus,boost-vtge-millivolt",
 813                 &val) >= 0) {
 814                 /* Boost Voltage has a maximum of 8V */
 815                 if (val > 8000 || (val < 3300 && val > 0)) {
 816                         dev_err(&i2c_client->dev,
 817                                 "Invalid Boost Voltage %d mV\n", val);
 818                         return -EINVAL;
 819                 }
 820                 if (val == 0)
 821                         pdata->boost_vtge = 0; /* Use VP */
 822                 else
 823                         pdata->boost_vtge = ((val - 3300)/100) + 1;
 824         } else {
 825                 dev_warn(&i2c_client->dev,
 826                         "Boost Voltage not specified. Using VP\n");
 827         }
 828
 829         if (of_property_read_u32(np, "cirrus,boost-ind-nanohenry", &val) >= 0) {
 830                 pdata->boost_ind = val;
 831         } else {
 832                 dev_err(&i2c_client->dev, "Inductor not specified.\n");
 833                 return -EINVAL;
 834         }
 835
 836         if (of_property_read_u32(np, "cirrus,boost-peak-milliamp", &val) >= 0) {
 837                 if (val > 3840 || val < 1200) {
 838                         dev_err(&i2c_client->dev,
 839                                 "Invalid Boost Peak Current %d mA\n", val);
 840                         return -EINVAL;
 841                 }
 842                 pdata->boost_peak = ((val - 1200)/80) + 1;
 843         }
 844
 845         pdata->aif_half_drv = of_property_read_bool(np,
 846                 "cirrus,aif-half-drv");
 847         pdata->digsft_disable = of_property_read_bool(np,
 848                 "cirrus,digsft-disable");
 849
 850         pdata->gain_zc_disable = of_property_read_bool(np,
 851                 "cirrus,gain-zc-disable");
 852         pdata->amp_inv = of_property_read_bool(np, "cirrus,amp-inv");
 853
 854         if (of_property_read_u32(np, "cirrus,i2s-sdinloc", &val) >= 0)
 855                 pdata->i2s_sdinloc = val;
 856         if (of_property_read_u32(np, "cirrus,tdm-rising-edge", &val) >= 0)
 857                 pdata->tdm_rising_edge = val;
 858
 859         return 0;
 860 }
 861
 862 static irqreturn_t cs35l34_irq_thread(int irq, void *data)
 863 {
 864         struct cs35l34_private *cs35l34 = data;
 865         struct snd_soc_component *component = cs35l34->component;
 866         unsigned int sticky1, sticky2, sticky3, sticky4;
 867         unsigned int mask1, mask2, mask3, mask4, current1;
 868
 869
 870         /* ack the irq by reading all status registers */
 871         regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_4, &sticky4);
 872         regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_3, &sticky3);
 873         regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_2, &sticky2);
 874         regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_1, &sticky1);
 875
 876         regmap_read(cs35l34->regmap, CS35L34_INT_MASK_4, &mask4);
 877         regmap_read(cs35l34->regmap, CS35L34_INT_MASK_3, &mask3);
 878         regmap_read(cs35l34->regmap, CS35L34_INT_MASK_2, &mask2);
 879         regmap_read(cs35l34->regmap, CS35L34_INT_MASK_1, &mask1);
 880
 881         if (!(sticky1 & ~mask1) && !(sticky2 & ~mask2) && !(sticky3 & ~mask3)
 882                 && !(sticky4 & ~mask4))
 883                 return IRQ_NONE;
 884
 885         regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_1, &current1);
 886
 887         if (sticky1 & CS35L34_CAL_ERR) {
 888                 dev_err(component->dev, "Cal error\n");
 889
 890                 /* error is no longer asserted; safe to reset */
 891                 if (!(current1 & CS35L34_CAL_ERR)) {
 892                         dev_dbg(component->dev, "Cal error release\n");
 893                         regmap_update_bits(cs35l34->regmap,
 894                                         CS35L34_PROT_RELEASE_CTL,
 895                                         CS35L34_CAL_ERR_RLS, 0);
 896                         regmap_update_bits(cs35l34->regmap,
 897                                         CS35L34_PROT_RELEASE_CTL,
 898                                         CS35L34_CAL_ERR_RLS,
 899                                         CS35L34_CAL_ERR_RLS);
 900                         regmap_update_bits(cs35l34->regmap,
 901                                         CS35L34_PROT_RELEASE_CTL,
 902                                         CS35L34_CAL_ERR_RLS, 0);
 903                         /* note: amp will re-calibrate on next resume */
 904                 }
 905         }
 906
 907         if (sticky1 & CS35L34_ALIVE_ERR)
 908                 dev_err(component->dev, "Alive error\n");
 909
 910         if (sticky1 & CS35L34_AMP_SHORT) {
 911                 dev_crit(component->dev, "Amp short error\n");
 912
 913                 /* error is no longer asserted; safe to reset */
 914                 if (!(current1 & CS35L34_AMP_SHORT)) {
 915                         dev_dbg(component->dev,
 916                                 "Amp short error release\n");
 917                         regmap_update_bits(cs35l34->regmap,
 918                                         CS35L34_PROT_RELEASE_CTL,
 919                                         CS35L34_SHORT_RLS, 0);
 920                         regmap_update_bits(cs35l34->regmap,
 921                                         CS35L34_PROT_RELEASE_CTL,
 922                                         CS35L34_SHORT_RLS,
 923                                         CS35L34_SHORT_RLS);
 924                         regmap_update_bits(cs35l34->regmap,
 925                                         CS35L34_PROT_RELEASE_CTL,
 926                                         CS35L34_SHORT_RLS, 0);
 927                 }
 928         }
 929
 930         if (sticky1 & CS35L34_OTW) {
 931                 dev_crit(component->dev, "Over temperature warning\n");
 932
 933                 /* error is no longer asserted; safe to reset */
 934                 if (!(current1 & CS35L34_OTW)) {
 935                         dev_dbg(component->dev,
 936                                 "Over temperature warning release\n");
 937                         regmap_update_bits(cs35l34->regmap,
 938                                         CS35L34_PROT_RELEASE_CTL,
 939                                         CS35L34_OTW_RLS, 0);
 940                         regmap_update_bits(cs35l34->regmap,
 941                                         CS35L34_PROT_RELEASE_CTL,
 942                                         CS35L34_OTW_RLS,
 943                                         CS35L34_OTW_RLS);
 944                         regmap_update_bits(cs35l34->regmap,
 945                                         CS35L34_PROT_RELEASE_CTL,
 946                                         CS35L34_OTW_RLS, 0);
 947                 }
 948         }
 949
 950         if (sticky1 & CS35L34_OTE) {
 951                 dev_crit(component->dev, "Over temperature error\n");
 952
 953                 /* error is no longer asserted; safe to reset */
 954                 if (!(current1 & CS35L34_OTE)) {
 955                         dev_dbg(component->dev,
 956                                 "Over temperature error release\n");
 957                         regmap_update_bits(cs35l34->regmap,
 958                                         CS35L34_PROT_RELEASE_CTL,
 959                                         CS35L34_OTE_RLS, 0);
 960                         regmap_update_bits(cs35l34->regmap,
 961                                         CS35L34_PROT_RELEASE_CTL,
 962                                         CS35L34_OTE_RLS,
 963                                         CS35L34_OTE_RLS);
 964                         regmap_update_bits(cs35l34->regmap,
 965                                         CS35L34_PROT_RELEASE_CTL,
 966                                         CS35L34_OTE_RLS, 0);
 967                 }
 968         }
 969
 970         if (sticky3 & CS35L34_BST_HIGH) {
 971                 dev_crit(component->dev, "VBST too high error; powering off!\n");
 972                 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL2,
 973                                 CS35L34_PDN_AMP, CS35L34_PDN_AMP);
 974                 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL1,
 975                                 CS35L34_PDN_ALL, CS35L34_PDN_ALL);
 976         }
 977
 978         if (sticky3 & CS35L34_LBST_SHORT) {
 979                 dev_crit(component->dev, "LBST short error; powering off!\n");
 980                 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL2,
 981                                 CS35L34_PDN_AMP, CS35L34_PDN_AMP);
 982                 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL1,
 983                                 CS35L34_PDN_ALL, CS35L34_PDN_ALL);
 984         }
 985
 986         return IRQ_HANDLED;
 987 }
 988
 989 static const char * const cs35l34_core_supplies[] = {
 990         "VA",
 991         "VP",
 992 };
 993
 994 static int cs35l34_i2c_probe(struct i2c_client *i2c_client)
 995 {
 996         struct cs35l34_private *cs35l34;
 997         struct cs35l34_platform_data *pdata =
 998                 dev_get_platdata(&i2c_client->dev);
 999         int i, devid;
1000         int ret;
1001         unsigned int reg;
1002
1003         cs35l34 = devm_kzalloc(&i2c_client->dev, sizeof(*cs35l34), GFP_KERNEL);
1004         if (!cs35l34)
1005                 return -ENOMEM;
1006
1007         i2c_set_clientdata(i2c_client, cs35l34);
1008         cs35l34->regmap = devm_regmap_init_i2c(i2c_client, &cs35l34_regmap);
1009         if (IS_ERR(cs35l34->regmap)) {
1010                 ret = PTR_ERR(cs35l34->regmap);
1011                 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
1012                 return ret;
1013         }
1014
1015         cs35l34->num_core_supplies = ARRAY_SIZE(cs35l34_core_supplies);
1016         for (i = 0; i < ARRAY_SIZE(cs35l34_core_supplies); i++)
1017                 cs35l34->core_supplies[i].supply = cs35l34_core_supplies[i];
1018
1019         ret = devm_regulator_bulk_get(&i2c_client->dev,
1020                 cs35l34->num_core_supplies,
1021                 cs35l34->core_supplies);
1022         if (ret != 0) {
1023                 dev_err(&i2c_client->dev,
1024                         "Failed to request core supplies %d\n", ret);
1025                 return ret;
1026         }
1027
1028         ret = regulator_bulk_enable(cs35l34->num_core_supplies,
1029                                         cs35l34->core_supplies);
1030         if (ret != 0) {
1031                 dev_err(&i2c_client->dev,
1032                         "Failed to enable core supplies: %d\n", ret);
1033                 return ret;
1034         }
1035
1036         if (pdata) {
1037                 cs35l34->pdata = *pdata;
1038         } else {
1039                 pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata),
1040                                      GFP_KERNEL);
1041                 if (!pdata) {
1042                         ret = -ENOMEM;
1043                         goto err_regulator;
1044                 }
1045
1046                 if (i2c_client->dev.of_node) {
1047                         ret = cs35l34_handle_of_data(i2c_client, pdata);
1048                         if (ret != 0)
1049                                 goto err_regulator;
1050
1051                 }
1052                 cs35l34->pdata = *pdata;
1053         }
1054
1055         ret = devm_request_threaded_irq(&i2c_client->dev, i2c_client->irq, NULL,
1056                         cs35l34_irq_thread, IRQF_ONESHOT | IRQF_TRIGGER_LOW,
1057                         "cs35l34", cs35l34);
1058         if (ret != 0)
1059                 dev_err(&i2c_client->dev, "Failed to request IRQ: %d\n", ret);
1060
1061         cs35l34->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
1062                                 "reset", GPIOD_OUT_LOW);
1063         if (IS_ERR(cs35l34->reset_gpio)) {
1064                 ret = PTR_ERR(cs35l34->reset_gpio);
1065                 goto err_regulator;
1066         }
1067
1068         gpiod_set_value_cansleep(cs35l34->reset_gpio, 1);
1069
1070         msleep(CS35L34_START_DELAY);
1071
1072         devid = cirrus_read_device_id(cs35l34->regmap, CS35L34_DEVID_AB);
1073         if (devid < 0) {
1074                 ret = devid;
1075                 dev_err(&i2c_client->dev, "Failed to read device ID: %d\n", ret);
1076                 goto err_reset;
1077         }
1078
1079         if (devid != CS35L34_CHIP_ID) {
1080                 dev_err(&i2c_client->dev,
1081                         "CS35l34 Device ID (%X). Expected ID %X\n",
1082                         devid, CS35L34_CHIP_ID);
1083                 ret = -ENODEV;
1084                 goto err_reset;
1085         }
1086
1087         ret = regmap_read(cs35l34->regmap, CS35L34_REV_ID, &reg);
1088         if (ret < 0) {
1089                 dev_err(&i2c_client->dev, "Get Revision ID failed\n");
1090                 goto err_reset;
1091         }
1092
1093         dev_info(&i2c_client->dev,
1094                  "Cirrus Logic CS35l34 (%x), Revision: %02X\n", devid,
1095                 reg & 0xFF);
1096
1097         /* Unmask critical interrupts */
1098         regmap_update_bits(cs35l34->regmap, CS35L34_INT_MASK_1,
1099                                 CS35L34_M_CAL_ERR | CS35L34_M_ALIVE_ERR |
1100                                 CS35L34_M_AMP_SHORT | CS35L34_M_OTW |
1101                                 CS35L34_M_OTE, 0);
1102         regmap_update_bits(cs35l34->regmap, CS35L34_INT_MASK_3,
1103                                 CS35L34_M_BST_HIGH | CS35L34_M_LBST_SHORT, 0);
1104
1105         pm_runtime_set_autosuspend_delay(&i2c_client->dev, 100);
1106         pm_runtime_use_autosuspend(&i2c_client->dev);
1107         pm_runtime_set_active(&i2c_client->dev);
1108         pm_runtime_enable(&i2c_client->dev);
1109
1110         ret = devm_snd_soc_register_component(&i2c_client->dev,
1111                         &soc_component_dev_cs35l34, &cs35l34_dai, 1);
1112         if (ret < 0) {
1113                 dev_err(&i2c_client->dev,
1114                         "%s: Register component failed\n", __func__);
1115                 goto err_reset;
1116         }
1117
1118         return 0;
1119
1120 err_reset:
1121         gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1122 err_regulator:
1123         regulator_bulk_disable(cs35l34->num_core_supplies,
1124                 cs35l34->core_supplies);
1125
1126         return ret;
1127 }
1128
1129 static void cs35l34_i2c_remove(struct i2c_client *client)
1130 {
1131         struct cs35l34_private *cs35l34 = i2c_get_clientdata(client);
1132
1133         gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1134
1135         pm_runtime_disable(&client->dev);
1136         regulator_bulk_disable(cs35l34->num_core_supplies,
1137                 cs35l34->core_supplies);
1138 }
1139
1140 static int __maybe_unused cs35l34_runtime_resume(struct device *dev)
1141 {
1142         struct cs35l34_private *cs35l34 = dev_get_drvdata(dev);
1143         int ret;
1144
1145         ret = regulator_bulk_enable(cs35l34->num_core_supplies,
1146                 cs35l34->core_supplies);
1147
1148         if (ret != 0) {
1149                 dev_err(dev, "Failed to enable core supplies: %d\n",
1150                         ret);
1151                 return ret;
1152         }
1153
1154         regcache_cache_only(cs35l34->regmap, false);
1155
1156         gpiod_set_value_cansleep(cs35l34->reset_gpio, 1);
1157         msleep(CS35L34_START_DELAY);
1158
1159         ret = regcache_sync(cs35l34->regmap);
1160         if (ret != 0) {
1161                 dev_err(dev, "Failed to restore register cache\n");
1162                 goto err;
1163         }
1164         return 0;
1165 err:
1166         regcache_cache_only(cs35l34->regmap, true);
1167         regulator_bulk_disable(cs35l34->num_core_supplies,
1168                 cs35l34->core_supplies);
1169
1170         return ret;
1171 }
1172
1173 static int __maybe_unused cs35l34_runtime_suspend(struct device *dev)
1174 {
1175         struct cs35l34_private *cs35l34 = dev_get_drvdata(dev);
1176
1177         regcache_cache_only(cs35l34->regmap, true);
1178         regcache_mark_dirty(cs35l34->regmap);
1179
1180         gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1181
1182         regulator_bulk_disable(cs35l34->num_core_supplies,
1183                         cs35l34->core_supplies);
1184
1185         return 0;
1186 }
1187
1188 static const struct dev_pm_ops cs35l34_pm_ops = {
1189         SET_RUNTIME_PM_OPS(cs35l34_runtime_suspend,
1190                            cs35l34_runtime_resume,
1191                            NULL)
1192 };
1193
1194 static const struct of_device_id cs35l34_of_match[] = {
1195         {.compatible = "cirrus,cs35l34"},
1196         {},
1197 };
1198 MODULE_DEVICE_TABLE(of, cs35l34_of_match);
1199
1200 static const struct i2c_device_id cs35l34_id[] = {
1201         {"cs35l34", 0},
1202         {}
1203 };
1204 MODULE_DEVICE_TABLE(i2c, cs35l34_id);
1205
1206 static struct i2c_driver cs35l34_i2c_driver = {
1207         .driver = {
1208                 .name = "cs35l34",
1209                 .pm = &cs35l34_pm_ops,
1210                 .of_match_table = cs35l34_of_match,
1211
1212                 },
1213         .id_table = cs35l34_id,
1214         .probe_new = cs35l34_i2c_probe,
1215         .remove = cs35l34_i2c_remove,
1216
1217 };
1218
1219 static int __init cs35l34_modinit(void)
1220 {
1221         int ret;
1222
1223         ret = i2c_add_driver(&cs35l34_i2c_driver);
1224         if (ret != 0) {
1225                 pr_err("Failed to register CS35l34 I2C driver: %d\n", ret);
1226                 return ret;
1227         }
1228         return 0;
1229 }
1230 module_init(cs35l34_modinit);
1231
1232 static void __exit cs35l34_exit(void)
1233 {
1234         i2c_del_driver(&cs35l34_i2c_driver);
1235 }
1236 module_exit(cs35l34_exit);
1237
1238 MODULE_DESCRIPTION("ASoC CS35l34 driver");
1239 MODULE_AUTHOR("Paul Handrigan, Cirrus Logic Inc, <Paul.Handrigan@cirrus.com>");
1240 MODULE_LICENSE("GPL");