2 * carl9170 firmware - used by the ar9170 wireless device
4 * DMA descriptor handling functions
6 * Copyright (c) 2000-2005 ZyDAS Technology Corporation
7 * Copyright (c) 2007-2009 Atheros Communications, Inc.
8 * Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
9 * Copyright 2009, 2010 Christian Lamparter <chunkeey@googlemail.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
30 struct ar9170_dma_memory dma_mem __section(sram);
32 static void copy_dma_desc(struct dma_desc *dst,
35 memcpy(dst, src, sizeof(struct dma_desc));
38 static void clear_descriptor(struct dma_desc *d)
40 d->status = AR9170_OWN_BITS_SW;
49 static void fill_descriptor(struct dma_desc *d, uint16_t size, uint8_t *data)
51 d->status = AR9170_OWN_BITS_SW;
61 * - Init up_queue, down_queue, tx_queue[5], rx_queue.
62 * - Setup descriptors and data buffer address.
63 * - Ring descriptors rx_queue and down_queue by dma_reclaim().
65 * NOTE: LastAddr tempary point (same) to nextAddr after initialize.
66 * Because LastAddr is don't care in function dma_reclaim().
68 void dma_init_descriptors(void)
72 for (i = 0; i < ARRAY_SIZE(dma_mem.terminator); i++)
73 clear_descriptor(&dma_mem.terminator[i]);
75 /* Assign terminators to DMA queues */
77 fw.pta.up_queue.head = fw.pta.up_queue.terminator = &dma_mem.terminator[i++];
78 fw.pta.down_queue.head = fw.pta.down_queue.terminator = &dma_mem.terminator[i++];
79 for (j = 0; j < __AR9170_NUM_TX_QUEUES; j++)
80 fw.wlan.tx_queue[j].head = fw.wlan.tx_queue[j].terminator = &dma_mem.terminator[i++];
81 fw.wlan.rx_queue.head = fw.wlan.rx_queue.terminator = &dma_mem.terminator[i++];
82 fw.usb.int_desc = &dma_mem.terminator[i++];
84 #ifdef CONFIG_CARL9170FW_CAB_QUEUE
85 fw.wlan.cab_queue.head = fw.wlan.cab_queue.terminator = &dma_mem.terminator[i++];
86 #endif /* CONFIG_CARL9170FW_CAB_QUEUE */
88 #ifdef CONFIG_CARL9170FW_HANDLE_BACK_REQ
89 fw.wlan.ba_desc = &dma_mem.terminator[i++];
90 #endif /* CONFIG_CARL9170FW_HANDLE_BACK_REQ */
92 #ifdef CONFIG_CARL9170FW_DELAYED_TX
93 fw.wlan.tx_retry.head = fw.wlan.tx_retry.terminator = &dma_mem.terminator[i++];
95 for (j = 0; j < __AR9170_NUM_TX_QUEUES; j++)
96 fw.wlan.tx_delay[j].head = fw.wlan.tx_delay[j].terminator = &dma_mem.terminator[i++];
97 #endif /* CONFIG_CARL9170FW_DELAYED_TX */
99 DBG("Blocks:%d [tx:%d, rx:%d] Terminators:%d/%d\n",
100 AR9170_BLOCK_NUMBER, AR9170_TX_BLOCK_NUMBER,
101 AR9170_RX_BLOCK_NUMBER, AR9170_TERMINATOR_NUMBER, i);
103 /* Init descriptors and memory blocks */
104 for (i = 0; i < AR9170_BLOCK_NUMBER; i++) {
105 fill_descriptor(&dma_mem.block[i], AR9170_BLOCK_SIZE, dma_mem.data[i].data);
107 if (i < AR9170_TX_BLOCK_NUMBER)
108 dma_reclaim(&fw.pta.down_queue, &dma_mem.block[i]);
110 dma_reclaim(&fw.wlan.rx_queue, &dma_mem.block[i]);
113 /* Set DMA address registers */
114 set(AR9170_PTA_REG_DN_DMA_ADDRH, (uint32_t) fw.pta.down_queue.head >> 16);
115 set(AR9170_PTA_REG_DN_DMA_ADDRL, (uint32_t) fw.pta.down_queue.head & 0xffff);
116 set(AR9170_PTA_REG_UP_DMA_ADDRH, (uint32_t) fw.pta.up_queue.head >> 16);
117 set(AR9170_PTA_REG_UP_DMA_ADDRL, (uint32_t) fw.pta.up_queue.head & 0xffff);
119 for (i = 0; i < __AR9170_NUM_TX_QUEUES; i++)
120 set_wlan_txq_dma_addr(i, (uint32_t) fw.wlan.tx_queue[i].head);
122 set(AR9170_MAC_REG_DMA_RXQ_ADDR, (uint32_t) fw.wlan.rx_queue.head);
124 fw.usb.int_desc->status = AR9170_OWN_BITS_SW;
125 fw.usb.int_desc->ctrl = (AR9170_CTRL_LS_BIT | AR9170_CTRL_FS_BIT);
126 fw.usb.int_desc->dataSize = AR9170_BLOCK_SIZE;
127 fw.usb.int_desc->totalLen = 0;
128 fw.usb.int_desc->lastAddr = fw.usb.int_desc;
129 fw.usb.int_desc->dataAddr = (void *) &dma_mem.reserved.rsp;
130 fw.usb.int_desc->nextAddr = (void *) 0;
132 memset(DESC_PAYLOAD(fw.usb.int_desc), 0xff,
133 AR9170_INT_MAGIC_HEADER_SIZE);
134 memset(DESC_PAYLOAD_OFF(fw.usb.int_desc, AR9170_INT_MAGIC_HEADER_SIZE),
135 0, AR9170_BLOCK_SIZE - AR9170_INT_MAGIC_HEADER_SIZE);
137 /* rsp is now available for use */
138 fw.usb.int_desc_available = 1;
140 #ifdef CONFIG_CARL9170FW_HANDLE_BACK_REQ
141 fw.wlan.ba_desc->status = AR9170_OWN_BITS_SW;
142 fw.wlan.ba_desc->ctrl = (AR9170_CTRL_LS_BIT | AR9170_CTRL_FS_BIT);
143 fw.wlan.ba_desc->dataSize = fw.wlan.ba_desc->totalLen =
144 sizeof(struct carl9170_tx_superdesc) +
145 sizeof(struct ar9170_tx_hwdesc) +
146 sizeof(struct ieee80211_ba) + FCS_LEN;
147 fw.wlan.ba_desc->lastAddr = fw.wlan.ba_desc;
148 fw.wlan.ba_desc->nextAddr = fw.wlan.ba_desc;
149 fw.wlan.ba_desc->dataAddr = (void *) &dma_mem.reserved.ba;
151 memset(DESC_PAYLOAD(fw.wlan.ba_desc), 0, 128);
153 fw.wlan.ba_desc_available = 1;
154 #endif /* CONFIG_CARL9170FW_HANDLE_BACK_REQ */
160 * Exchange the terminator and the first descriptor of the packet
161 * for hardware ascy...
163 void dma_reclaim(struct dma_queue *q, struct dma_desc *desc)
165 struct dma_desc *tmpDesc;
166 struct dma_desc tdesc;
168 /* 1. Set OWN bit to HW for all TDs to be added, clear ctrl and size */
171 tmpDesc->status = AR9170_OWN_BITS_HW;
173 tmpDesc->totalLen = 0;
174 tmpDesc->dataSize = AR9170_BLOCK_SIZE;
176 /* TODO : Exception handle */
178 if (desc->lastAddr == tmpDesc)
181 tmpDesc->lastAddr = desc->lastAddr;
182 tmpDesc = tmpDesc->nextAddr;
185 /* 2. Next address of Last TD to be added = first TD */
186 desc->lastAddr->nextAddr = desc;
188 /* 3. Copy first TD to be added to TTD */
189 copy_dma_desc(&tdesc, desc);
191 /* 4. set first TD OWN bit to SW */
192 desc->status = AR9170_OWN_BITS_SW;
194 /* 5. Copy TTD to last TD */
195 tdesc.status &= (~AR9170_OWN_BITS);
196 copy_dma_desc((void *)q->terminator, (void *)&tdesc);
197 q->terminator->status |= AR9170_OWN_BITS_HW;
199 /* Update terminator pointer */
200 q->terminator = desc;
204 * Put a complete packet into the tail of the Queue q.
205 * Exchange the terminator and the first descriptor of the packet
206 * for hardware ascy...
208 void dma_put(struct dma_queue *q, struct dma_desc *desc)
210 struct dma_desc *tmpDesc;
211 struct dma_desc tdesc;
216 /* update totalLen */
217 tmpDesc->totalLen = desc->totalLen;
219 /* 1. Set OWN bit to HW for all TDs to be added */
220 tmpDesc->status = AR9170_OWN_BITS_HW;
221 /* TODO : Exception handle */
223 tmpDesc->lastAddr = desc->lastAddr;
225 if (desc->lastAddr == tmpDesc)
228 tmpDesc = tmpDesc->nextAddr;
231 /* 2. Next address of Last TD to be added = first TD */
232 desc->lastAddr->nextAddr = desc;
234 /* If there is only one descriptor, update pointer of last descriptor */
235 if (desc->lastAddr == desc)
236 desc->lastAddr = q->terminator;
238 /* 3. Copy first TD to be added to TTD */
239 copy_dma_desc(&tdesc, desc);
241 /* 4. set first TD OWN bit to SW */
242 desc->status = AR9170_OWN_BITS_SW;
246 desc->lastAddr = desc;
247 desc->nextAddr = desc;
248 desc->dataAddr = NULL;
250 /* 5. Copy TTD to last TD */
251 tdesc.status &= (~AR9170_OWN_BITS);
252 copy_dma_desc((void *)q->terminator, (void *)&tdesc);
253 q->terminator->status |= AR9170_OWN_BITS_HW;
255 /* Update terminator pointer */
256 q->terminator = desc;
259 struct dma_desc *dma_unlink_head(struct dma_queue *queue)
261 struct dma_desc *desc;
263 if (queue_empty(queue))
268 queue->head = desc->lastAddr->nextAddr;
270 /* poison nextAddr address */
271 desc->lastAddr->nextAddr = desc->lastAddr;
272 desc->lastAddr->lastAddr = desc->lastAddr;