2 * carl9170 firmware - used by the ar9170 wireless device
4 * DMA descriptor handling functions
6 * Copyright (c) 2000-2005 ZyDAS Technology Corporation
7 * Copyright (c) 2007-2009 Atheros Communications, Inc.
8 * Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
9 * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
30 struct ar9170_dma_memory dma_mem __section(sram);
32 static void copy_dma_desc(struct dma_desc *dst,
35 memcpy(dst, src, sizeof(struct dma_desc));
38 static void clear_descriptor(struct dma_desc *d)
40 d->status = AR9170_OWN_BITS_SW;
49 static void fill_descriptor(struct dma_desc *d, uint16_t size, uint8_t *data)
51 d->status = AR9170_OWN_BITS_SW;
60 static void init_queue(struct dma_queue *q, struct dma_desc *d)
62 q->head = q->terminator = d;
66 * - Init up_queue, down_queue, tx_queue[5], rx_queue.
67 * - Setup descriptors and data buffer address.
68 * - Ring descriptors rx_queue and down_queue by dma_reclaim().
70 * NOTE: LastAddr tempary point (same) to nextAddr after initialize.
71 * Because LastAddr is don't care in function dma_reclaim().
73 void dma_init_descriptors(void)
77 for (i = 0; i < ARRAY_SIZE(dma_mem.terminator); i++)
78 clear_descriptor(&dma_mem.terminator[i]);
80 /* Assign terminators to DMA queues */
82 init_queue(&fw.pta.up_queue, &dma_mem.terminator[i++]);
83 init_queue(&fw.pta.down_queue, &dma_mem.terminator[i++]);
84 for (j = 0; j < __AR9170_NUM_TX_QUEUES; j++)
85 init_queue(&fw.wlan.tx_queue[j], &dma_mem.terminator[i++]);
86 init_queue(&fw.wlan.tx_retry, &dma_mem.terminator[i++]);
87 init_queue(&fw.wlan.rx_queue, &dma_mem.terminator[i++]);
88 fw.usb.int_desc = &dma_mem.terminator[i++];
89 fw.wlan.fw_desc = &dma_mem.terminator[i++];
91 #ifdef CONFIG_CARL9170FW_CAB_QUEUE
92 for (j = 0; j < CARL9170_INTF_NUM; j++)
93 init_queue(&fw.wlan.cab_queue[j], &dma_mem.terminator[i++]);
94 #endif /* CONFIG_CARL9170FW_CAB_QUEUE */
96 BUG_ON(AR9170_TERMINATOR_NUMBER != i);
98 DBG("Blocks:%d [tx:%d, rx:%d] Terminators:%d/%d\n",
99 AR9170_BLOCK_NUMBER, AR9170_TX_BLOCK_NUMBER,
100 AR9170_RX_BLOCK_NUMBER, AR9170_TERMINATOR_NUMBER, i);
102 /* Init descriptors and memory blocks */
103 for (i = 0; i < AR9170_BLOCK_NUMBER; i++) {
104 fill_descriptor(&dma_mem.block[i], AR9170_BLOCK_SIZE, dma_mem.data[i].data);
106 if (i < AR9170_TX_BLOCK_NUMBER)
107 dma_reclaim(&fw.pta.down_queue, &dma_mem.block[i]);
109 dma_reclaim(&fw.wlan.rx_queue, &dma_mem.block[i]);
112 /* Set DMA address registers */
113 set(AR9170_PTA_REG_DN_DMA_ADDRH, (uint32_t) fw.pta.down_queue.head >> 16);
114 set(AR9170_PTA_REG_DN_DMA_ADDRL, (uint32_t) fw.pta.down_queue.head & 0xffff);
115 set(AR9170_PTA_REG_UP_DMA_ADDRH, (uint32_t) fw.pta.up_queue.head >> 16);
116 set(AR9170_PTA_REG_UP_DMA_ADDRL, (uint32_t) fw.pta.up_queue.head & 0xffff);
118 for (i = 0; i < __AR9170_NUM_TX_QUEUES; i++)
119 set_wlan_txq_dma_addr(i, (uint32_t) fw.wlan.tx_queue[i].head);
121 set(AR9170_MAC_REG_DMA_RXQ_ADDR, (uint32_t) fw.wlan.rx_queue.head);
122 fw.usb.int_desc->dataSize = AR9170_BLOCK_SIZE;
123 fw.usb.int_desc->dataAddr = (void *) &dma_mem.reserved.rsp;
125 memset(DESC_PAYLOAD(fw.usb.int_desc), 0xff,
126 AR9170_INT_MAGIC_HEADER_SIZE);
127 memset(DESC_PAYLOAD_OFF(fw.usb.int_desc, AR9170_INT_MAGIC_HEADER_SIZE),
128 0, AR9170_BLOCK_SIZE - AR9170_INT_MAGIC_HEADER_SIZE);
130 /* rsp is now available for use */
131 fw.usb.int_desc_available = 1;
133 memset(DESC_PAYLOAD(fw.wlan.fw_desc), 0, 128);
134 fw.wlan.fw_desc_available = 1;
140 * Exchange the terminator and the first descriptor of the packet
141 * for hardware ascy...
143 void dma_reclaim(struct dma_queue *q, struct dma_desc *desc)
145 struct dma_desc *tmpDesc, *last;
146 struct dma_desc tdesc;
148 /* 1. Set OWN bit to HW for all TDs to be added, clear ctrl and size */
150 last = desc->lastAddr;
153 tmpDesc->status = AR9170_OWN_BITS_HW;
155 tmpDesc->totalLen = 0;
156 tmpDesc->dataSize = AR9170_BLOCK_SIZE;
158 /* TODO : Exception handle */
160 tmpDesc->lastAddr = tmpDesc;
165 tmpDesc = tmpDesc->nextAddr;
168 /* 2. Next address of Last TD to be added = first TD */
169 tmpDesc->nextAddr = desc;
171 /* Link first TD to self */
172 desc->lastAddr = q->terminator;
174 /* 3. Copy first TD to be added to TTD */
175 copy_dma_desc(&tdesc, desc);
177 /* 4. Initialize new terminator */
178 clear_descriptor(desc);
180 /* 5. Copy TTD to last TD */
182 copy_dma_desc((void *)q->terminator, (void *)&tdesc);
183 q->terminator->status |= AR9170_OWN_BITS_HW;
185 /* Update terminator pointer */
186 q->terminator = desc;
190 * Put a complete packet into the tail of the Queue q.
191 * Exchange the terminator and the first descriptor of the packet
192 * for hardware ascy...
194 void dma_put(struct dma_queue *q, struct dma_desc *desc)
196 struct dma_desc *tmpDesc;
197 struct dma_desc tdesc;
202 /* update totalLen */
203 tmpDesc->totalLen = desc->totalLen;
205 /* 1. Set OWN bit to HW for all TDs to be added */
206 tmpDesc->status = AR9170_OWN_BITS_HW;
207 /* TODO : Exception handle */
209 tmpDesc->lastAddr = desc->lastAddr;
211 if (desc->lastAddr == tmpDesc)
214 tmpDesc = tmpDesc->nextAddr;
217 /* 2. Next address of Last TD to be added = first TD */
218 desc->lastAddr->nextAddr = desc;
220 /* If there is only one descriptor, update pointer of last descriptor */
221 if (desc->lastAddr == desc)
222 desc->lastAddr = q->terminator;
224 /* 3. Copy first TD to be added to TTD */
225 copy_dma_desc(&tdesc, desc);
227 /* 4. Initialize new terminator */
228 clear_descriptor(desc);
230 /* 5. Copy TTD to last TD */
231 tdesc.status &= (~AR9170_OWN_BITS);
232 copy_dma_desc((void *)q->terminator, (void *)&tdesc);
233 q->terminator->status |= AR9170_OWN_BITS_HW;
235 /* Update terminator pointer */
236 q->terminator = desc;
239 struct dma_desc *dma_unlink_head(struct dma_queue *queue)
241 struct dma_desc *desc;
243 if (queue_empty(queue))
248 queue->head = desc->lastAddr->nextAddr;
250 /* poison nextAddr address */
251 desc->lastAddr->nextAddr = desc->lastAddr;
252 desc->lastAddr->lastAddr = desc->lastAddr;