2 * arch/m68k/bvme6000/config.c
4 * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
10 * Copyright (C) 1993 Hamish Macdonald
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file README.legal in the main directory of this archive
17 #include <linux/types.h>
18 #include <linux/kernel.h>
20 #include <linux/tty.h>
21 #include <linux/console.h>
22 #include <linux/linkage.h>
23 #include <linux/init.h>
24 #include <linux/major.h>
25 #include <linux/genhd.h>
26 #include <linux/rtc.h>
27 #include <linux/interrupt.h>
28 #include <linux/bcd.h>
30 #include <asm/bootinfo.h>
31 #include <asm/bootinfo-vme.h>
32 #include <asm/byteorder.h>
33 #include <asm/pgtable.h>
34 #include <asm/setup.h>
36 #include <asm/traps.h>
37 #include <asm/machdep.h>
38 #include <asm/bvme6000hw.h>
40 static void bvme6000_get_model(char *model);
41 extern void bvme6000_sched_init(irq_handler_t handler);
42 extern u32 bvme6000_gettimeoffset(void);
43 extern int bvme6000_hwclk (int, struct rtc_time *);
44 extern int bvme6000_set_clock_mmss (unsigned long);
45 extern void bvme6000_reset (void);
46 void bvme6000_set_vectors (void);
49 int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
51 if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
57 void bvme6000_reset(void)
59 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
61 pr_info("\r\n\nCalled bvme6000_reset\r\n"
62 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
63 /* The string of returns is to delay the reset until the whole
64 * message is output. */
65 /* Enable the watchdog, via PIT port C bit 4 */
67 pit->pcddr |= 0x10; /* WDOG enable */
73 static void bvme6000_get_model(char *model)
75 sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
79 * This function is called during kernel startup to initialize
80 * the bvme6000 IRQ handling routines.
82 static void __init bvme6000_init_IRQ(void)
84 m68k_setup_user_interrupt(VEC_USER, 192);
87 void __init config_bvme6000(void)
89 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
91 /* Board type is only set by newer versions of vmelilo/tftplilo */
93 if (m68k_cputype == CPU_68060)
94 vme_brdtype = VME_TYPE_BVME6000;
96 vme_brdtype = VME_TYPE_BVME4000;
99 /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
100 * debugger. Note trap_init() will splat the abort vector, but
101 * bvme6000_init_IRQ() will put it back again. Hopefully. */
103 bvme6000_set_vectors();
106 mach_max_dma_address = 0xffffffff;
107 mach_sched_init = bvme6000_sched_init;
108 mach_init_IRQ = bvme6000_init_IRQ;
109 arch_gettimeoffset = bvme6000_gettimeoffset;
110 mach_hwclk = bvme6000_hwclk;
111 mach_set_clock_mmss = bvme6000_set_clock_mmss;
112 mach_reset = bvme6000_reset;
113 mach_get_model = bvme6000_get_model;
115 pr_info("Board is %sconfigured as a System Controller\n",
116 *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
118 /* Now do the PIT configuration */
120 pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
121 pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
122 pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
123 pit->padr = 0x00; /* Just to be tidy! */
124 pit->paddr = 0x00; /* All inputs for now (safest) */
125 pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
126 pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
127 /* PRI, SYSCON?, Level3, SCC clks from xtal */
128 pit->pbddr = 0xf3; /* Mostly outputs */
129 pit->pcdr = 0x01; /* PA transceiver disabled */
130 pit->pcddr = 0x03; /* WDOG disable */
132 /* Disable snooping for Ethernet and VME accesses */
134 bvme_acr_addrctl = 0;
138 irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
140 unsigned long *new = (unsigned long *)vectors;
141 unsigned long *old = (unsigned long *)0xf8000000;
143 /* Wait for button release */
144 while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
147 *(new+4) = *(old+4); /* Illegal instruction */
148 *(new+9) = *(old+9); /* Trace */
149 *(new+47) = *(old+47); /* Trap #15 */
150 *(new+0x1f) = *(old+0x1f); /* ABORT switch */
155 static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
157 irq_handler_t timer_routine = dev_id;
159 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
162 local_irq_save(flags);
163 msr = rtc->msr & 0xc0;
164 rtc->msr = msr | 0x20; /* Ack the interrupt */
165 timer_routine(0, NULL);
166 local_irq_restore(flags);
172 * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
173 * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
174 * So, when reading the elapsed time, you should read timer1,
175 * subtract it from 39999, and then add 40000 if T1 is high.
176 * That gives you the number of 125ns ticks in to the 10ms period,
177 * so divide by 8 to get the microsecond result.
180 void bvme6000_sched_init (irq_handler_t timer_routine)
182 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
183 unsigned char msr = rtc->msr & 0xc0;
185 rtc->msr = 0; /* Ensure timer registers accessible */
187 if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0, "timer",
189 panic ("Couldn't register timer int");
191 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
192 rtc->t1msb = 39999 >> 8;
193 rtc->t1lsb = 39999 & 0xff;
194 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
195 rtc->msr = 0x40; /* Access int.cntrl, etc */
196 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
198 rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
199 rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
200 rtc->msr = 0; /* Access timer 1 control */
201 rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
205 if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
206 "abort", bvme6000_abort_int))
207 panic ("Couldn't register abort int");
211 /* This is always executed with interrupts disabled. */
214 * NOTE: Don't accept any readings within 5us of rollover, as
215 * the T1INT bit may be a little slow getting set. There is also
216 * a fault in the chip, meaning that reads may produce invalid
220 u32 bvme6000_gettimeoffset(void)
222 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
223 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
224 unsigned char msr = rtc->msr & 0xc0;
225 unsigned char t1int, t1op;
228 rtc->msr = 0; /* Ensure timer registers accessible */
232 t1int = rtc->msr & 0x20;
233 t1op = pit->pcdr & 0x04;
234 rtc->t1cr_omr |= 0x40; /* Latch timer1 */
235 v = rtc->t1msb << 8; /* Read timer1 */
236 v |= rtc->t1lsb; /* Read timer1 */
237 } while (t1int != (rtc->msr & 0x20) ||
238 t1op != (pit->pcdr & 0x04) ||
243 if (!t1op) /* If in second half cycle.. */
245 v /= 8; /* Convert ticks to microseconds */
247 v += 10000; /* Int pending, + 10ms */
254 * Looks like op is non-zero for setting the clock, and zero for
257 * struct hwclk_time {
258 * unsigned sec; 0..59
259 * unsigned min; 0..59
260 * unsigned hour; 0..23
261 * unsigned day; 1..31
262 * unsigned mon; 0..11
263 * unsigned year; 00...
264 * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
268 int bvme6000_hwclk(int op, struct rtc_time *t)
270 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
271 unsigned char msr = rtc->msr & 0xc0;
273 rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
277 rtc->t0cr_rtmr = t->tm_year%4;
279 rtc->bcd_sec = bin2bcd(t->tm_sec);
280 rtc->bcd_min = bin2bcd(t->tm_min);
281 rtc->bcd_hr = bin2bcd(t->tm_hour);
282 rtc->bcd_dom = bin2bcd(t->tm_mday);
283 rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
284 rtc->bcd_year = bin2bcd(t->tm_year%100);
286 rtc->bcd_dow = bin2bcd(t->tm_wday+1);
287 rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
292 t->tm_sec = bcd2bin(rtc->bcd_sec);
293 t->tm_min = bcd2bin(rtc->bcd_min);
294 t->tm_hour = bcd2bin(rtc->bcd_hr);
295 t->tm_mday = bcd2bin(rtc->bcd_dom);
296 t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
297 t->tm_year = bcd2bin(rtc->bcd_year);
300 t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
301 } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
310 * Set the minutes and seconds from seconds value 'nowtime'. Fail if
311 * clock is out by > 30 minutes. Logic lifted from atari code.
312 * Algorithm is to wait for the 10ms register to change, and then to
313 * wait a short while, and then set it.
316 int bvme6000_set_clock_mmss (unsigned long nowtime)
319 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
320 unsigned char rtc_minutes, rtc_tenms;
321 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
322 unsigned char msr = rtc->msr & 0xc0;
326 rtc->msr = 0; /* Ensure clock accessible */
327 rtc_minutes = bcd2bin (rtc->bcd_min);
329 if ((rtc_minutes < real_minutes
330 ? real_minutes - rtc_minutes
331 : rtc_minutes - real_minutes) < 30)
333 local_irq_save(flags);
334 rtc_tenms = rtc->bcd_tenms;
335 while (rtc_tenms == rtc->bcd_tenms)
337 for (i = 0; i < 1000; i++)
339 rtc->bcd_min = bin2bcd(real_minutes);
340 rtc->bcd_sec = bin2bcd(real_seconds);
341 local_irq_restore(flags);