2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
17 * Derived from book3s_interrupts.S, which is:
18 * Copyright SUSE Linux Products GmbH 2009
20 * Authors: Alexander Graf <agraf@suse.de>
23 #include <asm/ppc_asm.h>
24 #include <asm/kvm_asm.h>
27 #include <asm/asm-offsets.h>
28 #include <asm/exception-64s.h>
29 #include <asm/ppc-opcode.h>
30 #include <asm/asm-compat.h>
31 #include <asm/feature-fixups.h>
33 /*****************************************************************************
35 * Guest entry / exit code that is in kernel module memory (vmalloc) *
37 ****************************************************************************/
42 _GLOBAL(__kvmppc_vcore_entry)
44 /* Write correct stack frame */
46 std r0,PPC_LR_STKOFF(r1)
48 /* Save host state to the stack */
49 stdu r1, -SWITCH_FRAME_SIZE(r1)
51 /* Save non-volatile registers (r14 - r31) and CR */
58 std r3, HSTATE_DSCR(r13)
63 std r3, HSTATE_DABR(r13)
64 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
66 /* Save host PMU registers */
68 /* Work around P8 PMAE bug */
72 mtspr SPRN_MMCR2, r3 /* freeze all counters using MMCR2 */
74 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
76 sldi r3, r3, 31 /* MMCR0_FC (freeze counters) bit */
77 mfspr r7, SPRN_MMCR0 /* save MMCR0 */
78 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */
80 /* Clear MMCRA in order to disable SDAR updates */
84 lbz r5, PACA_PMCINUSE(r13) /* is the host using the PMU? */
86 beq 31f /* skip if not */
90 std r7, HSTATE_MMCR0(r13)
91 std r5, HSTATE_MMCR1(r13)
92 std r6, HSTATE_MMCRA(r13)
93 std r9, HSTATE_SIAR(r13)
94 std r10, HSTATE_SDAR(r13)
97 std r8, HSTATE_MMCR2(r13)
98 std r9, HSTATE_SIER(r13)
99 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
106 stw r3, HSTATE_PMC1(r13)
107 stw r5, HSTATE_PMC2(r13)
108 stw r6, HSTATE_PMC3(r13)
109 stw r7, HSTATE_PMC4(r13)
110 stw r8, HSTATE_PMC5(r13)
111 stw r9, HSTATE_PMC6(r13)
115 * Put whatever is in the decrementer into the
116 * hypervisor decrementer.
119 ld r5, HSTATE_KVM_VCORE(r13)
121 ld r9, KVM_HOST_LPCR(r6)
122 andis. r9, r9, LPCR_LD@h
123 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
127 /* On POWER9, don't sign-extend if host LPCR[LD] bit is set */
129 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
131 32: mtspr SPRN_HDEC,r8
133 std r8,HSTATE_DECEXP(r13)
135 /* Jump to partition switch code */
136 bl kvmppc_hv_entry_trampoline
140 * We return here in virtual mode after the guest exits
141 * with something that we can't handle in real mode.
142 * Interrupts are still hard-disabled.
146 * Register usage at this point:
150 * R3 = trap number on this thread
151 * R12 = exit handler id
155 /* Restore non-volatile host registers (r14 - r31) and CR */
160 addi r1, r1, SWITCH_FRAME_SIZE
161 ld r0, PPC_LR_STKOFF(r1)