1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx AXI/PLB softcore and window Watchdog Timer
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11 - Srinivas Neeli <srinivas.neeli@amd.com>
14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter.
15 WDT uses a dual-expiration architecture. After one expiration of
16 the timeout interval, an interrupt is generated and the WDT state
17 bit is set to one in the status register. If the state bit is not
18 cleared (by writing a one to the state bit) before the next
19 expiration of the timeout interval, a WDT reset is generated.
22 - $ref: watchdog.yaml#
27 - xlnx,xps-timebase-wdt-1.01.a
28 - xlnx,xps-timebase-wdt-1.00.a
37 description: Frequency of clock in Hz
40 $ref: /schemas/types.yaml#/definitions/uint32
41 description: Watchdog timeout interval
46 $ref: /schemas/types.yaml#/definitions/uint32
48 description: If watchdog is configured as enable once,
49 then the watchdog cannot be disabled after
56 unevaluatedProperties: false
61 compatible = "xlnx,xps-timebase-wdt-1.00.a";
62 reg = <0x40100000 0x1000>;
63 clock-frequency = <50000000>;
65 xlnx,wdt-enable-once = <0x0>;
66 xlnx,wdt-interval = <0x1b>;