1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek Otto watchdog timer
10 - Sander Vanheule <sander@svanheule.net>
13 The timer has two timeout phases. Both phases have a maximum duration of 32
14 prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The
15 minimum duration of each phase is one tick. Each phase can trigger an
16 interrupt, although the phase 2 interrupt will occur with the system reset.
17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
18 - Phase 2: Starts after phase 1 has timed out, and only serves to give the
19 system some time to clean up, or notify others that it's going to reset.
20 During this phase, pinging the WDT has no effect, and a reset is
21 unavoidable, unless the WDT is disabled.
24 - $ref: watchdog.yaml#
42 - description: interrupt specifier for pretimeout
43 - description: interrupt specifier for timeout
51 $ref: /schemas/types.yaml#/definitions/string
53 Specify how the system is reset after a timeout. Defaults to "cpu" if
56 - description: Reset the entire chip
59 Reset the CPU and IPsec engine, but leave other peripherals untouched
62 Reset the execution pointer, but don't actually reset any hardware
72 unevaluatedProperties: false
76 watchdog: watchdog@3150 {
77 compatible = "realtek,rtl8380-wdt";
80 realtek,reset-mode = "soc";
82 clocks = <&lxbus_clock>;
85 interrupt-parent = <&rtlintc>;
86 interrupt-names = "phase1", "phase2";
87 interrupts = <19>, <18>;