1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
10 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,rk3228-tsadc
17 - rockchip,rk3288-tsadc
18 - rockchip,rk3328-tsadc
19 - rockchip,rk3368-tsadc
20 - rockchip,rk3399-tsadc
21 - rockchip,rk3568-tsadc
22 - rockchip,rk3588-tsadc
23 - rockchip,rv1108-tsadc
51 "#thermal-sensor-cells":
55 description: The phandle of the syscon node for the general register file.
56 $ref: /schemas/types.yaml#/definitions/phandle
58 rockchip,hw-tshut-temp:
59 description: The hardware-controlled shutdown temperature value.
60 $ref: /schemas/types.yaml#/definitions/uint32
62 rockchip,hw-tshut-mode:
63 description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
64 $ref: /schemas/types.yaml#/definitions/uint32
67 rockchip,hw-tshut-polarity:
68 description: The hardware-controlled active polarity 0:LOW 1:HIGH.
69 $ref: /schemas/types.yaml#/definitions/uint32
79 - "#thermal-sensor-cells"
81 additionalProperties: false
85 #include <dt-bindings/interrupt-controller/arm-gic.h>
86 #include <dt-bindings/clock/rk3288-cru.h>
88 tsadc: tsadc@ff280000 {
89 compatible = "rockchip,rk3288-tsadc";
90 reg = <0xff280000 0x100>;
91 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
92 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
93 clock-names = "tsadc", "apb_pclk";
94 resets = <&cru SRST_TSADC>;
95 reset-names = "tsadc-apb";
96 #thermal-sensor-cells = <1>;
97 rockchip,hw-tshut-temp = <95000>;
98 rockchip,hw-tshut-mode = <0>;
99 rockchip,hw-tshut-polarity = <0>;