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[releases.git] / bindings / thermal / mediatek,lvts-thermal.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
8
9 maintainers:
10   - Balsam CHIHI <bchihi@baylibre.com>
11
12 description: |
13   LVTS is a thermal management architecture composed of three subsystems,
14   a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
15   a Converter - Low Voltage Thermal Sensor converter (LVTS), and
16   a Digital controller (LVTS_CTRL).
17
18 properties:
19   compatible:
20     enum:
21       - mediatek,mt7988-lvts-ap
22       - mediatek,mt8192-lvts-ap
23       - mediatek,mt8192-lvts-mcu
24       - mediatek,mt8195-lvts-ap
25       - mediatek,mt8195-lvts-mcu
26
27   reg:
28     maxItems: 1
29
30   interrupts:
31     maxItems: 1
32
33   clocks:
34     maxItems: 1
35
36   resets:
37     maxItems: 1
38     description: LVTS reset for clearing temporary data on AP/MCU.
39
40   nvmem-cells:
41     minItems: 1
42     items:
43       - description: Calibration eFuse data 1 for LVTS
44       - description: Calibration eFuse data 2 for LVTS
45
46   nvmem-cell-names:
47     minItems: 1
48     items:
49       - const: lvts-calib-data-1
50       - const: lvts-calib-data-2
51
52   "#thermal-sensor-cells":
53     const: 1
54
55 allOf:
56   - $ref: thermal-sensor.yaml#
57
58   - if:
59       properties:
60         compatible:
61           contains:
62             enum:
63               - mediatek,mt8192-lvts-ap
64               - mediatek,mt8192-lvts-mcu
65     then:
66       properties:
67         nvmem-cells:
68           maxItems: 1
69
70         nvmem-cell-names:
71           maxItems: 1
72
73   - if:
74       properties:
75         compatible:
76           contains:
77             enum:
78               - mediatek,mt8195-lvts-ap
79               - mediatek,mt8195-lvts-mcu
80     then:
81       properties:
82         nvmem-cells:
83           minItems: 2
84
85         nvmem-cell-names:
86           minItems: 2
87
88 required:
89   - compatible
90   - reg
91   - interrupts
92   - clocks
93   - resets
94   - nvmem-cells
95   - nvmem-cell-names
96   - "#thermal-sensor-cells"
97
98 additionalProperties: false
99
100 examples:
101   - |
102     #include <dt-bindings/interrupt-controller/arm-gic.h>
103     #include <dt-bindings/clock/mt8195-clk.h>
104     #include <dt-bindings/reset/mt8195-resets.h>
105     #include <dt-bindings/thermal/mediatek,lvts-thermal.h>
106
107     soc {
108       #address-cells = <2>;
109       #size-cells = <2>;
110
111       lvts_mcu: thermal-sensor@11278000 {
112         compatible = "mediatek,mt8195-lvts-mcu";
113         reg = <0 0x11278000 0 0x1000>;
114         interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
115         clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
116         resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
117         nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
118         nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
119         #thermal-sensor-cells = <1>;
120       };
121     };
122
123     thermal_zones: thermal-zones {
124       cpu0-thermal {
125         polling-delay = <1000>;
126         polling-delay-passive = <250>;
127         thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
128
129         trips {
130           cpu0_alert: trip-alert {
131             temperature = <85000>;
132             hysteresis = <2000>;
133             type = "passive";
134           };
135
136           cpu0_crit: trip-crit {
137             temperature = <100000>;
138             hysteresis = <2000>;
139             type = "critical";
140           };
141         };
142       };
143     };