1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Low Power SPI (LPSPI) for i.MX
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: /schemas/spi/spi-controller.yaml#
25 - const: fsl,imx7ulp-spi
34 - description: SoC SPI per clock
35 - description: SoC SPI ipg clock
44 - description: TX DMA Channel
45 - description: RX DMA Channel
52 fsl,spi-only-use-cs1-sel:
54 spi common code does not support use of CS signals discontinuously.
55 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
56 this property to re-config the chipselect value in the LPSPI driver.
61 number of chip selects.
76 unevaluatedProperties: false
80 #include <dt-bindings/clock/imx7ulp-clock.h>
81 #include <dt-bindings/interrupt-controller/arm-gic.h>
84 compatible = "fsl,imx7ulp-spi";
85 reg = <0x40290000 0x10000>;
86 interrupt-parent = <&intc>;
87 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
88 clocks = <&clks IMX7ULP_CLK_LPSPI2>,
89 <&clks IMX7ULP_CLK_DUMMY>;
90 clock-names = "per", "ipg";
92 fsl,spi-only-use-cs1-sel;