1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spi/rockchip-sfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Serial Flash Controller (SFC)
10 - Heiko Stuebner <heiko@sntech.de>
11 - Chris Morgan <macromorgan@hotmail.com>
14 - $ref: spi-controller.yaml#
20 The rockchip sfc controller is a standalone IP with version register,
21 and the driver can handle all the feature difference inside the IP
22 depending on the version register.
32 - description: Bus Clock
33 - description: Module Clock
44 description: Disable DMA and utilize FIFO mode only
50 additionalProperties: true
64 unevaluatedProperties: false
68 #include <dt-bindings/clock/px30-cru.h>
69 #include <dt-bindings/interrupt-controller/arm-gic.h>
70 #include <dt-bindings/power/px30-power.h>
73 compatible = "rockchip,sfc";
74 reg = <0xff3a0000 0x4000>;
75 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
76 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
77 clock-names = "clk_sfc", "hclk_sfc";
78 pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
79 pinctrl-names = "default";
80 power-domains = <&power PX30_PD_MMC_NAND>;
85 compatible = "jedec,spi-nor";
87 spi-max-frequency = <108000000>;
88 spi-rx-bus-width = <2>;
89 spi-tx-bus-width = <2>;