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[releases.git] / bindings / soc / socionext / socionext,uniphier-perictrl.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Socionext UniPhier peripheral block controller
8
9 maintainers:
10   - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
11
12 description: |+
13   Peripheral block implemented on Socionext UniPhier SoCs is an integrated
14   component of the peripherals including UART, I2C/FI2C, and SCSSI.
15   Peripheral block controller is a logic to control the component.
16
17 properties:
18   compatible:
19     items:
20       - enum:
21           - socionext,uniphier-ld4-perictrl
22           - socionext,uniphier-pro4-perictrl
23           - socionext,uniphier-pro5-perictrl
24           - socionext,uniphier-pxs2-perictrl
25           - socionext,uniphier-sld8-perictrl
26           - socionext,uniphier-ld11-perictrl
27           - socionext,uniphier-ld20-perictrl
28           - socionext,uniphier-pxs3-perictrl
29           - socionext,uniphier-nx1-perictrl
30       - const: simple-mfd
31       - const: syscon
32
33   reg:
34     maxItems: 1
35
36   clock-controller:
37     $ref: /schemas/clock/socionext,uniphier-clock.yaml#
38
39   reset-controller:
40     $ref: /schemas/reset/socionext,uniphier-reset.yaml#
41
42 required:
43   - compatible
44   - reg
45
46 additionalProperties: false
47
48 examples:
49   - |
50     syscon@59820000 {
51         compatible = "socionext,uniphier-ld20-perictrl",
52                      "simple-mfd", "syscon";
53         reg = <0x59820000 0x200>;
54
55         clock-controller {
56             compatible = "socionext,uniphier-ld20-peri-clock";
57             #clock-cells = <1>;
58         };
59
60         reset-controller {
61             compatible = "socionext,uniphier-ld20-peri-reset";
62             #reset-cells = <1>;
63         };
64     };