1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18 All the pin controller nodes should be represented in the aliases node using
19 the following format 'pinctrl{n}' where n is a unique number for the alias.
21 The controller supports three types of interrupts::
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
28 - External wake-up interrupts - direct (capable of waking up the system, see
29 interrupts property in every bank of pin controller with external wake-up
30 interrupt controller - samsung,pinctrl-gpio-bank.yaml).
34 pattern: "^pinctrl(@.*)?"
38 - google,gs101-pinctrl
39 - samsung,s3c2412-pinctrl
40 - samsung,s3c2416-pinctrl
41 - samsung,s3c2440-pinctrl
42 - samsung,s3c2450-pinctrl
43 - samsung,s3c64xx-pinctrl
44 - samsung,s5pv210-pinctrl
45 - samsung,exynos3250-pinctrl
46 - samsung,exynos4210-pinctrl
47 - samsung,exynos4x12-pinctrl
48 - samsung,exynos5250-pinctrl
49 - samsung,exynos5260-pinctrl
50 - samsung,exynos5410-pinctrl
51 - samsung,exynos5420-pinctrl
52 - samsung,exynos5433-pinctrl
53 - samsung,exynos7-pinctrl
54 - samsung,exynos7885-pinctrl
55 - samsung,exynos850-pinctrl
56 - samsung,exynosautov9-pinctrl
57 - samsung,exynosautov920-pinctrl
62 Required for GPIO banks supporting external GPIO interrupts.
70 Second base address of the pin controller if the specific registers of
71 the pin controller are separated into the different base address.
72 Only certain banks of certain pin controller might need it.
76 wakeup-interrupt-controller:
77 $ref: samsung,pinctrl-wakeup-interrupt.yaml
80 "^[a-z]+[0-9]*-gpio-bank$":
82 Pin banks of the controller are represented by child nodes of the
83 controller node. Bank name is taken from name of the node.
84 $ref: samsung,pinctrl-gpio-bank.yaml
88 - $ref: samsung,pinctrl-pins-cfg.yaml
94 $ref: samsung,pinctrl-pins-cfg.yaml
96 additionalProperties: false
98 "^(initial|sleep)-state$":
100 additionalProperties: false
103 "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":
104 $ref: samsung,pinctrl-pins-cfg.yaml
108 description: See samsung,pinctrl-pins-cfg.yaml
109 $ref: /schemas/types.yaml#/definitions/string-array
115 unevaluatedProperties: false
122 - $ref: pinctrl.yaml#
127 const: samsung,exynos5433-pinctrl
139 additionalProperties: false
144 compatible = "samsung,s3c64xx-pinctrl";
145 reg = <0x7f008000 0x1000>;
146 interrupt-parent = <&vic1>;
149 wakeup-interrupt-controller {
150 compatible = "samsung,s3c64xx-wakeup-eint";
151 interrupts-extended = <&vic0 0>,
157 /* Pin bank with external GPIO or muxed external wake-up interrupts */
161 interrupt-controller;
162 #interrupt-cells = <2>;
168 samsung,pins = "gpa-0", "gpa-1";
169 samsung,pin-function = <2>;
170 samsung,pin-pud = <0>;
177 #include <dt-bindings/interrupt-controller/arm-gic.h>
180 compatible = "samsung,exynos4210-pinctrl";
181 reg = <0x11400000 0x1000>;
182 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&sleep0>;
187 /* Pin bank with external GPIO or muxed external wake-up interrupts */
191 interrupt-controller;
192 #interrupt-cells = <2>;
198 samsung,pins = "gpa0-0", "gpa0-1";
199 samsung,pin-function = <2>;
200 samsung,pin-pud = <0>;
201 samsung,pin-drv = <0>;
206 sleep0: sleep-state {
208 samsung,pins = "gpa0-0";
209 samsung,pin-con-pdn = <2>;
210 samsung,pin-pud-pdn = <0>;
214 samsung,pins = "gpa0-1";
215 samsung,pin-con-pdn = <0>;
216 samsung,pin-pud-pdn = <0>;
224 #include <dt-bindings/interrupt-controller/arm-gic.h>
227 compatible = "samsung,exynos4210-pinctrl";
228 reg = <0x11000000 0x1000>;
229 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
231 wakeup-interrupt-controller {
232 compatible = "samsung,exynos4210-wakeup-eint";
233 interrupt-parent = <&gic>;
234 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
237 /* Pin bank with external GPIO or muxed external wake-up interrupts */
241 interrupt-controller;
242 #interrupt-cells = <2>;
245 /* Pin bank without external interrupts */
251 /* Pin bank with external direct wake-up interrupts */
256 interrupt-controller;
257 interrupt-parent = <&gic>;
258 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
259 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
260 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
266 #interrupt-cells = <2>;
272 samsung,pins = "gpk0-0";
273 samsung,pin-function = <2>;
274 samsung,pin-pud = <0>;
275 samsung,pin-drv = <3>;
278 sd4-bus-width8-pins {
280 samsung,pins = "gpk0-3", "gpk0-4",
282 samsung,pin-function = <3>;
283 samsung,pin-pud = <3>;
284 samsung,pin-drv = <3>;
288 samsung,pins = "gpk1-3", "gpk1-4",
290 samsung,pin-function = <4>;
291 samsung,pin-pud = <3>;
292 samsung,pin-drv = <3>;
299 samsung,pins = "gpx3-3";
300 samsung,pin-function = <1>;
301 samsung,pin-pud = <0>;
302 samsung,pin-drv = <0>;
303 samsung,pin-val = <0>;
308 #include <dt-bindings/interrupt-controller/arm-gic.h>
311 compatible = "samsung,exynos5433-pinctrl";
312 reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&initial_alive>;
317 wakeup-interrupt-controller {
318 compatible = "samsung,exynos5433-wakeup-eint",
319 "samsung,exynos7-wakeup-eint";
320 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
323 /* Pin bank with external direct wake-up interrupts */
328 interrupt-controller;
329 interrupt-parent = <&gic>;
330 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
337 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
338 #interrupt-cells = <2>;
344 samsung,pins = "gpf1-3";
345 samsung,pin-function = <0xf>;
350 initial_alive: initial-state {
352 samsung,pins = "gpa0-0";
353 samsung,pin-function = <0>;
354 samsung,pin-pud = <1>;
355 samsung,pin-drv = <0>;
363 #include <dt-bindings/interrupt-controller/arm-gic.h>
366 compatible = "samsung,exynos5433-pinctrl";
367 reg = <0x114b0000 0x1000>;
368 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
369 power-domains = <&pd_aud>;
371 /* Pin bank with external GPIO or muxed external wake-up interrupts */
375 interrupt-controller;
376 #interrupt-cells = <2>;
382 samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
383 "gpz0-4", "gpz0-5", "gpz0-6";
384 samsung,pin-function = <2>;
385 samsung,pin-pud = <0>;
386 samsung,pin-drv = <0>;