1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A2 combined Pin and GPIO controller
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
17 Each port features up to 8 pins, each of them configurable for GPIO function
18 (port mode) or in alternate function mode.
19 Up to 8 different alternate function modes exist for each single pin.
23 const: renesas,r7s9210-pinctrl # RZ/A2M
33 The first cell contains the global GPIO port index, constructed using the
34 RZA2_PIN() helper macro in r7s9210-pinctrl.h.
35 E.g. "RZA2_PIN(PORT6, 0)" for P6_0.
44 - $ref: pincfg-node.yaml#
45 - $ref: pinmux-node.yaml#
48 The child nodes of the pin controller designate pins to be used for
49 specific peripheral functions or as GPIO.
51 A pin multiplexing sub-node describes how to configure a set of
52 (or a single) pin in some desired alternate function mode.
53 The values for the pinmux properties are a combination of port name,
54 pin number and the desired function index. Use the RZA2_PINMUX macro
55 located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
57 For assigning GPIO pins, use the macro RZA2_PIN also in
58 to express the desired port pin.
63 Values are constructed from GPIO port number, pin number, and
64 alternate function configuration number using the RZA2_PINMUX()
65 helper macro in r7s9210-pinctrl.h.
70 additionalProperties: false
84 #include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
85 pinctrl: pinctrl@fcffe000 {
86 compatible = "renesas,r7s9210-pinctrl";
87 reg = <0xfcffe000 0x1000>;
91 gpio-ranges = <&pinctrl 0 0 176>;
95 pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
96 <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */