bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SM8350 SoC LPASS LPI TLMM
   8
   9 maintainers:
  10   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  11   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
  12
  13 description:
  14   Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
  15   (LPASS) Low Power Island (LPI) of Qualcomm SM8350 SoC.
  16
  17 properties:
  18   compatible:
  19     const: qcom,sm8350-lpass-lpi-pinctrl
  20
  21   reg:
  22     items:
  23       - description: LPASS LPI TLMM Control and Status registers
  24       - description: LPASS LPI MCC registers
  25
  26   clocks:
  27     items:
  28       - description: LPASS Core voting clock
  29       - description: LPASS Audio voting clock
  30
  31   clock-names:
  32     items:
  33       - const: core
  34       - const: audio
  35
  36 patternProperties:
  37   "-state$":
  38     oneOf:
  39       - $ref: "#/$defs/qcom-sm8350-lpass-state"
  40       - patternProperties:
  41           "-pins$":
  42             $ref: "#/$defs/qcom-sm8350-lpass-state"
  43         additionalProperties: false
  44
  45 $defs:
  46   qcom-sm8350-lpass-state:
  47     type: object
  48     description:
  49       Pinctrl node's client devices use subnodes for desired pin configuration.
  50       Client device subnodes use below standard properties.
  51     $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
  52     unevaluatedProperties: false
  53
  54     properties:
  55       pins:
  56         description:
  57           List of gpio pins affected by the properties specified in this
  58           subnode.
  59         items:
  60           pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
  61
  62       function:
  63         enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
  64                 dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b,
  65                 ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk,
  66                 i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
  67                 i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws, i2s4_clk,
  68                 i2s4_data, i2s4_ws, slimbus_clk, slimbus_data, swr_rx_clk,
  69                 swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk,
  70                 wsa_swr_data, wsa2_swr_clk, wsa2_swr_data ]
  71         description:
  72           Specify the alternative function to be configured for the specified
  73           pins.
  74
  75 allOf:
  76   - $ref: qcom,lpass-lpi-common.yaml#
  77
  78 required:
  79   - compatible
  80   - reg
  81   - clocks
  82   - clock-names
  83
  84 unevaluatedProperties: false
  85
  86 examples:
  87   - |
  88     #include <dt-bindings/sound/qcom,q6afe.h>
  89
  90     lpass_tlmm: pinctrl@33c0000 {
  91         compatible = "qcom,sm8350-lpass-lpi-pinctrl";
  92         reg = <0x033c0000 0x20000>,
  93               <0x03550000 0x10000>;
  94
  95         clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
  96                  <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
  97         clock-names = "core", "audio";
  98
  99         gpio-controller;
 100         #gpio-cells = <2>;
 101         gpio-ranges = <&lpass_tlmm 0 0 15>;
 102     };