1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
10 - Konrad Dybcio <konradybcio@kernel.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
19 const: qcom,sm6115-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
24 - description: LPASS LPI MCC registers
28 - description: LPASS Audio voting clock
37 - $ref: "#/$defs/qcom-sm6115-lpass-state"
40 $ref: "#/$defs/qcom-sm6115-lpass-state"
41 additionalProperties: false
44 qcom-sm6115-lpass-state:
47 Pinctrl node's client devices use subnodes for desired pin configuration.
48 Client device subnodes use below standard properties.
49 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
50 unevaluatedProperties: false
55 List of gpio pins affected by the properties specified in this
58 pattern: "^gpio([0-9]|1[0-8])$"
61 enum: [ dmic01_clk, dmic01_data, dmic23_clk, dmic23_data, gpio, i2s1_clk,
62 i2s1_data, i2s1_ws, i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk,
63 i2s3_data, i2s3_ws, qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws,
64 swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_mclk ]
66 Specify the alternative function to be configured for the specified
71 - $ref: qcom,lpass-lpi-common.yaml#
79 unevaluatedProperties: false
83 #include <dt-bindings/sound/qcom,q6afe.h>
85 lpass_tlmm: pinctrl@a7c0000 {
86 compatible = "qcom,sm6115-lpass-lpi-pinctrl";
87 reg = <0x0a7c0000 0x20000>,
89 clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
90 clock-names = "audio";
94 gpio-ranges = <&lpass_tlmm 0 0 19>;