bindings/pinctrl/qcom,msm8976-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm MSM8976 TLMM pin controller
   8
   9 maintainers:
  10   - Bjorn Andersson <andersson@kernel.org>
  11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  12
  13 description:
  14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8976-pinctrl
  19
  20   reg:
  21     maxItems: 1
  22
  23   interrupts:
  24     maxItems: 1
  25
  26   gpio-reserved-ranges:
  27     minItems: 1
  28     maxItems: 73
  29
  30   gpio-line-names:
  31     maxItems: 145
  32
  33 patternProperties:
  34   "-state$":
  35     oneOf:
  36       - $ref: "#/$defs/qcom-msm8976-tlmm-state"
  37       - patternProperties:
  38           "-pins$":
  39             $ref: "#/$defs/qcom-msm8976-tlmm-state"
  40         additionalProperties: false
  41
  42 $defs:
  43   qcom-msm8976-tlmm-state:
  44     type: object
  45     description:
  46       Desired pin configuration for a device or its specific state (like sleep
  47       or active).
  48     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  49     unevaluatedProperties: false
  50
  51     properties:
  52       pins:
  53         description:
  54           List of gpio pins affected by the properties specified in this state.
  55         items:
  56           oneOf:
  57             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$"
  58             - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
  59                       qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk,
  60                       sdc2_clk, sdc2_cmd, sdc2_data ]
  61         minItems: 1
  62         maxItems: 36
  63
  64       function:
  65         description:
  66           Specify the alternative function to be configured for the specified
  67           pins.
  68
  69         enum: [ gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,
  70                 blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,
  71                 qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,
  72                 blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,
  73                 qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,
  74                 qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,
  75                 blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,
  76                 sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,
  77                 blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,
  78                 uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,
  79                 uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present,
  80                 ts_xvdd, mipi_dsi0, us_euro, ts_resout, ts_sample,
  81                 sec_mi2s_mclk_b, pri_mi2s, codec_reset, cdc_pdm0, us_emitter,
  82                 pri_mi2s_mclk_b, pri_mi2s_mclk_c, lpass_slimbus,
  83                 lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2,
  84                 wcss_bt, sdc3, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,
  85                 wcss_fm, key_volp, key_snapshot, key_focus, key_home, pwr_down,
  86                 dmic0_clk, hdmi_int, dmic0_data, wsa_vi, wsa_en, blsp_spi8,
  87                 wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1,
  88                 gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ]
  89
  90     required:
  91       - pins
  92
  93 allOf:
  94   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
  95
  96 required:
  97   - compatible
  98   - reg
  99
 100 unevaluatedProperties: false
 101
 102 examples:
 103   - |
 104     #include <dt-bindings/interrupt-controller/arm-gic.h>
 105
 106     tlmm: pinctrl@1000000 {
 107         compatible = "qcom,msm8976-pinctrl";
 108         reg = <0x1000000 0x300000>;
 109         #gpio-cells = <2>;
 110         gpio-controller;
 111         gpio-ranges = <&tlmm 0 0 145>;
 112         interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 113         interrupt-controller;
 114         #interrupt-cells = <2>;
 115
 116         blsp1-uart2-active-state {
 117             pins = "gpio4", "gpio5", "gpio6", "gpio7";
 118             function = "blsp_uart2";
 119             drive-strength = <2>;
 120             bias-disable;
 121         };
 122     };