bindings/pinctrl/qcom,msm8660-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm MSM8660 TLMM pin controller
   8
   9 maintainers:
  10   - Bjorn Andersson <andersson@kernel.org>
  11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  12
  13 description:
  14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8660-pinctrl
  19
  20   reg:
  21     maxItems: 1
  22
  23   interrupts:
  24     maxItems: 1
  25
  26   gpio-reserved-ranges:
  27     minItems: 1
  28     maxItems: 86
  29
  30   gpio-line-names:
  31     maxItems: 173
  32
  33 patternProperties:
  34   "-state$":
  35     oneOf:
  36       - $ref: "#/$defs/qcom-msm8660-tlmm-state"
  37       - patternProperties:
  38           "-pins$":
  39             $ref: "#/$defs/qcom-msm8660-tlmm-state"
  40         additionalProperties: false
  41
  42 $defs:
  43   qcom-msm8660-tlmm-state:
  44     type: object
  45     description:
  46       Pinctrl node's client devices use subnodes for desired pin configuration.
  47       Client device subnodes use below standard properties.
  48     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  49     unevaluatedProperties: false
  50
  51     properties:
  52       pins:
  53         description:
  54           List of gpio pins affected by the properties specified in this
  55           subnode.
  56         items:
  57           oneOf:
  58             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"
  59             - enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]
  60         minItems: 1
  61         maxItems: 36
  62
  63       function:
  64         description:
  65           Specify the alternative function to be configured for the specified
  66           pins.
  67
  68         enum: [ gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a,
  69                 gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n,
  70                 gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2,
  71                 gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, gsbi2_spi_cs3_n, gsbi3,
  72                 gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n, gsbi4,
  73                 gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12,
  74                 hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,
  75                 sdc5, tsif1, tsif2, usb_fs1, usb_fs1_oe_n, usb_fs2,
  76                 usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]
  77
  78     required:
  79       - pins
  80
  81 allOf:
  82   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
  83
  84 required:
  85   - compatible
  86   - reg
  87
  88 unevaluatedProperties: false
  89
  90 examples:
  91   - |
  92     #include <dt-bindings/interrupt-controller/arm-gic.h>
  93     tlmm: pinctrl@800000 {
  94         compatible = "qcom,msm8660-pinctrl";
  95         reg = <0x800000 0x4000>;
  96
  97         gpio-controller;
  98         gpio-ranges = <&tlmm 0 0 173>;
  99         #gpio-cells = <2>;
 100         interrupts = <0 16 0x4>;
 101         interrupt-controller;
 102         #interrupt-cells = <2>;
 103
 104         gsbi3-i2c-state {
 105             pins = "gpio43", "gpio44";
 106             function = "gsbi3";
 107             drive-strength = <8>;
 108             bias-disable;
 109         };
 110     };