1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra234 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - description: pinmux registers
19 "^pinmux(-[a-z0-9-]+)?$":
24 $ref: nvidia,tegra-pinmux-common.yaml
25 # We would typically use unevaluatedProperties here but that has the
26 # downside that all the properties in the common bindings become valid
27 # for all chip generations. In this case, however, we want the per-SoC
28 # bindings to be able to override which of the common properties are
29 # allowed, since not all pinmux generations support the same sets of
30 # properties. This way, the common bindings define the format of the
31 # properties but the per-SoC bindings define which of them apply to a
33 additionalProperties: false
36 enum: [ gp, uartc, i2c8, spi2, i2c2, can1, can0, rsvd0, eth0, eth2,
37 eth1, dp, eth3, i2c4, i2c7, i2c9, eqos, pe2, pe1, pe0, pe3,
38 pe4, pe5, pe6, pe7, pe8, pe9, pe10, qspi0, qspi1, qpsi,
39 sdmmc1, sce, soc, gpio, hdmi, ufs0, spi3, spi1, uartb, uarte,
40 usb, extperiph2, extperiph1, i2c3, vi0, i2c5, uarta, uartd,
41 i2c1, i2s4, i2s6, aud, spi5, touch, uartj, rsvd1, wdt, tsc,
42 dmic3, led, vi0_alt, i2s5, nv, extperiph3, extperiph4, spi4,
43 ccla, i2s1, i2s2, i2s3, i2s8, rsvd2, dmic5, dca, displayb,
44 displaya, vi1, dcb, dmic1, dmic4, i2s7, dmic2, dspk0, rsvd3,
45 tsc_alt, istctrl, vi1_alt, dspk1, igpu ]
47 # out of the common properties, only these are allowed for Tegra234
52 nvidia,enable-input: true
53 nvidia,open-drain: true
55 nvidia,drive-type: true
65 additionalProperties: true