bindings/pinctrl/nvidia,tegra194-pinmux.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: NVIDIA Tegra194 Pinmux Controller
   8
   9 maintainers:
  10   - Thierry Reding <thierry.reding@gmail.com>
  11   - Jon Hunter <jonathanh@nvidia.com>
  12
  13 properties:
  14   compatible:
  15     enum:
  16       - nvidia,tegra194-pinmux
  17       - nvidia,tegra194-pinmux-aon
  18
  19   reg:
  20     items:
  21       - description: pinmux registers
  22
  23 patternProperties:
  24   "^pinmux(-[a-z0-9-_]+)?$":
  25     type: object
  26
  27     # pin groups
  28     additionalProperties:
  29       $ref: nvidia,tegra-pinmux-common.yaml
  30       unevaluatedProperties: false
  31       properties:
  32         nvidia,function:
  33           enum: [ aud, can0, can1, ccla, dca, dcb, dgpu, directdc, directdc1,
  34                   displaya, displayb, dmic1, dmic2, dmic3, dmic4, dmic5, dp,
  35                   dspk0, dspk1, eqos, extperiph1, extperiph2, extperiph3,
  36                   extperiph4, gp, gpio, hdmi, i2c1, i2c2, i2c3, i2c5, i2c8,
  37                   i2s1, i2s2, i2s3, i2s4, i2s5, i2s6, igpu, iqc1, iqc2, mipi,
  38                   nv, pe0, pe1, pe2, pe3, pe4, pe5, qspi, qspi0, qspi1, rsvd0,
  39                   rsvd1, rsvd2, rsvd3, sata, sce, sdmmc1, sdmmc3, sdmmc4, slvs,
  40                   soc, spdif, spi1, spi2, spi3, touch, uarta, uartb, uartc,
  41                   uartd, uarte, uartg, ufs0, usb, vgp1, vgp2, vgp3, vgp4, vgp5,
  42                   vgp6, wdt ]
  43
  44         nvidia,pull: true
  45         nvidia,tristate: true
  46         nvidia,schmitt: true
  47         nvidia,enable-input: true
  48         nvidia,open-drain: true
  49         nvidia,lock: true
  50         nvidia,drive-type: true
  51         nvidia,io-hv: true
  52
  53       required:
  54         - nvidia,pins
  55
  56 additionalProperties: false
  57
  58 allOf:
  59   - if:
  60       properties:
  61         compatible:
  62           const: nvidia,tegra194-pinmux
  63     then:
  64       patternProperties:
  65         "^pinmux(-[a-z0-9-_]+)?$":
  66           type: object
  67           additionalProperties:
  68             properties:
  69               nvidia,pins:
  70                 description: An array of strings. Each string contains the name
  71                   of a pin or group. Valid values for these names are listed
  72                   below.
  73
  74                   Note that the pex_l5_clkreq_n_pgg0 and pex_l5_rst_n_pgg1 pins
  75                   are part of PCIE C5 power partition. Client devices must
  76                   enable this partition before accessing the configuration for
  77                   these pins.
  78                 items:
  79                   enum: [ dap6_sclk_pa0, dap6_dout_pa1, dap6_din_pa2,
  80                           dap6_fs_pa3, dap4_sclk_pa4, dap4_dout_pa5,
  81                           dap4_din_pa6, dap4_fs_pa7, cpu_pwr_req_0_pb0,
  82                           cpu_pwr_req_1_pb1, qspi0_sck_pc0, qspi0_cs_n_pc1,
  83                           qspi0_io0_pc2, qspi0_io1_pc3, qspi0_io2_pc4,
  84                           qspi0_io3_pc5, qspi1_sck_pc6, qspi1_cs_n_pc7,
  85                           qspi1_io0_pd0, qspi1_io1_pd1, qspi1_io2_pd2,
  86                           qspi1_io3_pd3, eqos_txc_pe0, eqos_td0_pe1,
  87                           eqos_td1_pe2, eqos_td2_pe3, eqos_td3_pe4,
  88                           eqos_tx_ctl_pe5, eqos_rd0_pe6, eqos_rd1_pe7,
  89                           eqos_rd2_pf0, eqos_rd3_pf1, eqos_rx_ctl_pf2,
  90                           eqos_rxc_pf3, eqos_sma_mdio_pf4, eqos_sma_mdc_pf5,
  91                           soc_gpio00_pg0, soc_gpio01_pg1, soc_gpio02_pg2,
  92                           soc_gpio03_pg3, soc_gpio08_pg4, soc_gpio09_pg5,
  93                           soc_gpio10_pg6, soc_gpio11_pg7, soc_gpio12_ph0,
  94                           soc_gpio13_ph1, soc_gpio14_ph2, uart4_tx_ph3,
  95                           uart4_rx_ph4, uart4_rts_ph5, uart4_cts_ph6,
  96                           dap2_sclk_ph7, dap2_dout_pi0, dap2_din_pi1,
  97                           dap2_fs_pi2, gen1_i2c_scl_pi3, gen1_i2c_sda_pi4,
  98                           sdmmc1_clk_pj0, sdmmc1_cmd_pj1, sdmmc1_dat0_pj2,
  99                           sdmmc1_dat1_pj3, sdmmc1_dat2_pj4, sdmmc1_dat3_pj5,
 100                           pex_l0_clkreq_n_pk0, pex_l0_rst_n_pk1,
 101                           pex_l1_clkreq_n_pk2, pex_l1_rst_n_pk3,
 102                           pex_l2_clkreq_n_pk4, pex_l2_rst_n_pk5,
 103                           pex_l3_clkreq_n_pk6, pex_l3_rst_n_pk7,
 104                           pex_l4_clkreq_n_pl0, pex_l4_rst_n_pl1,
 105                           pex_wake_n_pl2, sata_dev_slp_pl3, dp_aux_ch0_hpd_pm0,
 106                           dp_aux_ch1_hpd_pm1, dp_aux_ch2_hpd_pm2,
 107                           dp_aux_ch3_hpd_pm3, hdmi_cec_pm4, soc_gpio50_pm5,
 108                           soc_gpio51_pm6, soc_gpio52_pm7, soc_gpio53_pn0,
 109                           soc_gpio54_pn1, soc_gpio55_pn2, sdmmc3_clk_po0,
 110                           sdmmc3_cmd_po1, sdmmc3_dat0_po2, sdmmc3_dat1_po3,
 111                           sdmmc3_dat2_po4, sdmmc3_dat3_po5, extperiph1_clk_pp0,
 112                           extperiph2_clk_pp1, cam_i2c_scl_pp2, cam_i2c_sda_pp3,
 113                           soc_gpio04_pp4, soc_gpio05_pp5, soc_gpio06_pp6,
 114                           soc_gpio07_pp7, soc_gpio20_pq0, soc_gpio21_pq1,
 115                           soc_gpio22_pq2, soc_gpio23_pq3, soc_gpio40_pq4,
 116                           soc_gpio41_pq5, soc_gpio42_pq6, soc_gpio43_pq7,
 117                           soc_gpio44_pr0, soc_gpio45_pr1, uart1_tx_pr2,
 118                           uart1_rx_pr3, uart1_rts_pr4, uart1_cts_pr5,
 119                           dap1_sclk_ps0, dap1_dout_ps1, dap1_din_ps2,
 120                           dap1_fs_ps3, aud_mclk_ps4, soc_gpio30_ps5,
 121                           soc_gpio31_ps6, soc_gpio32_ps7, soc_gpio33_pt0,
 122                           dap3_sclk_pt1, dap3_dout_pt2, dap3_din_pt3,
 123                           dap3_fs_pt4, dap5_sclk_pt5, dap5_dout_pt6,
 124                           dap5_din_pt7, dap5_fs_pu0, directdc1_clk_pv0,
 125                           directdc1_in_pv1, directdc1_out0_pv2,
 126                           directdc1_out1_pv3, directdc1_out2_pv4,
 127                           directdc1_out3_pv5, directdc1_out4_pv6,
 128                           directdc1_out5_pv7, directdc1_out6_pw0,
 129                           directdc1_out7_pw1, gpu_pwr_req_px0, cv_pwr_req_px1,
 130                           gp_pwm2_px2, gp_pwm3_px3, uart2_tx_px4, uart2_rx_px5,
 131                           uart2_rts_px6, uart2_cts_px7, spi3_sck_py0,
 132                           spi3_miso_py1, spi3_mosi_py2, spi3_cs0_py3,
 133                           spi3_cs1_py4, uart5_tx_py5, uart5_rx_py6,
 134                           uart5_rts_py7, uart5_cts_pz0, usb_vbus_en0_pz1,
 135                           usb_vbus_en1_pz2, spi1_sck_pz3, spi1_miso_pz4,
 136                           spi1_mosi_pz5, spi1_cs0_pz6, spi1_cs1_pz7,
 137                           ufs0_ref_clk_pff0, ufs0_rst_pff1,
 138                           pex_l5_clkreq_n_pgg0, pex_l5_rst_n_pgg1,
 139                           directdc_comp, sdmmc4_clk, sdmmc4_cmd, sdmmc4_dqs,
 140                           sdmmc4_dat7, sdmmc4_dat6, sdmmc4_dat5, sdmmc4_dat4,
 141                           sdmmc4_dat3, sdmmc4_dat2, sdmmc4_dat1, sdmmc4_dat0,
 142                           sdmmc1_comp, sdmmc1_hv_trim, sdmmc3_comp,
 143                           sdmmc3_hv_trim, eqos_comp, qspi_comp,
 144                           # drive groups
 145                           drive_soc_gpio33_pt0, drive_soc_gpio32_ps7,
 146                           drive_soc_gpio31_ps6, drive_soc_gpio30_ps5,
 147                           drive_aud_mclk_ps4, drive_dap1_fs_ps3,
 148                           drive_dap1_din_ps2, drive_dap1_dout_ps1,
 149                           drive_dap1_sclk_ps0, drive_dap3_fs_pt4,
 150                           drive_dap3_din_pt3, drive_dap3_dout_pt2,
 151                           drive_dap3_sclk_pt1, drive_dap5_fs_pu0,
 152                           drive_dap5_din_pt7, drive_dap5_dout_pt6,
 153                           drive_dap5_sclk_pt5, drive_dap6_fs_pa3,
 154                           drive_dap6_din_pa2, drive_dap6_dout_pa1,
 155                           drive_dap6_sclk_pa0, drive_dap4_fs_pa7,
 156                           drive_dap4_din_pa6, drive_dap4_dout_pa5,
 157                           drive_dap4_sclk_pa4, drive_extperiph2_clk_pp1,
 158                           drive_extperiph1_clk_pp0, drive_cam_i2c_sda_pp3,
 159                           drive_cam_i2c_scl_pp2, drive_soc_gpio40_pq4,
 160                           drive_soc_gpio41_pq5, drive_soc_gpio42_pq6,
 161                           drive_soc_gpio43_pq7, drive_soc_gpio44_pr0,
 162                           drive_soc_gpio45_pr1, drive_soc_gpio20_pq0,
 163                           drive_soc_gpio21_pq1, drive_soc_gpio22_pq2,
 164                           drive_soc_gpio23_pq3, drive_soc_gpio04_pp4,
 165                           drive_soc_gpio05_pp5, drive_soc_gpio06_pp6,
 166                           drive_soc_gpio07_pp7, drive_uart1_cts_pr5,
 167                           drive_uart1_rts_pr4, drive_uart1_rx_pr3,
 168                           drive_uart1_tx_pr2, drive_dap2_din_pi1,
 169                           drive_dap2_dout_pi0, drive_dap2_fs_pi2,
 170                           drive_dap2_sclk_ph7, drive_uart4_cts_ph6,
 171                           drive_uart4_rts_ph5, drive_uart4_rx_ph4,
 172                           drive_uart4_tx_ph3, drive_soc_gpio03_pg3,
 173                           drive_soc_gpio02_pg2, drive_soc_gpio01_pg1,
 174                           drive_soc_gpio00_pg0, drive_gen1_i2c_scl_pi3,
 175                           drive_gen1_i2c_sda_pi4, drive_soc_gpio08_pg4,
 176                           drive_soc_gpio09_pg5, drive_soc_gpio10_pg6,
 177                           drive_soc_gpio11_pg7, drive_soc_gpio12_ph0,
 178                           drive_soc_gpio13_ph1, drive_soc_gpio14_ph2,
 179                           drive_soc_gpio50_pm5, drive_soc_gpio51_pm6,
 180                           drive_soc_gpio52_pm7, drive_soc_gpio53_pn0,
 181                           drive_soc_gpio54_pn1, drive_soc_gpio55_pn2,
 182                           drive_dp_aux_ch0_hpd_pm0, drive_dp_aux_ch1_hpd_pm1,
 183                           drive_dp_aux_ch2_hpd_pm2, drive_dp_aux_ch3_hpd_pm3,
 184                           drive_hdmi_cec_pm4, drive_pex_l2_clkreq_n_pk4,
 185                           drive_pex_wake_n_pl2, drive_pex_l1_clkreq_n_pk2,
 186                           drive_pex_l1_rst_n_pk3, drive_pex_l0_clkreq_n_pk0,
 187                           drive_pex_l0_rst_n_pk1, drive_pex_l2_rst_n_pk5,
 188                           drive_pex_l3_clkreq_n_pk6, drive_pex_l3_rst_n_pk7,
 189                           drive_pex_l4_clkreq_n_pl0, drive_pex_l4_rst_n_pl1,
 190                           drive_sata_dev_slp_pl3, drive_pex_l5_clkreq_n_pgg0,
 191                           drive_pex_l5_rst_n_pgg1, drive_cpu_pwr_req_1_pb1,
 192                           drive_cpu_pwr_req_0_pb0, drive_sdmmc1_clk_pj0,
 193                           drive_sdmmc1_cmd_pj1, drive_sdmmc1_dat3_pj5,
 194                           drive_sdmmc1_dat2_pj4, drive_sdmmc1_dat1_pj3,
 195                           drive_sdmmc1_dat0_pj2, drive_sdmmc3_dat3_po5,
 196                           drive_sdmmc3_dat2_po4, drive_sdmmc3_dat1_po3,
 197                           drive_sdmmc3_dat0_po2, drive_sdmmc3_cmd_po1,
 198                           drive_sdmmc3_clk_po0, drive_gpu_pwr_req_px0,
 199                           drive_spi3_miso_py1, drive_spi1_cs0_pz6,
 200                           drive_spi3_cs0_py3, drive_spi1_miso_pz4,
 201                           drive_spi3_cs1_py4, drive_gp_pwm3_px3,
 202                           drive_gp_pwm2_px2, drive_spi1_sck_pz3,
 203                           drive_spi3_sck_py0, drive_spi1_cs1_pz7,
 204                           drive_spi1_mosi_pz5, drive_spi3_mosi_py2,
 205                           drive_cv_pwr_req_px1, drive_uart2_tx_px4,
 206                           drive_uart2_rx_px5, drive_uart2_rts_px6,
 207                           drive_uart2_cts_px7, drive_uart5_rx_py6,
 208                           drive_uart5_tx_py5, drive_uart5_rts_py7,
 209                           drive_uart5_cts_pz0, drive_usb_vbus_en0_pz1,
 210                           drive_usb_vbus_en1_pz2, drive_ufs0_rst_pff1,
 211                           drive_ufs0_ref_clk_pff0 ]
 212
 213   - if:
 214       properties:
 215         compatible:
 216           const: nvidia,tegra194-pinmux-aon
 217     then:
 218       patternProperties:
 219         "^pinmux(-[a-z0-9-_]+)?$":
 220           type: object
 221           additionalProperties:
 222             properties:
 223               nvidia,pins:
 224                 items:
 225                   enum: [ can1_dout_paa0, can1_din_paa1, can0_dout_paa2,
 226                           can0_din_paa3, can0_stb_paa4, can0_en_paa5,
 227                           can0_wake_paa6, can0_err_paa7, can1_stb_pbb0,
 228                           can1_en_pbb1, can1_wake_pbb2, can1_err_pbb3,
 229                           spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
 230                           spi2_cs0_pcc3, touch_clk_pcc4, uart3_tx_pcc5,
 231                           uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
 232                           gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2,
 233                           safe_state_pee0, vcomp_alert_pee1,
 234                           ao_retention_n_pee2, batt_oc_pee3, power_on_pee4,
 235                           pwr_i2c_scl_pee5, pwr_i2c_sda_pee6, sys_reset_n,
 236                           shutdown_n, pmu_int_n, soc_pwr_req, clk_32k_in,
 237                           # drive groups
 238                           drive_shutdown_n, drive_pmu_int_n,
 239                           drive_safe_state_pee0, drive_vcomp_alert_pee1,
 240                           drive_soc_pwr_req, drive_batt_oc_pee3,
 241                           drive_clk_32k_in, drive_power_on_pee4,
 242                           drive_pwr_i2c_scl_pee5, drive_pwr_i2c_sda_pee6,
 243                           drive_ao_retention_n_pee2, drive_touch_clk_pcc4,
 244                           drive_uart3_rx_pcc6, drive_uart3_tx_pcc5,
 245                           drive_gen8_i2c_sda_pdd2, drive_gen8_i2c_scl_pdd1,
 246                           drive_spi2_mosi_pcc2, drive_gen2_i2c_scl_pcc7,
 247                           drive_spi2_cs0_pcc3, drive_gen2_i2c_sda_pdd0,
 248                           drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
 249                           drive_can1_dout_paa0, drive_can1_din_paa1,
 250                           drive_can0_dout_paa2, drive_can0_din_paa3,
 251                           drive_can0_stb_paa4, drive_can0_en_paa5,
 252                           drive_can0_wake_paa6, drive_can0_err_paa7,
 253                           drive_can1_stb_pbb0, drive_can1_en_pbb1,
 254                           drive_can1_wake_pbb2, drive_can1_err_pbb3 ]
 255
 256 required:
 257   - compatible
 258   - reg
 259
 260 examples:
 261   - |
 262     #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 263
 264     pinmux@2430000 {
 265         compatible = "nvidia,tegra194-pinmux";
 266         reg = <0x2430000 0x17000>;
 267
 268         pinctrl-names = "pex_rst";
 269         pinctrl-0 = <&pex_rst_c5_out_state>;
 270
 271         pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
 272             pex_rst {
 273                 nvidia,pins = "pex_l5_rst_n_pgg1";
 274                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 275                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 276                 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
 277                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 278                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 279             };
 280         };
 281     };
 282 ...