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[releases.git] / bindings / mmc / rockchip-dw-mshc.yaml
1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Rockchip designware mobile storage host controller
8
9 description:
10   Rockchip uses the Synopsys designware mobile storage host controller
11   to interface a SoC with storage medium such as eMMC or SD/MMC cards.
12   This file documents the combined properties for the core Synopsys dw mshc
13   controller that are not already included in the synopsys-dw-mshc-common.yaml
14   file and the Rockchip specific extensions.
15
16 allOf:
17   - $ref: synopsys-dw-mshc-common.yaml#
18
19 maintainers:
20   - Heiko Stuebner <heiko@sntech.de>
21
22 # Everything else is described in the common file
23 properties:
24   compatible:
25     oneOf:
26       # for Rockchip RK2928 and before RK3288
27       - const: rockchip,rk2928-dw-mshc
28       # for Rockchip RK3288
29       - const: rockchip,rk3288-dw-mshc
30       - items:
31           - enum:
32               - rockchip,px30-dw-mshc
33               - rockchip,rk1808-dw-mshc
34               - rockchip,rk3036-dw-mshc
35               - rockchip,rk3128-dw-mshc
36               - rockchip,rk3228-dw-mshc
37               - rockchip,rk3308-dw-mshc
38               - rockchip,rk3328-dw-mshc
39               - rockchip,rk3368-dw-mshc
40               - rockchip,rk3399-dw-mshc
41               - rockchip,rk3568-dw-mshc
42               - rockchip,rk3588-dw-mshc
43               - rockchip,rv1108-dw-mshc
44               - rockchip,rv1126-dw-mshc
45           - const: rockchip,rk3288-dw-mshc
46
47   reg:
48     maxItems: 1
49
50   interrupts:
51     maxItems: 1
52
53   clocks:
54     minItems: 2
55     maxItems: 4
56     description:
57       Handle to "biu" and "ciu" clocks for the bus interface unit clock and
58       the card interface unit clock. If "ciu-drive" and "ciu-sample" are
59       specified in clock-names, it should also contain
60       handles to these clocks.
61
62   clock-names:
63     minItems: 2
64     items:
65       - const: biu
66       - const: ciu
67       - const: ciu-drive
68       - const: ciu-sample
69     description:
70       Apart from the clock-names "biu" and "ciu" two more clocks
71       "ciu-drive" and "ciu-sample" are supported. They are used
72       to control the clock phases, "ciu-sample" is required for tuning
73       high speed modes.
74
75   power-domains:
76     maxItems: 1
77
78   rockchip,default-sample-phase:
79     $ref: /schemas/types.yaml#/definitions/uint32
80     minimum: 0
81     maximum: 360
82     default: 0
83     description:
84       The default phase to set "ciu-sample" at probing,
85       low speeds or in case where all phases work at tuning time.
86       If not specified 0 deg will be used.
87
88   rockchip,desired-num-phases:
89     $ref: /schemas/types.yaml#/definitions/uint32
90     minimum: 0
91     maximum: 360
92     default: 360
93     description:
94       The desired number of times that the host execute tuning when needed.
95       If not specified, the host will do tuning for 360 times,
96       namely tuning for each degree.
97
98 required:
99   - compatible
100   - reg
101   - interrupts
102   - clocks
103   - clock-names
104
105 unevaluatedProperties: false
106
107 examples:
108   - |
109     #include <dt-bindings/clock/rk3288-cru.h>
110     #include <dt-bindings/interrupt-controller/arm-gic.h>
111     #include <dt-bindings/interrupt-controller/irq.h>
112     sdmmc: mmc@ff0c0000 {
113       compatible = "rockchip,rk3288-dw-mshc";
114       reg = <0xff0c0000 0x4000>;
115       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
116       clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
117                <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
118       clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
119       resets = <&cru SRST_MMC0>;
120       reset-names = "reset";
121       fifo-depth = <0x100>;
122       max-frequency = <150000000>;
123     };
124
125 ...