1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
28 - const: fsl,mpc5200b-i2c
29 - const: fsl,mpc5200-i2c
38 fsl,preserve-clocking:
39 $ref: /schemas/types.yaml#/definitions/flag
41 if defined, the clock settings from the bootloader are
42 preserved (not touched)
45 $ref: /schemas/types.yaml#/definitions/uint32
48 I2C bus timeout in microseconds
50 fsl,i2c-erratum-a004447:
51 $ref: /schemas/types.yaml#/definitions/flag
53 Indicates the presence of QorIQ erratum A-004447, which
54 says that the standard i2c recovery scheme mechanism does
55 not work and an alternate implementation is needed.
62 unevaluatedProperties: false
66 /* MPC5121 based board */
70 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
72 interrupts = <11 0x8>;
73 interrupt-parent = <&ipic>;
74 clock-frequency = <100000>;
78 /* MPC5200B based board */
82 compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c";
84 interrupts = <2 15 0>;
85 interrupt-parent = <&mpc5200_pic>;
86 fsl,preserve-clocking;
90 /* MPC8544 base board */
94 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
97 interrupt-parent = <&mpic>;
98 clock-frequency = <400000>;
99 i2c-scl-clk-low-timeout-us = <10000>;