bindings/display/rockchip/rockchip-vop.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip SoC display controller (VOP)
   8
   9 description:
  10   VOP (Video Output Processor) is the display controller for the Rockchip
  11   series of SoCs which transfers the image data from a video memory
  12   buffer to an external LCD interface.
  13
  14 maintainers:
  15   - Sandy Huang <hjc@rock-chips.com>
  16   - Heiko Stuebner <heiko@sntech.de>
  17
  18 properties:
  19   compatible:
  20     enum:
  21       - rockchip,px30-vop-big
  22       - rockchip,px30-vop-lit
  23       - rockchip,rk3036-vop
  24       - rockchip,rk3066-vop
  25       - rockchip,rk3126-vop
  26       - rockchip,rk3188-vop
  27       - rockchip,rk3228-vop
  28       - rockchip,rk3288-vop
  29       - rockchip,rk3328-vop
  30       - rockchip,rk3366-vop
  31       - rockchip,rk3368-vop
  32       - rockchip,rk3399-vop-big
  33       - rockchip,rk3399-vop-lit
  34       - rockchip,rv1126-vop
  35
  36   reg:
  37     minItems: 1
  38     items:
  39       - description:
  40           Must contain one entry corresponding to the base address and length
  41           of the register space.
  42       - description:
  43           Can optionally contain a second entry corresponding to
  44           the CRTC gamma LUT address.
  45
  46   interrupts:
  47     maxItems: 1
  48     description:
  49       The VOP interrupt is shared by several interrupt sources, such as
  50       frame start (VSYNC), line flag and other status interrupts.
  51
  52   clocks:
  53     items:
  54       - description: Clock for ddr buffer transfer.
  55       - description: Pixel clock.
  56       - description: Clock for the ahb bus to R/W the phy regs.
  57
  58   clock-names:
  59     items:
  60       - const: aclk_vop
  61       - const: dclk_vop
  62       - const: hclk_vop
  63
  64   resets:
  65     maxItems: 3
  66
  67   reset-names:
  68     items:
  69       - const: axi
  70       - const: ahb
  71       - const: dclk
  72
  73   port:
  74     $ref: /schemas/graph.yaml#/properties/port
  75
  76   assigned-clocks:
  77     maxItems: 2
  78
  79   assigned-clock-rates:
  80     maxItems: 2
  81
  82   iommus:
  83     maxItems: 1
  84
  85   power-domains:
  86     maxItems: 1
  87
  88 required:
  89   - compatible
  90   - reg
  91   - interrupts
  92   - clocks
  93   - clock-names
  94   - resets
  95   - reset-names
  96   - port
  97
  98 additionalProperties: false
  99
 100 examples:
 101   - |
 102     #include <dt-bindings/clock/rk3288-cru.h>
 103     #include <dt-bindings/interrupt-controller/arm-gic.h>
 104     #include <dt-bindings/power/rk3288-power.h>
 105     vopb: vopb@ff930000 {
 106       compatible = "rockchip,rk3288-vop";
 107       reg = <0xff930000 0x19c>,
 108             <0xff931000 0x1000>;
 109       interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 110       clocks = <&cru ACLK_VOP0>,
 111                <&cru DCLK_VOP0>,
 112                <&cru HCLK_VOP0>;
 113       clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
 114       power-domains = <&power RK3288_PD_VIO>;
 115       resets = <&cru SRST_LCDC1_AXI>,
 116                <&cru SRST_LCDC1_AHB>,
 117                <&cru SRST_LCDC1_DCLK>;
 118       reset-names = "axi", "ahb", "dclk";
 119       iommus = <&vopb_mmu>;
 120       vopb_out: port {
 121         #address-cells = <1>;
 122         #size-cells = <0>;
 123         vopb_out_edp: endpoint@0 {
 124           reg = <0>;
 125           remote-endpoint = <&edp_in_vopb>;
 126         };
 127         vopb_out_hdmi: endpoint@1 {
 128           reg = <1>;
 129           remote-endpoint = <&hdmi_in_vopb>;
 130         };
 131       };
 132     };