1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on SM6115
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,sm6115-dpu
20 - description: MDP register set
21 - description: VBIF register set
30 - description: Display AXI
31 - description: Display AHB
32 - description: Display core
33 - description: Display lut
34 - description: Display rotator
35 - description: Display vsync
53 unevaluatedProperties: false
57 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
58 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
59 #include <dt-bindings/power/qcom-rpmpd.h>
61 display-controller@5e01000 {
62 compatible = "qcom,sm6115-dpu";
63 reg = <0x05e01000 0x8f000>,
65 reg-names = "mdp", "vbif";
67 clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
68 <&dispcc DISP_CC_MDSS_AHB_CLK>,
69 <&dispcc DISP_CC_MDSS_MDP_CLK>,
70 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
71 <&dispcc DISP_CC_MDSS_ROT_CLK>,
72 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
73 clock-names = "bus", "iface", "core", "lut", "rot", "vsync";
75 operating-points-v2 = <&mdp_opp_table>;
76 power-domains = <&rpmpd SM6115_VDDCX>;
78 interrupt-parent = <&mdss>;
88 remote-endpoint = <&dsi0_in>;