1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on SC7280
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,sc7280-dpu
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for vbif register set
30 - description: Display hf axi clock
31 - description: Display sf axi clock
32 - description: Display ahb clock
33 - description: Display lut clock
34 - description: Display core clock
35 - description: Display vsync clock
53 unevaluatedProperties: false
57 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
58 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
59 #include <dt-bindings/power/qcom-rpmpd.h>
61 display-controller@ae01000 {
62 compatible = "qcom,sc7280-dpu";
63 reg = <0x0ae01000 0x8f000>,
66 reg-names = "mdp", "vbif";
68 clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
69 <&gcc GCC_DISP_SF_AXI_CLK>,
70 <&dispcc DISP_CC_MDSS_AHB_CLK>,
71 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
72 <&dispcc DISP_CC_MDSS_MDP_CLK>,
73 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
81 interrupt-parent = <&mdss>;
83 power-domains = <&rpmhpd SC7280_CX>;
84 operating-points-v2 = <&mdp_opp_table>;
93 remote-endpoint = <&dsi0_in>;
100 remote-endpoint = <&edp_in>;