1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on SC7180
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
12 $ref: /schemas/display/msm/dpu-common.yaml#
24 - description: Address offset and size for mdp register set
25 - description: Address offset and size for vbif register set
35 - description: Display hf axi clock
36 - description: Display ahb clock
37 - description: Display rotator clock
38 - description: Display lut clock
39 - description: Display core clock
40 - description: Display vsync clock
41 - description: Display core throttle clock
61 unevaluatedProperties: false
81 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
82 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
83 #include <dt-bindings/power/qcom-rpmpd.h>
85 display-controller@ae01000 {
86 compatible = "qcom,sc7180-dpu";
87 reg = <0x0ae01000 0x8f000>,
90 reg-names = "mdp", "vbif";
92 clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
93 <&dispcc DISP_CC_MDSS_AHB_CLK>,
94 <&dispcc DISP_CC_MDSS_ROT_CLK>,
95 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
96 <&dispcc DISP_CC_MDSS_MDP_CLK>,
97 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
98 clock-names = "bus", "iface", "rot", "lut", "core",
101 interrupt-parent = <&mdss>;
103 power-domains = <&rpmhpd SC7180_CX>;
104 operating-points-v2 = <&mdp_opp_table>;
107 #address-cells = <1>;
113 remote-endpoint = <&dsi0_in>;
120 remote-endpoint = <&dp_in>;