1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on QCM2290
10 - Loic Poulain <loic.poulain@linaro.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,qcm2290-dpu
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for vbif register set
30 - description: Display AXI clock from gcc
31 - description: Display AHB clock from dispcc
32 - description: Display core clock from dispcc
33 - description: Display lut clock from dispcc
34 - description: Display vsync clock from dispcc
51 unevaluatedProperties: false
55 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
56 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
57 #include <dt-bindings/power/qcom-rpmpd.h>
59 display-controller@5e01000 {
60 compatible = "qcom,qcm2290-dpu";
61 reg = <0x05e01000 0x8f000>,
63 reg-names = "mdp", "vbif";
65 clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
66 <&dispcc DISP_CC_MDSS_AHB_CLK>,
67 <&dispcc DISP_CC_MDSS_MDP_CLK>,
68 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
69 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
70 clock-names = "bus", "iface", "core", "lut", "vsync";
72 operating-points-v2 = <&mdp_opp_table>;
73 power-domains = <&rpmpd QCM2290_VDDCX>;
75 interrupt-parent = <&mdss>;
85 remote-endpoint = <&dsi0_in>;