1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on MSM8998
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,msm8998-dpu
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for regdma register set
22 - description: Address offset and size for vbif register set
23 - description: Address offset and size for non-realtime vbif register set
34 - description: Display ahb clock
35 - description: Display axi clock
36 - description: Display mem-noc clock
37 - description: Display core clock
38 - description: Display vsync clock
55 unevaluatedProperties: false
59 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
60 #include <dt-bindings/power/qcom-rpmpd.h>
62 display-controller@c901000 {
63 compatible = "qcom,msm8998-dpu";
64 reg = <0x0c901000 0x8f000>,
68 reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
70 clocks = <&mmcc MDSS_AHB_CLK>,
74 <&mmcc MDSS_VSYNC_CLK>;
75 clock-names = "iface", "bus", "mnoc", "core", "vsync";
77 interrupt-parent = <&mdss>;
79 operating-points-v2 = <&mdp_opp_table>;
80 power-domains = <&rpmpd MSM8998_VDDMX>;
89 remote-endpoint = <&dsi0_in>;
96 remote-endpoint = <&dsi1_in>;