1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
15 The i.MX8qm/qxp LDB is controlled by Control and Status Registers(CSR) module.
16 The CSR module, as a system controller, contains the LDB's configuration
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
20 format and can map the input to VESA or JEIDA standards. The two channels
21 cannot be used simultaneously, that is to say, the user should pick one of
22 them to use. Two LDB channels from two LDB instances can work together in
23 LDB split mode to support a dual link LVDS display. The channel indexes
24 have to be different. Channel0 outputs odd pixels and channel1 outputs
27 For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel
28 input color format. The two channels can be used simultaneously, either
29 in dual mode or split mode. In dual mode, the two channels output identical
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
33 A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in
34 the SoC reference manuals. The pixel mapper uses logic of LDBs embedded in
35 i.MX6qdl/sx SoCs, i.e., it is essentially based on them. To keep the naming
36 consistency, this binding calls it LDB.
52 - description: pixel clock
53 - description: bypass clock
64 $ref: /schemas/types.yaml#/definitions/phandle
66 A phandle which points to companion LDB which is used in LDB split mode.
71 description: Represents a channel of LDB.
81 description: The channel index.
85 description: A phandle to the phy module representing the LVDS PHY.
92 $ref: /schemas/graph.yaml#/properties/port
93 description: Input port of the channel.
96 $ref: /schemas/graph.yaml#/properties/port
97 description: Output port of the channel.
106 additionalProperties: false
123 const: fsl,imx8qm-ldb
126 fsl,companion-ldb: false
128 additionalProperties: false
132 #include <dt-bindings/firmware/imx/rsrc.h>
134 #address-cells = <1>;
136 compatible = "fsl,imx8qxp-ldb";
137 clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
138 <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
139 clock-names = "pixel", "bypass";
140 power-domains = <&pd IMX_SC_R_LVDS_0>;
143 #address-cells = <1>;
146 phys = <&mipi_lvds_0_phy>;
147 phy-names = "lvds_phy";
152 mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {
153 remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>;
159 #address-cells = <1>;
162 phys = <&mipi_lvds_0_phy>;
163 phy-names = "lvds_phy";
168 mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {
169 remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>;