1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DWC AHCI SATA controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 This document defines device tree bindings for the generic Synopsys DWC
14 implementation of the AHCI SATA controller.
26 - $ref: snps,dwc-ahci-common.yaml#
31 - description: Synopsys AHCI SATA-compatible devices
33 - description: SPEAr1340 AHCI SATA device
34 const: snps,spear-ahci
37 "^sata-port@[0-9a-e]$":
38 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
40 unevaluatedProperties: false
47 unevaluatedProperties: false
51 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 #include <dt-bindings/ata/ahci.h>
55 compatible = "snps,dwc-ahci";
56 reg = <0x122F0000 0x1ff>;
60 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
62 clocks = <&clock1>, <&clock2>;
63 clock-names = "aclk", "ref";
66 phy-names = "sata-phy";
68 ports-implemented = <0x1>;
73 hba-port-cap = <HBA_PORT_FBSCP>;
75 snps,tx-ts-max = <512>;
76 snps,rx-ts-max = <512>;