1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
5 $id: http://devicetree.org/schemas/spi/atmel,at91rm9200-spi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel SPI device
11 - Tudor Ambarus <tudor.ambarus@linaro.org>
14 - $ref: spi-controller.yaml#
19 - const: atmel,at91rm9200-spi
21 - const: microchip,sam9x60-spi
22 - const: atmel,at91rm9200-spi
24 - const: microchip,sam9x7-spi
25 - const: microchip,sam9x60-spi
26 - const: atmel,at91rm9200-spi
43 - description: TX DMA Channel
44 - description: RX DMA Channel
52 $ref: /schemas/types.yaml#/definitions/uint32
54 Maximum number of data the RX and TX FIFOs can store for FIFO
55 capable SPI controllers.
65 unevaluatedProperties: false
69 #include <dt-bindings/gpio/gpio.h>
70 #include <dt-bindings/interrupt-controller/irq.h>
73 compatible = "atmel,at91rm9200-spi";
74 reg = <0xfffcc000 0x4000>;
75 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
79 clock-names = "spi_clk";
80 cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
81 atmel,fifo-size = <32>;
84 compatible = "mmc-spi-slot";
86 gpios = <&pioC 4 GPIO_ACTIVE_HIGH>; /* CD */
87 spi-max-frequency = <25000000>;