1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_BINFMT_FLAT if !MMU
6 select ARCH_HAS_CURRENT_STACK_POINTER
7 select ARCH_HAS_DEBUG_VM_PGTABLE
8 select ARCH_HAS_DMA_PREP_COHERENT if MMU
9 select ARCH_HAS_GCOV_PROFILE_ALL
11 select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
12 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
13 select ARCH_HAS_DMA_SET_UNCACHED if MMU
14 select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
15 select ARCH_HAS_STRNLEN_USER
16 select ARCH_USE_MEMTEST
17 select ARCH_USE_QUEUED_RWLOCKS
18 select ARCH_USE_QUEUED_SPINLOCKS
19 select ARCH_WANT_FRAME_POINTERS
20 select ARCH_WANT_IPC_PARSE_VERSION
21 select BUILDTIME_TABLE_SORT
22 select CLONE_BACKWARDS
24 select DMA_NONCOHERENT_MMAP if MMU
25 select GENERIC_ATOMIC64
26 select GENERIC_IRQ_SHOW
27 select GENERIC_LIB_CMPDI2
28 select GENERIC_LIB_MULDI3
29 select GENERIC_LIB_UCMPDI2
30 select GENERIC_PCI_IOMAP
31 select GENERIC_SCHED_CLOCK
32 select HAVE_ARCH_AUDITSYSCALL
33 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
34 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
35 select HAVE_ARCH_KCSAN
36 select HAVE_ARCH_SECCOMP_FILTER
37 select HAVE_ARCH_TRACEHOOK
38 select HAVE_CONTEXT_TRACKING_USER
39 select HAVE_DEBUG_KMEMLEAK
40 select HAVE_DMA_CONTIGUOUS
41 select HAVE_EXIT_THREAD
42 select HAVE_FUNCTION_TRACER
43 select HAVE_GCC_PLUGINS if GCC_VERSION >= 120000
44 select HAVE_HW_BREAKPOINT if PERF_EVENTS
45 select HAVE_IRQ_TIME_ACCOUNTING
47 select HAVE_PERF_EVENTS
48 select HAVE_STACKPROTECTOR
49 select HAVE_SYSCALL_TRACEPOINTS
50 select HAVE_VIRT_CPU_ACCOUNTING_GEN
52 select LOCK_MM_AND_FIND_VMA
53 select MODULES_USE_ELF_RELA
54 select PERF_USE_VMALLOC
55 select TRACE_IRQFLAGS_SUPPORT
57 Xtensa processors are 32-bit RISC machines designed by Tensilica
58 primarily for embedded systems. These processors are both
59 configurable and extensible. The Linux port to the Xtensa
60 architecture supports all processor configurations and extensions,
61 with reasonable minimum requirements. The Xtensa Linux project has
62 a home page at <http://www.linux-xtensa.org/>.
64 config GENERIC_HWEIGHT
67 config ARCH_HAS_ILOG2_U32
70 config ARCH_HAS_ILOG2_U64
80 config LOCKDEP_SUPPORT
83 config STACKTRACE_SUPPORT
90 config HAVE_XTENSA_GPIO32
93 config KASAN_SHADOW_OFFSET
98 def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1)
100 config CPU_LITTLE_ENDIAN
101 def_bool !CPU_BIG_ENDIAN
103 config CC_HAVE_CALL0_ABI
104 def_bool $(success,test "$(shell,echo __XTENSA_CALL0_ABI__ | $(CC) -mabi=call0 -E -P - 2>/dev/null)" = 1)
106 menu "Processor type and features"
109 prompt "Xtensa Processor Configuration"
110 default XTENSA_VARIANT_FSF
112 config XTENSA_VARIANT_FSF
113 bool "fsf - default (not generic) configuration"
116 config XTENSA_VARIANT_DC232B
117 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
119 select HAVE_XTENSA_GPIO32
121 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
123 config XTENSA_VARIANT_DC233C
124 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
126 select HAVE_XTENSA_GPIO32
128 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
130 config XTENSA_VARIANT_CUSTOM
131 bool "Custom Xtensa processor configuration"
132 select HAVE_XTENSA_GPIO32
134 Select this variant to use a custom Xtensa processor configuration.
135 You will be prompted for a processor variant CORENAME.
138 config XTENSA_VARIANT_CUSTOM_NAME
139 string "Xtensa Processor Custom Core Variant Name"
140 depends on XTENSA_VARIANT_CUSTOM
142 Provide the name of a custom Xtensa processor variant.
143 This CORENAME selects arch/xtensa/variant/CORENAME.
144 Don't forget you have to select MMU if you have one.
146 config XTENSA_VARIANT_NAME
148 default "dc232b" if XTENSA_VARIANT_DC232B
149 default "dc233c" if XTENSA_VARIANT_DC233C
150 default "fsf" if XTENSA_VARIANT_FSF
151 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
153 config XTENSA_VARIANT_MMU
154 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
155 depends on XTENSA_VARIANT_CUSTOM
159 Build a Conventional Kernel with full MMU support,
160 ie: it supports a TLB with auto-loading, page protection.
162 config XTENSA_VARIANT_HAVE_PERF_EVENTS
163 bool "Core variant has Performance Monitor Module"
164 depends on XTENSA_VARIANT_CUSTOM
167 Enable if core variant has Performance Monitor Module with
168 External Registers Interface.
172 config XTENSA_FAKE_NMI
173 bool "Treat PMM IRQ as NMI"
174 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
177 If PMM IRQ is the only IRQ at EXCM level it is safe to
178 treat it as NMI, which improves accuracy of profiling.
180 If there are other interrupts at or above PMM IRQ priority level
181 but not above the EXCM level, PMM IRQ still may be treated as NMI,
182 but only if these IRQs are not used. There will be a build warning
183 saying that this is not safe, and a bugcheck if one of these IRQs
189 bool "Handle protection faults" if EXPERT && !MMU
192 Handle protection faults. MMU configurations must enable it.
193 noMMU configurations may disable it if used memory map never
194 generates protection faults or faults are always fatal.
198 config XTENSA_UNALIGNED_USER
199 bool "Unaligned memory access in user space"
201 The Xtensa architecture currently does not handle unaligned
202 memory accesses in hardware but through an exception handler.
203 Per default, unaligned memory accesses are disabled in user space.
205 Say Y here to enable unaligned memory access in user space.
208 bool "System Supports SMP (MX)"
209 depends on XTENSA_VARIANT_CUSTOM
212 This option is used to indicate that the system-on-a-chip (SOC)
213 supports Multiprocessing. Multiprocessor support implemented above
214 the CPU core definition and currently needs to be selected manually.
216 Multiprocessor support is implemented with external cache and
217 interrupt controllers.
219 The MX interrupt distributer adds Interprocessor Interrupts
220 and causes the IRQ numbers to be increased by 4 for devices
221 like the open cores ethernet driver and the serial interface.
223 You still have to select "Enable SMP" to enable SMP on this SOC.
226 bool "Enable Symmetric multi-processing support"
228 select GENERIC_SMP_IDLE_THREAD
230 Enabled SMP Software; allows more than one CPU/CORE
231 to be activated during startup.
235 int "Maximum number of CPUs (2-32)"
240 bool "Enable CPU hotplug support"
243 Say Y here to allow turning CPUs off and on. CPUs can be
244 controlled through /sys/devices/system/cpu.
246 Say N if you want to disable CPU hotplug.
248 config SECONDARY_RESET_VECTOR
249 bool "Secondary cores use alternative reset vector"
253 Secondary cores may be configured to use alternative reset vector,
254 or all cores may use primary reset vector.
255 Say Y here to supply handler for the alternative reset location.
257 config FAST_SYSCALL_XTENSA
258 bool "Enable fast atomic syscalls"
261 fast_syscall_xtensa is a syscall that can make atomic operations
262 on UP kernel when processor has no s32c1i support.
264 This syscall is deprecated. It may have issues when called with
265 invalid arguments. It is provided only for backwards compatibility.
266 Only enable it if your userspace software requires it.
270 config FAST_SYSCALL_SPILL_REGISTERS
271 bool "Enable spill registers syscall"
274 fast_syscall_spill_registers is a syscall that spills all active
275 register windows of a calling userspace task onto its stack.
277 This syscall is deprecated. It may have issues when called with
278 invalid arguments. It is provided only for backwards compatibility.
279 Only enable it if your userspace software requires it.
285 default KERNEL_ABI_DEFAULT
287 Select ABI for the kernel code. This ABI is independent of the
288 supported userspace ABI and any combination of the
289 kernel/userspace ABI is possible and should work.
291 In case both kernel and userspace support only call0 ABI
292 all register windows support code will be omitted from the
295 If unsure, choose the default ABI.
297 config KERNEL_ABI_DEFAULT
300 Select this option to compile kernel code with the default ABI
301 selected for the toolchain.
302 Normally cores with windowed registers option use windowed ABI and
303 cores without it use call0 ABI.
305 config KERNEL_ABI_CALL0
306 bool "Call0 ABI" if CC_HAVE_CALL0_ABI
308 Select this option to compile kernel code with call0 ABI even with
309 toolchain that defaults to windowed ABI.
310 When this option is not selected the default toolchain ABI will
311 be used for the kernel code.
315 config USER_ABI_CALL0
319 prompt "Userspace ABI"
320 default USER_ABI_DEFAULT
322 Select supported userspace ABI.
324 If unsure, choose the default ABI.
326 config USER_ABI_DEFAULT
327 bool "Default ABI only"
329 Assume default userspace ABI. For XEA2 cores it is windowed ABI.
330 call0 ABI binaries may be run on such kernel, but signal delivery
331 will not work correctly for them.
333 config USER_ABI_CALL0_ONLY
334 bool "Call0 ABI only"
335 select USER_ABI_CALL0
337 Select this option to support only call0 ABI in userspace.
338 Windowed ABI binaries will crash with a segfault caused by
339 an illegal instruction exception on the first 'entry' opcode.
341 Choose this option if you're planning to run only user code
342 built with call0 ABI.
344 config USER_ABI_CALL0_PROBE
345 bool "Support both windowed and call0 ABI by probing"
346 select USER_ABI_CALL0
348 Select this option to support both windowed and call0 userspace
349 ABIs. When enabled all processes are started with PS.WOE disabled
350 and a fast user exception handler for an illegal instruction is
351 used to turn on PS.WOE bit on the first 'entry' opcode executed by
354 This option should be enabled for the kernel that must support
355 both call0 and windowed ABIs in userspace at the same time.
357 Note that Xtensa ISA does not guarantee that entry opcode will
358 raise an illegal instruction exception on cores with XEA2 when
359 PS.WOE is disabled, check whether the target core supports it.
365 config XTENSA_CALIBRATE_CCOUNT
368 On some platforms (XT2000, for example), the CPU clock rate can
369 vary. The frequency can be determined, however, by measuring
370 against a well known, fixed frequency, such as an UART oscillator.
372 config SERIAL_CONSOLE
375 config PLATFORM_HAVE_XIP
378 menu "Platform options"
381 prompt "Xtensa System Type"
382 default XTENSA_PLATFORM_ISS
384 config XTENSA_PLATFORM_ISS
386 select XTENSA_CALIBRATE_CCOUNT
387 select SERIAL_CONSOLE
389 ISS is an acronym for Tensilica's Instruction Set Simulator.
391 config XTENSA_PLATFORM_XT2000
394 XT2000 is the name of Tensilica's feature-rich emulation platform.
395 This hardware is capable of running a full Linux distribution.
397 config XTENSA_PLATFORM_XTFPGA
399 select ETHOC if ETHERNET
400 select PLATFORM_WANT_DEFAULT_MEM if !MMU
401 select SERIAL_CONSOLE
402 select XTENSA_CALIBRATE_CCOUNT
403 select PLATFORM_HAVE_XIP
405 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
406 This hardware is capable of running a full Linux distribution.
410 config PLATFORM_NR_IRQS
412 default 3 if XTENSA_PLATFORM_XT2000
415 config XTENSA_CPU_CLOCK
416 int "CPU clock rate [MHz]"
417 depends on !XTENSA_CALIBRATE_CCOUNT
420 config GENERIC_CALIBRATE_DELAY
421 bool "Auto calibration of the BogoMIPS value"
423 The BogoMIPS value can easily be derived from the CPU frequency.
426 bool "Default bootloader kernel arguments"
429 string "Initial kernel command string"
430 depends on CMDLINE_BOOL
431 default "console=ttyS0,38400 root=/dev/ram"
433 On some architectures (EBSA110 and CATS), there is currently no way
434 for the boot loader to pass arguments to the kernel. For these
435 architectures, you should supply some command-line options at build
436 time by entering them here. As a minimum, you should specify the
437 memory size and the root device (e.g., mem=64M root=/dev/nfs).
440 bool "Flattened Device Tree support"
442 select OF_EARLY_FLATTREE
444 Include support for flattened device tree machine descriptions.
446 config BUILTIN_DTB_SOURCE
447 string "DTB to build into the kernel image"
450 config PARSE_BOOTPARAM
451 bool "Parse bootparam block"
454 Parse parameters passed to the kernel from the bootloader. It may
455 be disabled if the kernel is known to run without the bootloader.
460 prompt "Semihosting interface"
461 default XTENSA_SIMCALL_ISS
462 depends on XTENSA_PLATFORM_ISS
464 Choose semihosting interface that will be used for serial port,
465 block device and networking.
467 config XTENSA_SIMCALL_ISS
470 Use simcall instruction. simcall is only available on simulators,
471 it does nothing on hardware.
473 config XTENSA_SIMCALL_GDBIO
476 Use break instruction. It is available on real hardware when GDB
477 is attached to it via JTAG.
481 config BLK_DEV_SIMDISK
482 tristate "Host file-based simulated block device support"
484 depends on XTENSA_PLATFORM_ISS && BLOCK
486 Create block devices that map to files in the host file system.
487 Device binding to host file may be changed at runtime via proc
488 interface provided the device is not in use.
490 config BLK_DEV_SIMDISK_COUNT
491 int "Number of host file-based simulated block devices"
493 depends on BLK_DEV_SIMDISK
496 This is the default minimal number of created block devices.
497 Kernel/module parameter 'simdisk_count' may be used to change this
498 value at runtime. More file names (but no more than 10) may be
499 specified as parameters, simdisk_count grows accordingly.
501 config SIMDISK0_FILENAME
502 string "Host filename for the first simulated device"
503 depends on BLK_DEV_SIMDISK = y
506 Attach a first simdisk to a host file. Conventionally, this file
507 contains a root file system.
509 config SIMDISK1_FILENAME
510 string "Host filename for the second simulated device"
511 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
514 Another simulated disk in a host file for a buildroot-independent
518 bool "Enable XTFPGA LCD driver"
519 depends on XTENSA_PLATFORM_XTFPGA
522 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
523 progress messages there during bootup/shutdown. It may be useful
524 during board bringup.
528 config XTFPGA_LCD_BASE_ADDR
529 hex "XTFPGA LCD base address"
530 depends on XTFPGA_LCD
533 Base address of the LCD controller inside KIO region.
534 Different boards from XTFPGA family have LCD controller at different
535 addresses. Please consult prototyping user guide for your board for
536 the correct address. Wrong address here may lead to hardware lockup.
538 config XTFPGA_LCD_8BIT_ACCESS
539 bool "Use 8-bit access to XTFPGA LCD"
540 depends on XTFPGA_LCD
543 LCD may be connected with 4- or 8-bit interface, 8-bit access may
544 only be used with 8-bit interface. Please consult prototyping user
545 guide for your board for the correct interface width.
547 comment "Kernel memory layout"
549 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
550 bool "Initialize Xtensa MMU inside the Linux kernel code"
551 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
552 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
554 Earlier version initialized the MMU in the exception vector
555 before jumping to _startup in head.S and had an advantage that
556 it was possible to place a software breakpoint at 'reset' and
557 then enter your normal kernel breakpoints once the MMU was mapped
558 to the kernel mappings (0XC0000000).
560 This unfortunately won't work for U-Boot and likely also won't
561 work for using KEXEC to have a hot kernel ready for doing a
564 So now the MMU is initialized in head.S but it's necessary to
565 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
566 xt-gdb can't place a Software Breakpoint in the 0XD region prior
567 to mapping the MMU and after mapping even if the area of low memory
568 was mapped gdb wouldn't remove the breakpoint on hitting it as the
569 PC wouldn't match. Since Hardware Breakpoints are recommended for
570 Linux configurations it seems reasonable to just assume they exist
571 and leave this older mechanism for unfortunate souls that choose
572 not to follow Tensilica's recommendation.
574 Selecting this will cause U-Boot to set the KERNEL Load and Entry
575 address at 0x00003000 instead of the mapped std of 0xD0003000.
580 bool "Kernel Execute-In-Place from ROM"
581 depends on PLATFORM_HAVE_XIP
583 Execute-In-Place allows the kernel to run from non-volatile storage
584 directly addressable by the CPU, such as NOR flash. This saves RAM
585 space since the text section of the kernel is not loaded from flash
586 to RAM. Read-write sections, such as the data section and stack,
587 are still copied to RAM. The XIP kernel is not compressed since
588 it has to run directly from flash, so it will take more space to
589 store it. The flash address used to link the kernel object files,
590 and for storing it, is configuration dependent. Therefore, if you
591 say Y here, you must know the proper physical address where to
592 store the kernel image depending on your own flash memory usage.
594 Also note that the make target becomes "make xipImage" rather than
595 "make Image" or "make uImage". The final kernel binary to put in
596 ROM memory will be arch/xtensa/boot/xipImage.
600 config MEMMAP_CACHEATTR
601 hex "Cache attributes for the memory address space"
605 These cache attributes are set up for noMMU systems. Each hex digit
606 specifies cache attributes for the corresponding 512MB memory
607 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
608 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
610 Cache attribute values are specific for the MMU type.
611 For region protection MMUs:
623 3: special (c and e are illegal, f is reserved).
627 2: WB, no-write-allocate cache,
632 hex "Physical address of the KSEG mapping"
633 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
636 This is the physical address where KSEG is mapped. Please refer to
637 the chosen KSEG layout help for the required address alignment.
638 Unpacked kernel image (including vectors) must be located completely
640 Physical memory below this address is not available to linux.
642 If unsure, leave the default value here.
644 config KERNEL_VIRTUAL_ADDRESS
645 hex "Kernel virtual address"
646 depends on MMU && XIP_KERNEL
649 This is the virtual address where the XIP kernel is mapped.
650 XIP kernel may be mapped into KSEG or KIO region, virtual address
651 provided here must match kernel load address provided in
654 config KERNEL_LOAD_ADDRESS
655 hex "Kernel load address"
656 default 0x60003000 if !MMU
657 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
658 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
660 This is the address where the kernel is loaded.
661 It is virtual address for MMUv2 configurations and physical address
662 for all other configurations.
664 If unsure, leave the default value here.
667 prompt "Relocatable vectors location"
668 default XTENSA_VECTORS_IN_TEXT
670 Choose whether relocatable vectors are merged into the kernel .text
671 or placed separately at runtime. This option does not affect
672 configurations without VECBASE register where vectors are always
673 placed at their hardware-defined locations.
675 config XTENSA_VECTORS_IN_TEXT
676 bool "Merge relocatable vectors into kernel text"
679 This option puts relocatable vectors into the kernel .text section
680 with proper alignment.
681 This is a safe choice for most configurations.
683 config XTENSA_VECTORS_SEPARATE
684 bool "Put relocatable vectors at fixed address"
686 This option puts relocatable vectors at specific virtual address.
687 Vectors are merged with the .init data in the kernel image and
688 are copied into their designated location during kernel startup.
689 Use it to put vectors into IRAM or out of FLASH on kernels with
690 XIP-aware MTD support.
695 hex "Kernel vectors virtual address"
697 depends on XTENSA_VECTORS_SEPARATE
699 This is the virtual address of the (relocatable) vectors base.
700 It must be within KSEG if MMU is used.
703 hex "XIP kernel data virtual address"
704 depends on XIP_KERNEL
707 This is the virtual address where XIP kernel data is copied.
708 It must be within KSEG if MMU is used.
710 config PLATFORM_WANT_DEFAULT_MEM
713 config DEFAULT_MEM_START
715 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
716 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
719 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
720 in noMMU configurations.
722 If unsure, leave the default value here.
727 default XTENSA_KSEG_MMU_V2
729 config XTENSA_KSEG_MMU_V2
730 bool "MMUv2: 128MB cached + 128MB uncached"
732 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
733 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
735 KSEG_PADDR must be aligned to 128MB.
737 config XTENSA_KSEG_256M
738 bool "256MB cached + 256MB uncached"
739 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
741 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
742 with cache and to 0xc0000000 without cache.
743 KSEG_PADDR must be aligned to 256MB.
745 config XTENSA_KSEG_512M
746 bool "512MB cached + 512MB uncached"
747 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
749 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
750 with cache and to 0xc0000000 without cache.
751 KSEG_PADDR must be aligned to 256MB.
756 bool "High Memory Support"
760 Linux can use the full amount of RAM in the system by
761 default. However, the default MMUv2 setup only maps the
762 lowermost 128 MB of memory linearly to the areas starting
763 at 0xd0000000 (cached) and 0xd8000000 (uncached).
764 When there are more than 128 MB memory in the system not
765 all of it can be "permanently mapped" by the kernel.
766 The physical memory that's not permanently mapped is called
769 If you are compiling a kernel which will never run on a
770 machine with more than 128 MB total physical RAM, answer
775 config ARCH_FORCE_MAX_ORDER
776 int "Maximum zone order"
779 The kernel memory allocator divides physically contiguous memory
780 blocks into "zones", where each zone is a power of two number of
781 pages. This option selects the largest power of two that the kernel
782 keeps in the memory allocator. If you need to allocate very large
783 blocks of physically contiguous memory, then you may need to
786 This config option is actually maximum order plus one. For example,
787 a value of 11 means that the largest free memory block is 2^10 pages.
791 menu "Power management options"
793 config ARCH_HIBERNATION_POSSIBLE
796 source "kernel/power/Kconfig"