2 * SGI UltraViolet TLB flush routines.
4 * (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
6 * This code is released under the GNU General Public License version 2 or
9 #include <linux/seq_file.h>
10 #include <linux/proc_fs.h>
11 #include <linux/debugfs.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
16 #include <asm/mmu_context.h>
17 #include <asm/uv/uv.h>
18 #include <asm/uv/uv_mmrs.h>
19 #include <asm/uv/uv_hub.h>
20 #include <asm/uv/uv_bau.h>
24 #include <asm/irq_vectors.h>
25 #include <asm/timer.h>
27 static struct bau_operations ops;
29 static struct bau_operations uv123_bau_ops = {
30 .bau_gpa_to_offset = uv_gpa_to_offset,
31 .read_l_sw_ack = read_mmr_sw_ack,
32 .read_g_sw_ack = read_gmmr_sw_ack,
33 .write_l_sw_ack = write_mmr_sw_ack,
34 .write_g_sw_ack = write_gmmr_sw_ack,
35 .write_payload_first = write_mmr_payload_first,
36 .write_payload_last = write_mmr_payload_last,
39 static struct bau_operations uv4_bau_ops = {
40 .bau_gpa_to_offset = uv_gpa_to_soc_phys_ram,
41 .read_l_sw_ack = read_mmr_proc_sw_ack,
42 .read_g_sw_ack = read_gmmr_proc_sw_ack,
43 .write_l_sw_ack = write_mmr_proc_sw_ack,
44 .write_g_sw_ack = write_gmmr_proc_sw_ack,
45 .write_payload_first = write_mmr_proc_payload_first,
46 .write_payload_last = write_mmr_proc_payload_last,
50 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
51 static int timeout_base_ns[] = {
62 static int timeout_us;
63 static bool nobau = true;
64 static int nobau_perm;
65 static cycles_t congested_cycles;
68 static int max_concurr = MAX_BAU_CONCURRENT;
69 static int max_concurr_const = MAX_BAU_CONCURRENT;
70 static int plugged_delay = PLUGGED_DELAY;
71 static int plugsb4reset = PLUGSB4RESET;
72 static int giveup_limit = GIVEUP_LIMIT;
73 static int timeoutsb4reset = TIMEOUTSB4RESET;
74 static int ipi_reset_limit = IPI_RESET_LIMIT;
75 static int complete_threshold = COMPLETE_THRESHOLD;
76 static int congested_respns_us = CONGESTED_RESPONSE_US;
77 static int congested_reps = CONGESTED_REPS;
78 static int disabled_period = DISABLED_PERIOD;
80 static struct tunables tunables[] = {
81 {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
82 {&plugged_delay, PLUGGED_DELAY},
83 {&plugsb4reset, PLUGSB4RESET},
84 {&timeoutsb4reset, TIMEOUTSB4RESET},
85 {&ipi_reset_limit, IPI_RESET_LIMIT},
86 {&complete_threshold, COMPLETE_THRESHOLD},
87 {&congested_respns_us, CONGESTED_RESPONSE_US},
88 {&congested_reps, CONGESTED_REPS},
89 {&disabled_period, DISABLED_PERIOD},
90 {&giveup_limit, GIVEUP_LIMIT}
93 static struct dentry *tunables_dir;
94 static struct dentry *tunables_file;
96 /* these correspond to the statistics printed by ptc_seq_show() */
97 static char *stat_description[] = {
98 "sent: number of shootdown messages sent",
99 "stime: time spent sending messages",
100 "numuvhubs: number of hubs targeted with shootdown",
101 "numuvhubs16: number times 16 or more hubs targeted",
102 "numuvhubs8: number times 8 or more hubs targeted",
103 "numuvhubs4: number times 4 or more hubs targeted",
104 "numuvhubs2: number times 2 or more hubs targeted",
105 "numuvhubs1: number times 1 hub targeted",
106 "numcpus: number of cpus targeted with shootdown",
107 "dto: number of destination timeouts",
108 "retries: destination timeout retries sent",
109 "rok: : destination timeouts successfully retried",
110 "resetp: ipi-style resource resets for plugs",
111 "resett: ipi-style resource resets for timeouts",
112 "giveup: fall-backs to ipi-style shootdowns",
113 "sto: number of source timeouts",
114 "bz: number of stay-busy's",
115 "throt: number times spun in throttle",
116 "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
117 "recv: shootdown messages received",
118 "rtime: time spent processing messages",
119 "all: shootdown all-tlb messages",
120 "one: shootdown one-tlb messages",
121 "mult: interrupts that found multiple messages",
122 "none: interrupts that found no messages",
123 "retry: number of retry messages processed",
124 "canc: number messages canceled by retries",
125 "nocan: number retries that found nothing to cancel",
126 "reset: number of ipi-style reset requests processed",
127 "rcan: number messages canceled by reset requests",
128 "disable: number times use of the BAU was disabled",
129 "enable: number times use of the BAU was re-enabled"
132 static int __init setup_bau(char *arg)
139 result = strtobool(arg, &nobau);
143 /* we need to flip the logic here, so that bau=y sets nobau to false */
147 pr_info("UV BAU Enabled\n");
149 pr_info("UV BAU Disabled\n");
153 early_param("bau", setup_bau);
155 /* base pnode in this partition */
156 static int uv_base_pnode __read_mostly;
158 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
159 static DEFINE_PER_CPU(struct bau_control, bau_control);
160 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
166 struct bau_control *bcp;
169 pr_info("BAU not initialized; cannot be turned on\n");
173 for_each_present_cpu(cpu) {
174 bcp = &per_cpu(bau_control, cpu);
177 pr_info("BAU turned on\n");
185 struct bau_control *bcp;
188 for_each_present_cpu(cpu) {
189 bcp = &per_cpu(bau_control, cpu);
192 pr_info("BAU turned off\n");
197 * Determine the first node on a uvhub. 'Nodes' are used for kernel
200 static int __init uvhub_to_first_node(int uvhub)
204 for_each_online_node(node) {
205 b = uv_node_to_blade_id(node);
213 * Determine the apicid of the first cpu on a uvhub.
215 static int __init uvhub_to_first_apicid(int uvhub)
219 for_each_present_cpu(cpu)
220 if (uvhub == uv_cpu_to_blade_id(cpu))
221 return per_cpu(x86_cpu_to_apicid, cpu);
226 * Free a software acknowledge hardware resource by clearing its Pending
227 * bit. This will return a reply to the sender.
228 * If the message has timed out, a reply has already been sent by the
229 * hardware but the resource has not been released. In that case our
230 * clear of the Timeout bit (as well) will free the resource. No reply will
231 * be sent (the hardware will only do one reply per message).
233 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
237 struct bau_pq_entry *msg;
240 if (!msg->canceled && do_acknowledge) {
241 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
242 ops.write_l_sw_ack(dw);
249 * Process the receipt of a RETRY message
251 static void bau_process_retry_msg(struct msg_desc *mdp,
252 struct bau_control *bcp)
255 int cancel_count = 0;
256 unsigned long msg_res;
257 unsigned long mmr = 0;
258 struct bau_pq_entry *msg = mdp->msg;
259 struct bau_pq_entry *msg2;
260 struct ptc_stats *stat = bcp->statp;
264 * cancel any message from msg+1 to the retry itself
266 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
267 if (msg2 > mdp->queue_last)
268 msg2 = mdp->queue_first;
272 /* same conditions for cancellation as do_reset */
273 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
274 (msg2->swack_vec) && ((msg2->swack_vec &
275 msg->swack_vec) == 0) &&
276 (msg2->sending_cpu == msg->sending_cpu) &&
277 (msg2->msg_type != MSG_NOOP)) {
278 mmr = ops.read_l_sw_ack();
279 msg_res = msg2->swack_vec;
281 * This is a message retry; clear the resources held
282 * by the previous message only if they timed out.
283 * If it has not timed out we have an unexpected
284 * situation to report.
286 if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
289 * Is the resource timed out?
290 * Make everyone ignore the cancelled message.
295 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
296 ops.write_l_sw_ack(mr);
301 stat->d_nocanceled++;
305 * Do all the things a cpu should do for a TLB shootdown message.
306 * Other cpu's may come here at the same time for this message.
308 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
311 short socket_ack_count = 0;
313 struct atomic_short *asp;
314 struct ptc_stats *stat = bcp->statp;
315 struct bau_pq_entry *msg = mdp->msg;
316 struct bau_control *smaster = bcp->socket_master;
319 * This must be a normal message, or retry of a normal message
321 if (msg->address == TLB_FLUSH_ALL) {
325 __flush_tlb_one(msg->address);
331 * One cpu on each uvhub has the additional job on a RETRY
332 * of releasing the resource held by the message that is
333 * being retried. That message is identified by sending
336 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
337 bau_process_retry_msg(mdp, bcp);
340 * This is a swack message, so we have to reply to it.
341 * Count each responding cpu on the socket. This avoids
342 * pinging the count's cache line back and forth between
345 sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
346 asp = (struct atomic_short *)sp;
347 socket_ack_count = atom_asr(1, asp);
348 if (socket_ack_count == bcp->cpus_in_socket) {
351 * Both sockets dump their completed count total into
352 * the message's count.
355 asp = (struct atomic_short *)&msg->acknowledge_count;
356 msg_ack_count = atom_asr(socket_ack_count, asp);
358 if (msg_ack_count == bcp->cpus_in_uvhub) {
360 * All cpus in uvhub saw it; reply
361 * (unless we are in the UV2 workaround)
363 reply_to_message(mdp, bcp, do_acknowledge);
371 * Determine the first cpu on a pnode.
373 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
376 struct hub_and_pnode *hpp;
378 for_each_present_cpu(cpu) {
379 hpp = &smaster->thp[cpu];
380 if (pnode == hpp->pnode)
387 * Last resort when we get a large number of destination timeouts is
388 * to clear resources held by a given cpu.
389 * Do this with IPI so that all messages in the BAU message queue
390 * can be identified by their nonzero swack_vec field.
392 * This is entered for a single cpu on the uvhub.
393 * The sender want's this uvhub to free a specific message's
396 static void do_reset(void *ptr)
399 struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
400 struct reset_args *rap = (struct reset_args *)ptr;
401 struct bau_pq_entry *msg;
402 struct ptc_stats *stat = bcp->statp;
406 * We're looking for the given sender, and
407 * will free its swack resource.
408 * If all cpu's finally responded after the timeout, its
409 * message 'replied_to' was set.
411 for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
412 unsigned long msg_res;
413 /* do_reset: same conditions for cancellation as
414 bau_process_retry_msg() */
415 if ((msg->replied_to == 0) &&
416 (msg->canceled == 0) &&
417 (msg->sending_cpu == rap->sender) &&
419 (msg->msg_type != MSG_NOOP)) {
423 * make everyone else ignore this message
427 * only reset the resource if it is still pending
429 mmr = ops.read_l_sw_ack();
430 msg_res = msg->swack_vec;
431 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
434 ops.write_l_sw_ack(mr);
442 * Use IPI to get all target uvhubs to release resources held by
443 * a given sending cpu number.
445 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
450 int sender = bcp->cpu;
451 cpumask_t *mask = bcp->uvhub_master->cpumask;
452 struct bau_control *smaster = bcp->socket_master;
453 struct reset_args reset_args;
455 reset_args.sender = sender;
457 /* find a single cpu for each uvhub in this distribution mask */
458 maskbits = sizeof(struct pnmask) * BITSPERBYTE;
459 /* each bit is a pnode relative to the partition base pnode */
460 for (pnode = 0; pnode < maskbits; pnode++) {
462 if (!bau_uvhub_isset(pnode, distribution))
464 apnode = pnode + bcp->partition_base_pnode;
465 cpu = pnode_to_first_cpu(apnode, smaster);
466 cpumask_set_cpu(cpu, mask);
469 /* IPI all cpus; preemption is already disabled */
470 smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
475 * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
476 * number, not an absolute. It converts a duration in cycles to a duration in
479 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
481 struct cyc2ns_data *data = cyc2ns_read_begin();
482 unsigned long long ns;
484 ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
486 cyc2ns_read_end(data);
491 * The reverse of the above; converts a duration in ns to a duration in cycles.
493 static inline unsigned long long ns_2_cycles(unsigned long long ns)
495 struct cyc2ns_data *data = cyc2ns_read_begin();
496 unsigned long long cyc;
498 cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
500 cyc2ns_read_end(data);
504 static inline unsigned long cycles_2_us(unsigned long long cyc)
506 return cycles_2_ns(cyc) / NSEC_PER_USEC;
509 static inline cycles_t sec_2_cycles(unsigned long sec)
511 return ns_2_cycles(sec * NSEC_PER_SEC);
514 static inline unsigned long long usec_2_cycles(unsigned long usec)
516 return ns_2_cycles(usec * NSEC_PER_USEC);
520 * wait for all cpus on this hub to finish their sends and go quiet
521 * leaves uvhub_quiesce set so that no new broadcasts are started by
522 * bau_flush_send_and_wait()
524 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
526 atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
530 * mark this quiet-requestor as done
532 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
534 atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
537 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
539 unsigned long descriptor_status;
541 descriptor_status = uv_read_local_mmr(mmr_offset);
542 descriptor_status >>= right_shift;
543 descriptor_status &= UV_ACT_STATUS_MASK;
544 return descriptor_status;
548 * Wait for completion of a broadcast software ack message
549 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
551 static int uv1_wait_completion(struct bau_desc *bau_desc,
552 unsigned long mmr_offset, int right_shift,
553 struct bau_control *bcp, long try)
555 unsigned long descriptor_status;
557 struct ptc_stats *stat = bcp->statp;
559 descriptor_status = uv1_read_status(mmr_offset, right_shift);
560 /* spin on the status MMR, waiting for it to go idle */
561 while ((descriptor_status != DS_IDLE)) {
563 * Our software ack messages may be blocked because
564 * there are no swack resources available. As long
565 * as none of them has timed out hardware will NACK
566 * our message and its state will stay IDLE.
568 if (descriptor_status == DS_SOURCE_TIMEOUT) {
571 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
576 * Our retries may be blocked by all destination
577 * swack resources being consumed, and a timeout
578 * pending. In that case hardware returns the
579 * ERROR that looks like a destination timeout.
581 if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
582 bcp->conseccompletes = 0;
583 return FLUSH_RETRY_PLUGGED;
586 bcp->conseccompletes = 0;
587 return FLUSH_RETRY_TIMEOUT;
590 * descriptor_status is still BUSY
594 descriptor_status = uv1_read_status(mmr_offset, right_shift);
596 bcp->conseccompletes++;
597 return FLUSH_COMPLETE;
601 * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
602 * But not currently used.
604 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
606 return ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
610 * Return whether the status of the descriptor that is normally used for this
611 * cpu (the one indexed by its hub-relative cpu number) is busy.
612 * The status of the original 32 descriptors is always reflected in the 64
613 * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
614 * The bit provided by the activation_status_2 register is irrelevant to
615 * the status if it is only being tested for busy or not busy.
617 int normal_busy(struct bau_control *bcp)
619 int cpu = bcp->uvhub_cpu;
623 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
624 right_shift = cpu * UV_ACT_STATUS_SIZE;
625 return (((((read_lmmr(mmr_offset) >> right_shift) &
626 UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
630 * Entered when a bau descriptor has gone into a permanent busy wait because
632 * Workaround the bug.
634 int handle_uv2_busy(struct bau_control *bcp)
636 struct ptc_stats *stat = bcp->statp;
643 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
644 unsigned long mmr_offset, int right_shift,
645 struct bau_control *bcp, long try)
647 unsigned long descriptor_stat;
649 int desc = bcp->uvhub_cpu;
651 struct ptc_stats *stat = bcp->statp;
653 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
655 /* spin on the status MMR, waiting for it to go idle */
656 while (descriptor_stat != UV2H_DESC_IDLE) {
657 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
659 * A h/w bug on the destination side may
660 * have prevented the message being marked
661 * pending, thus it doesn't get replied to
662 * and gets continually nacked until it times
663 * out with a SOURCE_TIMEOUT.
667 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
671 * Our retries may be blocked by all destination
672 * swack resources being consumed, and a timeout
673 * pending. In that case hardware returns the
674 * ERROR that looks like a destination timeout.
675 * Without using the extended status we have to
676 * deduce from the short time that this was a
679 if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
680 bcp->conseccompletes = 0;
682 /* FLUSH_RETRY_PLUGGED causes hang on boot */
686 bcp->conseccompletes = 0;
687 /* FLUSH_RETRY_TIMEOUT causes hang on boot */
691 if (busy_reps > 1000000) {
692 /* not to hammer on the clock */
695 if ((ttm - bcp->send_message) > bcp->timeout_interval)
696 return handle_uv2_busy(bcp);
699 * descriptor_stat is still BUSY
703 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
705 bcp->conseccompletes++;
706 return FLUSH_COMPLETE;
710 * There are 2 status registers; each and array[32] of 2 bits. Set up for
711 * which register to read and position in that register based on cpu in
714 static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
717 unsigned long mmr_offset;
718 int desc = bcp->uvhub_cpu;
720 if (desc < UV_CPUS_PER_AS) {
721 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
722 right_shift = desc * UV_ACT_STATUS_SIZE;
724 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
725 right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
728 if (bcp->uvhub_version == 1)
729 return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
731 return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
735 * Our retries are blocked by all destination sw ack resources being
736 * in use, and a timeout is pending. In that case hardware immediately
737 * returns the ERROR that looks like a destination timeout.
739 static void destination_plugged(struct bau_desc *bau_desc,
740 struct bau_control *bcp,
741 struct bau_control *hmaster, struct ptc_stats *stat)
743 udelay(bcp->plugged_delay);
744 bcp->plugged_tries++;
746 if (bcp->plugged_tries >= bcp->plugsb4reset) {
747 bcp->plugged_tries = 0;
749 quiesce_local_uvhub(hmaster);
751 spin_lock(&hmaster->queue_lock);
752 reset_with_ipi(&bau_desc->distribution, bcp);
753 spin_unlock(&hmaster->queue_lock);
755 end_uvhub_quiesce(hmaster);
758 stat->s_resets_plug++;
762 static void destination_timeout(struct bau_desc *bau_desc,
763 struct bau_control *bcp, struct bau_control *hmaster,
764 struct ptc_stats *stat)
766 hmaster->max_concurr = 1;
767 bcp->timeout_tries++;
768 if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
769 bcp->timeout_tries = 0;
771 quiesce_local_uvhub(hmaster);
773 spin_lock(&hmaster->queue_lock);
774 reset_with_ipi(&bau_desc->distribution, bcp);
775 spin_unlock(&hmaster->queue_lock);
777 end_uvhub_quiesce(hmaster);
780 stat->s_resets_timeout++;
785 * Stop all cpus on a uvhub from using the BAU for a period of time.
786 * This is reversed by check_enable.
788 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
791 struct bau_control *tbcp;
792 struct bau_control *hmaster;
795 hmaster = bcp->uvhub_master;
796 spin_lock(&hmaster->disable_lock);
797 if (!bcp->baudisabled) {
798 stat->s_bau_disabled++;
800 for_each_present_cpu(tcpu) {
801 tbcp = &per_cpu(bau_control, tcpu);
802 if (tbcp->uvhub_master == hmaster) {
803 tbcp->baudisabled = 1;
804 tbcp->set_bau_on_time =
805 tm1 + bcp->disabled_period;
809 spin_unlock(&hmaster->disable_lock);
812 static void count_max_concurr(int stat, struct bau_control *bcp,
813 struct bau_control *hmaster)
815 bcp->plugged_tries = 0;
816 bcp->timeout_tries = 0;
817 if (stat != FLUSH_COMPLETE)
819 if (bcp->conseccompletes <= bcp->complete_threshold)
821 if (hmaster->max_concurr >= hmaster->max_concurr_const)
823 hmaster->max_concurr++;
826 static void record_send_stats(cycles_t time1, cycles_t time2,
827 struct bau_control *bcp, struct ptc_stats *stat,
828 int completion_status, int try)
833 elapsed = time2 - time1;
834 stat->s_time += elapsed;
836 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
837 bcp->period_requests++;
838 bcp->period_time += elapsed;
839 if ((elapsed > congested_cycles) &&
840 (bcp->period_requests > bcp->cong_reps) &&
841 ((bcp->period_time / bcp->period_requests) >
844 disable_for_period(bcp, stat);
850 if (completion_status == FLUSH_COMPLETE && try > 1)
852 else if (completion_status == FLUSH_GIVEUP) {
854 if (get_cycles() > bcp->period_end)
855 bcp->period_giveups = 0;
856 bcp->period_giveups++;
857 if (bcp->period_giveups == 1)
858 bcp->period_end = get_cycles() + bcp->disabled_period;
859 if (bcp->period_giveups > bcp->giveup_limit) {
860 disable_for_period(bcp, stat);
861 stat->s_giveuplimit++;
867 * Because of a uv1 hardware bug only a limited number of concurrent
868 * requests can be made.
870 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
872 spinlock_t *lock = &hmaster->uvhub_lock;
875 v = &hmaster->active_descriptor_count;
876 if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
880 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
885 * Handle the completion status of a message send.
887 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
888 struct bau_control *bcp, struct bau_control *hmaster,
889 struct ptc_stats *stat)
891 if (completion_status == FLUSH_RETRY_PLUGGED)
892 destination_plugged(bau_desc, bcp, hmaster, stat);
893 else if (completion_status == FLUSH_RETRY_TIMEOUT)
894 destination_timeout(bau_desc, bcp, hmaster, stat);
898 * Send a broadcast and wait for it to complete.
900 * The flush_mask contains the cpus the broadcast is to be sent to including
901 * cpus that are on the local uvhub.
903 * Returns 0 if all flushing represented in the mask was done.
904 * Returns 1 if it gives up entirely and the original cpu mask is to be
905 * returned to the kernel.
907 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
908 struct bau_desc *bau_desc)
911 int completion_stat = 0;
917 struct ptc_stats *stat = bcp->statp;
918 struct bau_control *hmaster = bcp->uvhub_master;
919 struct uv1_bau_msg_header *uv1_hdr = NULL;
920 struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
922 if (bcp->uvhub_version == 1) {
924 uv1_throttle(hmaster, stat);
927 while (hmaster->uvhub_quiesce)
930 time1 = get_cycles();
932 uv1_hdr = &bau_desc->header.uv1_hdr;
935 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
940 uv1_hdr->msg_type = MSG_REGULAR;
942 uv2_3_hdr->msg_type = MSG_REGULAR;
943 seq_number = bcp->message_number++;
946 uv1_hdr->msg_type = MSG_RETRY;
948 uv2_3_hdr->msg_type = MSG_RETRY;
949 stat->s_retry_messages++;
953 uv1_hdr->sequence = seq_number;
955 uv2_3_hdr->sequence = seq_number;
956 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
957 bcp->send_message = get_cycles();
959 write_mmr_activation(index);
962 completion_stat = wait_completion(bau_desc, bcp, try);
964 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
966 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
967 bcp->ipi_attempts = 0;
968 stat->s_overipilimit++;
969 completion_stat = FLUSH_GIVEUP;
973 } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
974 (completion_stat == FLUSH_RETRY_TIMEOUT));
976 time2 = get_cycles();
978 count_max_concurr(completion_stat, bcp, hmaster);
980 while (hmaster->uvhub_quiesce)
983 atomic_dec(&hmaster->active_descriptor_count);
985 record_send_stats(time1, time2, bcp, stat, completion_stat, try);
987 if (completion_stat == FLUSH_GIVEUP)
988 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
994 * The BAU is disabled for this uvhub. When the disabled time period has
995 * expired re-enable it.
996 * Return 0 if it is re-enabled for all cpus on this uvhub.
998 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
1001 struct bau_control *tbcp;
1002 struct bau_control *hmaster;
1004 hmaster = bcp->uvhub_master;
1005 spin_lock(&hmaster->disable_lock);
1006 if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
1007 stat->s_bau_reenabled++;
1008 for_each_present_cpu(tcpu) {
1009 tbcp = &per_cpu(bau_control, tcpu);
1010 if (tbcp->uvhub_master == hmaster) {
1011 tbcp->baudisabled = 0;
1012 tbcp->period_requests = 0;
1013 tbcp->period_time = 0;
1014 tbcp->period_giveups = 0;
1017 spin_unlock(&hmaster->disable_lock);
1020 spin_unlock(&hmaster->disable_lock);
1024 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
1025 int remotes, struct bau_desc *bau_desc)
1027 stat->s_requestor++;
1028 stat->s_ntargcpu += remotes + locals;
1029 stat->s_ntargremotes += remotes;
1030 stat->s_ntarglocals += locals;
1032 /* uvhub statistics */
1033 hubs = bau_uvhub_weight(&bau_desc->distribution);
1035 stat->s_ntarglocaluvhub++;
1036 stat->s_ntargremoteuvhub += (hubs - 1);
1038 stat->s_ntargremoteuvhub += hubs;
1040 stat->s_ntarguvhub += hubs;
1043 stat->s_ntarguvhub16++;
1045 stat->s_ntarguvhub8++;
1047 stat->s_ntarguvhub4++;
1049 stat->s_ntarguvhub2++;
1051 stat->s_ntarguvhub1++;
1055 * Translate a cpu mask to the uvhub distribution mask in the BAU
1056 * activation descriptor.
1058 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1059 struct bau_desc *bau_desc, int *localsp, int *remotesp)
1064 struct hub_and_pnode *hpp;
1066 for_each_cpu(cpu, flush_mask) {
1068 * The distribution vector is a bit map of pnodes, relative
1069 * to the partition base pnode (and the partition base nasid
1071 * Translate cpu to pnode and hub using a local memory array.
1073 hpp = &bcp->socket_master->thp[cpu];
1074 pnode = hpp->pnode - bcp->partition_base_pnode;
1075 bau_uvhub_set(pnode, &bau_desc->distribution);
1077 if (hpp->uvhub == bcp->uvhub)
1088 * globally purge translation cache of a virtual address or all TLB's
1089 * @cpumask: mask of all cpu's in which the address is to be removed
1090 * @mm: mm_struct containing virtual address range
1091 * @start: start virtual address to be removed from TLB
1092 * @end: end virtual address to be remove from TLB
1093 * @cpu: the current cpu
1095 * This is the entry point for initiating any UV global TLB shootdown.
1097 * Purges the translation caches of all specified processors of the given
1098 * virtual address, or purges all TLB's on specified processors.
1100 * The caller has derived the cpumask from the mm_struct. This function
1101 * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1103 * The cpumask is converted into a uvhubmask of the uvhubs containing
1106 * Note that this function should be called with preemption disabled.
1108 * Returns NULL if all remote flushing was done.
1109 * Returns pointer to cpumask if some remote flushing remains to be
1110 * done. The returned pointer is valid till preemption is re-enabled.
1112 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1113 struct mm_struct *mm,
1114 unsigned long start,
1121 struct bau_desc *bau_desc;
1122 struct cpumask *flush_mask;
1123 struct ptc_stats *stat;
1124 struct bau_control *bcp;
1125 unsigned long descriptor_status;
1126 unsigned long status;
1128 bcp = &per_cpu(bau_control, cpu);
1138 read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1139 status = ((descriptor_status >> (bcp->uvhub_cpu *
1140 UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1141 if (status == UV2H_DESC_BUSY)
1146 /* bau was disabled due to slow response */
1147 if (bcp->baudisabled) {
1148 if (check_enable(bcp, stat)) {
1149 stat->s_ipifordisabled++;
1155 * Each sending cpu has a per-cpu mask which it fills from the caller's
1156 * cpu mask. All cpus are converted to uvhubs and copied to the
1157 * activation descriptor.
1159 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1160 /* don't actually do a shootdown of the local cpu */
1161 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1163 if (cpumask_test_cpu(cpu, cpumask))
1164 stat->s_ntargself++;
1166 bau_desc = bcp->descriptor_base;
1167 bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1168 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1169 if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1172 record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1174 if (!end || (end - start) <= PAGE_SIZE)
1175 bau_desc->payload.address = start;
1177 bau_desc->payload.address = TLB_FLUSH_ALL;
1178 bau_desc->payload.sending_cpu = cpu;
1180 * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1181 * or 1 if it gave up and the original cpumask should be returned.
1183 if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1190 * Search the message queue for any 'other' unprocessed message with the
1191 * same software acknowledge resource bit vector as the 'msg' message.
1193 struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1194 struct bau_control *bcp)
1196 struct bau_pq_entry *msg_next = msg + 1;
1197 unsigned char swack_vec = msg->swack_vec;
1199 if (msg_next > bcp->queue_last)
1200 msg_next = bcp->queue_first;
1201 while (msg_next != msg) {
1202 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1203 (msg_next->swack_vec == swack_vec))
1206 if (msg_next > bcp->queue_last)
1207 msg_next = bcp->queue_first;
1213 * UV2 needs to work around a bug in which an arriving message has not
1214 * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1215 * Such a message must be ignored.
1217 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1219 unsigned long mmr_image;
1220 unsigned char swack_vec;
1221 struct bau_pq_entry *msg = mdp->msg;
1222 struct bau_pq_entry *other_msg;
1224 mmr_image = ops.read_l_sw_ack();
1225 swack_vec = msg->swack_vec;
1227 if ((swack_vec & mmr_image) == 0) {
1229 * This message was assigned a swack resource, but no
1230 * reserved acknowlegment is pending.
1231 * The bug has prevented this message from setting the MMR.
1234 * Some message has set the MMR 'pending' bit; it might have
1235 * been another message. Look for that message.
1237 other_msg = find_another_by_swack(msg, bcp);
1240 * There is another. Process this one but do not
1243 bau_process_message(mdp, bcp, 0);
1245 * Let the natural processing of that other message
1246 * acknowledge it. Don't get the processing of sw_ack's
1254 * Either the MMR shows this one pending a reply or there is no
1255 * other message using this sw_ack, so it is safe to acknowledge it.
1257 bau_process_message(mdp, bcp, 1);
1263 * The BAU message interrupt comes here. (registered by set_intr_gate)
1266 * We received a broadcast assist message.
1268 * Interrupts are disabled; this interrupt could represent
1269 * the receipt of several messages.
1271 * All cores/threads on this hub get this interrupt.
1272 * The last one to see it does the software ack.
1273 * (the resource will not be freed until noninterruptable cpus see this
1274 * interrupt; hardware may timeout the s/w ack and reply ERROR)
1276 void uv_bau_message_interrupt(struct pt_regs *regs)
1279 cycles_t time_start;
1280 struct bau_pq_entry *msg;
1281 struct bau_control *bcp;
1282 struct ptc_stats *stat;
1283 struct msg_desc msgdesc;
1286 kvm_set_cpu_l1tf_flush_l1d();
1287 time_start = get_cycles();
1289 bcp = &per_cpu(bau_control, smp_processor_id());
1292 msgdesc.queue_first = bcp->queue_first;
1293 msgdesc.queue_last = bcp->queue_last;
1295 msg = bcp->bau_msg_head;
1296 while (msg->swack_vec) {
1299 msgdesc.msg_slot = msg - msgdesc.queue_first;
1301 if (bcp->uvhub_version == 2)
1302 process_uv2_message(&msgdesc, bcp);
1304 /* no error workaround for uv1 or uv3 */
1305 bau_process_message(&msgdesc, bcp, 1);
1308 if (msg > msgdesc.queue_last)
1309 msg = msgdesc.queue_first;
1310 bcp->bau_msg_head = msg;
1312 stat->d_time += (get_cycles() - time_start);
1320 * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1321 * shootdown message timeouts enabled. The timeout does not cause
1322 * an interrupt, but causes an error message to be returned to
1325 static void __init enable_timeouts(void)
1330 unsigned long mmr_image;
1332 nuvhubs = uv_num_possible_blades();
1334 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1335 if (!uv_blade_nr_possible_cpus(uvhub))
1338 pnode = uv_blade_to_pnode(uvhub);
1339 mmr_image = read_mmr_misc_control(pnode);
1341 * Set the timeout period and then lock it in, in three
1342 * steps; captures and locks in the period.
1344 * To program the period, the SOFT_ACK_MODE must be off.
1346 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1347 write_mmr_misc_control(pnode, mmr_image);
1349 * Set the 4-bit period.
1351 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1352 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1353 write_mmr_misc_control(pnode, mmr_image);
1356 * Subsequent reversals of the timebase bit (3) cause an
1357 * immediate timeout of one or all INTD resources as
1358 * indicated in bits 2:0 (7 causes all of them to timeout).
1360 mmr_image |= (1L << SOFTACK_MSHIFT);
1362 /* do not touch the legacy mode bit */
1363 /* hw bug workaround; do not use extended status */
1364 mmr_image &= ~(1L << UV2_EXT_SHFT);
1365 } else if (is_uv3_hub()) {
1366 mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1367 mmr_image |= (1L << SB_STATUS_SHFT);
1369 write_mmr_misc_control(pnode, mmr_image);
1373 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1375 if (*offset < num_possible_cpus())
1380 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1383 if (*offset < num_possible_cpus())
1388 static void ptc_seq_stop(struct seq_file *file, void *data)
1393 * Display the statistics thru /proc/sgi_uv/ptc_statistics
1394 * 'data' points to the cpu number
1395 * Note: see the descriptions in stat_description[].
1397 static int ptc_seq_show(struct seq_file *file, void *data)
1399 struct ptc_stats *stat;
1400 struct bau_control *bcp;
1403 cpu = *(loff_t *)data;
1406 "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1407 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1409 "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1411 "rok resetp resett giveup sto bz throt disable ");
1413 "enable wars warshw warwaits enters ipidis plugged ");
1415 "ipiover glim cong swack recv rtime all one mult ");
1416 seq_puts(file, "none retry canc nocan reset rcan\n");
1418 if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1419 bcp = &per_cpu(bau_control, cpu);
1421 seq_printf(file, "cpu %d bau disabled\n", cpu);
1425 /* source side statistics */
1427 "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1428 cpu, bcp->nobau, stat->s_requestor,
1429 cycles_2_us(stat->s_time),
1430 stat->s_ntargself, stat->s_ntarglocals,
1431 stat->s_ntargremotes, stat->s_ntargcpu,
1432 stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1433 stat->s_ntarguvhub, stat->s_ntarguvhub16);
1434 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1435 stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1436 stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1437 stat->s_dtimeout, stat->s_strongnacks);
1438 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1439 stat->s_retry_messages, stat->s_retriesok,
1440 stat->s_resets_plug, stat->s_resets_timeout,
1441 stat->s_giveup, stat->s_stimeout,
1442 stat->s_busy, stat->s_throttles);
1443 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1444 stat->s_bau_disabled, stat->s_bau_reenabled,
1445 stat->s_uv2_wars, stat->s_uv2_wars_hw,
1446 stat->s_uv2_war_waits, stat->s_enters,
1447 stat->s_ipifordisabled, stat->s_plugged,
1448 stat->s_overipilimit, stat->s_giveuplimit,
1451 /* destination side statistics */
1453 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1454 ops.read_g_sw_ack(uv_cpu_to_pnode(cpu)),
1455 stat->d_requestee, cycles_2_us(stat->d_time),
1456 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1457 stat->d_nomsg, stat->d_retries, stat->d_canceled,
1458 stat->d_nocanceled, stat->d_resets,
1465 * Display the tunables thru debugfs
1467 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1468 size_t count, loff_t *ppos)
1473 buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1474 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1475 "ipi_reset_limit complete_threshold congested_response_us",
1476 "congested_reps disabled_period giveup_limit",
1477 max_concurr, plugged_delay, plugsb4reset,
1478 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1479 congested_respns_us, congested_reps, disabled_period,
1485 ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1491 * handle a write to /proc/sgi_uv/ptc_statistics
1492 * -1: reset the statistics
1493 * 0: display meaning of the statistics
1495 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1496 size_t count, loff_t *data)
1503 struct ptc_stats *stat;
1505 if (count == 0 || count > sizeof(optstr))
1507 if (copy_from_user(optstr, user, count))
1509 optstr[count - 1] = '\0';
1511 if (!strcmp(optstr, "on")) {
1514 } else if (!strcmp(optstr, "off")) {
1519 if (kstrtol(optstr, 10, &input_arg) < 0) {
1520 pr_debug("%s is invalid\n", optstr);
1524 if (input_arg == 0) {
1525 elements = ARRAY_SIZE(stat_description);
1526 pr_debug("# cpu: cpu number\n");
1527 pr_debug("Sender statistics:\n");
1528 for (i = 0; i < elements; i++)
1529 pr_debug("%s\n", stat_description[i]);
1530 } else if (input_arg == -1) {
1531 for_each_present_cpu(cpu) {
1532 stat = &per_cpu(ptcstats, cpu);
1533 memset(stat, 0, sizeof(struct ptc_stats));
1540 static int local_atoi(const char *name)
1547 val = 10*val+(*name-'0');
1556 * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1557 * Zero values reset them to defaults.
1559 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1566 int e = ARRAY_SIZE(tunables);
1568 p = instr + strspn(instr, WHITESPACE);
1570 for (; *p; p = q + strspn(q, WHITESPACE)) {
1571 q = p + strcspn(p, WHITESPACE);
1577 pr_info("bau tunable error: should be %d values\n", e);
1581 p = instr + strspn(instr, WHITESPACE);
1583 for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1584 q = p + strcspn(p, WHITESPACE);
1585 val = local_atoi(p);
1589 max_concurr = MAX_BAU_CONCURRENT;
1590 max_concurr_const = MAX_BAU_CONCURRENT;
1593 if (val < 1 || val > bcp->cpus_in_uvhub) {
1595 "Error: BAU max concurrent %d is invalid\n",
1600 max_concurr_const = val;
1604 *tunables[cnt].tunp = tunables[cnt].deflt;
1606 *tunables[cnt].tunp = val;
1616 * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1618 static ssize_t tunables_write(struct file *file, const char __user *user,
1619 size_t count, loff_t *data)
1624 struct bau_control *bcp;
1626 if (count == 0 || count > sizeof(instr)-1)
1628 if (copy_from_user(instr, user, count))
1631 instr[count] = '\0';
1634 bcp = &per_cpu(bau_control, cpu);
1635 ret = parse_tunables_write(bcp, instr, count);
1640 for_each_present_cpu(cpu) {
1641 bcp = &per_cpu(bau_control, cpu);
1642 bcp->max_concurr = max_concurr;
1643 bcp->max_concurr_const = max_concurr;
1644 bcp->plugged_delay = plugged_delay;
1645 bcp->plugsb4reset = plugsb4reset;
1646 bcp->timeoutsb4reset = timeoutsb4reset;
1647 bcp->ipi_reset_limit = ipi_reset_limit;
1648 bcp->complete_threshold = complete_threshold;
1649 bcp->cong_response_us = congested_respns_us;
1650 bcp->cong_reps = congested_reps;
1651 bcp->disabled_period = sec_2_cycles(disabled_period);
1652 bcp->giveup_limit = giveup_limit;
1657 static const struct seq_operations uv_ptc_seq_ops = {
1658 .start = ptc_seq_start,
1659 .next = ptc_seq_next,
1660 .stop = ptc_seq_stop,
1661 .show = ptc_seq_show
1664 static int ptc_proc_open(struct inode *inode, struct file *file)
1666 return seq_open(file, &uv_ptc_seq_ops);
1669 static int tunables_open(struct inode *inode, struct file *file)
1674 static const struct file_operations proc_uv_ptc_operations = {
1675 .open = ptc_proc_open,
1677 .write = ptc_proc_write,
1678 .llseek = seq_lseek,
1679 .release = seq_release,
1682 static const struct file_operations tunables_fops = {
1683 .open = tunables_open,
1684 .read = tunables_read,
1685 .write = tunables_write,
1686 .llseek = default_llseek,
1689 static int __init uv_ptc_init(void)
1691 struct proc_dir_entry *proc_uv_ptc;
1693 if (!is_uv_system())
1696 proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1697 &proc_uv_ptc_operations);
1699 pr_err("unable to create %s proc entry\n",
1704 tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1705 if (!tunables_dir) {
1706 pr_err("unable to create debugfs directory %s\n",
1707 UV_BAU_TUNABLES_DIR);
1710 tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1711 tunables_dir, NULL, &tunables_fops);
1712 if (!tunables_file) {
1713 pr_err("unable to create debugfs file %s\n",
1714 UV_BAU_TUNABLES_FILE);
1721 * Initialize the sending side's sending buffers.
1723 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1732 struct bau_desc *bau_desc;
1733 struct bau_desc *bd2;
1734 struct uv1_bau_msg_header *uv1_hdr;
1735 struct uv2_3_bau_msg_header *uv2_3_hdr;
1736 struct bau_control *bcp;
1739 * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1740 * per cpu; and one per cpu on the uvhub (ADP_SZ)
1742 dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1743 bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1746 gpa = uv_gpa(bau_desc);
1747 n = uv_gpa_to_gnode(gpa);
1748 m = ops.bau_gpa_to_offset(gpa);
1752 /* the 14-bit pnode */
1753 write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1755 * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1756 * cpu even though we only use the first one; one descriptor can
1757 * describe a broadcast to 256 uv hubs.
1759 for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1760 memset(bd2, 0, sizeof(struct bau_desc));
1762 uv1_hdr = &bd2->header.uv1_hdr;
1763 uv1_hdr->swack_flag = 1;
1765 * The base_dest_nasid set in the message header
1766 * is the nasid of the first uvhub in the partition.
1767 * The bit map will indicate destination pnode numbers
1768 * relative to that base. They may not be consecutive
1769 * if nasid striding is being used.
1771 uv1_hdr->base_dest_nasid =
1772 UV_PNODE_TO_NASID(base_pnode);
1773 uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
1774 uv1_hdr->command = UV_NET_ENDPOINT_INTD;
1775 uv1_hdr->int_both = 1;
1777 * all others need to be set to zero:
1778 * fairness chaining multilevel count replied_to
1782 * BIOS uses legacy mode, but uv2 and uv3 hardware always
1783 * uses native mode for selective broadcasts.
1785 uv2_3_hdr = &bd2->header.uv2_3_hdr;
1786 uv2_3_hdr->swack_flag = 1;
1787 uv2_3_hdr->base_dest_nasid =
1788 UV_PNODE_TO_NASID(base_pnode);
1789 uv2_3_hdr->dest_subnodeid = UV_LB_SUBNODEID;
1790 uv2_3_hdr->command = UV_NET_ENDPOINT_INTD;
1793 for_each_present_cpu(cpu) {
1794 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1796 bcp = &per_cpu(bau_control, cpu);
1797 bcp->descriptor_base = bau_desc;
1802 * initialize the destination side's receiving buffers
1803 * entered for each uvhub in the partition
1804 * - node is first node (kernel memory notion) on the uvhub
1805 * - pnode is the uvhub's physical identifier
1807 static void pq_init(int node, int pnode)
1813 unsigned long gnode, first, last, tail;
1814 struct bau_pq_entry *pqp;
1815 struct bau_control *bcp;
1817 plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1818 vp = kmalloc_node(plsize, GFP_KERNEL, node);
1819 pqp = (struct bau_pq_entry *)vp;
1822 cp = (char *)pqp + 31;
1823 pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1825 for_each_present_cpu(cpu) {
1826 if (pnode != uv_cpu_to_pnode(cpu))
1828 /* for every cpu on this pnode: */
1829 bcp = &per_cpu(bau_control, cpu);
1830 bcp->queue_first = pqp;
1831 bcp->bau_msg_head = pqp;
1832 bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
1835 first = ops.bau_gpa_to_offset(uv_gpa(pqp));
1836 last = ops.bau_gpa_to_offset(uv_gpa(pqp + (DEST_Q_SIZE - 1)));
1839 * Pre UV4, the gnode is required to locate the payload queue
1840 * and the payload queue tail must be maintained by the kernel.
1842 bcp = &per_cpu(bau_control, smp_processor_id());
1843 if (bcp->uvhub_version <= 3) {
1845 gnode = uv_gpa_to_gnode(uv_gpa(pqp));
1846 first = (gnode << UV_PAYLOADQ_GNODE_SHIFT) | tail;
1847 write_mmr_payload_tail(pnode, tail);
1850 ops.write_payload_first(pnode, first);
1851 ops.write_payload_last(pnode, last);
1853 /* in effect, all msg_type's are set to MSG_NOOP */
1854 memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1858 * Initialization of each UV hub's structures
1860 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1864 unsigned long apicid;
1866 node = uvhub_to_first_node(uvhub);
1867 pnode = uv_blade_to_pnode(uvhub);
1869 activation_descriptor_init(node, pnode, base_pnode);
1871 pq_init(node, pnode);
1873 * The below initialization can't be in firmware because the
1874 * messaging IRQ will be determined by the OS.
1876 apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1877 write_mmr_data_config(pnode, ((apicid << 32) | vector));
1881 * We will set BAU_MISC_CONTROL with a timeout period.
1882 * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1883 * So the destination timeout period has to be calculated from them.
1885 static int calculate_destination_timeout(void)
1887 unsigned long mmr_image;
1893 unsigned long ts_ns;
1896 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1897 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1898 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1899 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1900 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1901 ts_ns = timeout_base_ns[index];
1902 ts_ns *= (mult1 * mult2);
1905 /* same destination timeout for uv2 and uv3 */
1906 /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
1907 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1908 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1909 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1913 mult1 = mmr_image & UV2_ACK_MASK;
1919 static void __init init_per_cpu_tunables(void)
1922 struct bau_control *bcp;
1924 for_each_present_cpu(cpu) {
1925 bcp = &per_cpu(bau_control, cpu);
1926 bcp->baudisabled = 0;
1929 bcp->statp = &per_cpu(ptcstats, cpu);
1930 /* time interval to catch a hardware stay-busy bug */
1931 bcp->timeout_interval = usec_2_cycles(2*timeout_us);
1932 bcp->max_concurr = max_concurr;
1933 bcp->max_concurr_const = max_concurr;
1934 bcp->plugged_delay = plugged_delay;
1935 bcp->plugsb4reset = plugsb4reset;
1936 bcp->timeoutsb4reset = timeoutsb4reset;
1937 bcp->ipi_reset_limit = ipi_reset_limit;
1938 bcp->complete_threshold = complete_threshold;
1939 bcp->cong_response_us = congested_respns_us;
1940 bcp->cong_reps = congested_reps;
1941 bcp->disabled_period = sec_2_cycles(disabled_period);
1942 bcp->giveup_limit = giveup_limit;
1943 spin_lock_init(&bcp->queue_lock);
1944 spin_lock_init(&bcp->uvhub_lock);
1945 spin_lock_init(&bcp->disable_lock);
1950 * Scan all cpus to collect blade and socket summaries.
1952 static int __init get_cpu_topology(int base_pnode,
1953 struct uvhub_desc *uvhub_descs,
1954 unsigned char *uvhub_mask)
1960 struct bau_control *bcp;
1961 struct uvhub_desc *bdp;
1962 struct socket_desc *sdp;
1964 for_each_present_cpu(cpu) {
1965 bcp = &per_cpu(bau_control, cpu);
1967 memset(bcp, 0, sizeof(struct bau_control));
1969 pnode = uv_cpu_hub_info(cpu)->pnode;
1970 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1972 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1973 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1977 bcp->osnode = cpu_to_node(cpu);
1978 bcp->partition_base_pnode = base_pnode;
1980 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1981 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1982 bdp = &uvhub_descs[uvhub];
1988 /* kludge: 'assuming' one node per socket, and assuming that
1989 disabling a socket just leaves a gap in node numbers */
1990 socket = bcp->osnode & 1;
1991 bdp->socket_mask |= (1 << socket);
1992 sdp = &bdp->socket[socket];
1993 sdp->cpu_number[sdp->num_cpus] = cpu;
1995 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1996 pr_emerg("%d cpus per socket invalid\n",
2005 * Each socket is to get a local array of pnodes/hubs.
2007 static void make_per_cpu_thp(struct bau_control *smaster)
2010 size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
2012 smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
2013 memset(smaster->thp, 0, hpsz);
2014 for_each_present_cpu(cpu) {
2015 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
2016 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
2021 * Each uvhub is to get a local cpumask.
2023 static void make_per_hub_cpumask(struct bau_control *hmaster)
2025 int sz = sizeof(cpumask_t);
2027 hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
2031 * Initialize all the per_cpu information for the cpu's on a given socket,
2032 * given what has been gathered into the socket_desc struct.
2033 * And reports the chosen hub and socket masters back to the caller.
2035 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
2036 struct bau_control **smasterp,
2037 struct bau_control **hmasterp)
2041 struct bau_control *bcp;
2043 for (i = 0; i < sdp->num_cpus; i++) {
2044 cpu = sdp->cpu_number[i];
2045 bcp = &per_cpu(bau_control, cpu);
2052 bcp->cpus_in_uvhub = bdp->num_cpus;
2053 bcp->cpus_in_socket = sdp->num_cpus;
2054 bcp->socket_master = *smasterp;
2055 bcp->uvhub = bdp->uvhub;
2057 bcp->uvhub_version = 1;
2058 else if (is_uv2_hub())
2059 bcp->uvhub_version = 2;
2060 else if (is_uv3_hub())
2061 bcp->uvhub_version = 3;
2062 else if (is_uv4_hub())
2063 bcp->uvhub_version = 4;
2065 pr_emerg("uvhub version not 1, 2, 3, or 4\n");
2068 bcp->uvhub_master = *hmasterp;
2069 bcp->uvhub_cpu = uv_cpu_blade_processor_id(cpu);
2071 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2072 pr_emerg("%d cpus per uvhub invalid\n",
2081 * Summarize the blade and socket topology into the per_cpu structures.
2083 static int __init summarize_uvhub_sockets(int nuvhubs,
2084 struct uvhub_desc *uvhub_descs,
2085 unsigned char *uvhub_mask)
2089 unsigned short socket_mask;
2091 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2092 struct uvhub_desc *bdp;
2093 struct bau_control *smaster = NULL;
2094 struct bau_control *hmaster = NULL;
2096 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2099 bdp = &uvhub_descs[uvhub];
2100 socket_mask = bdp->socket_mask;
2102 while (socket_mask) {
2103 struct socket_desc *sdp;
2104 if ((socket_mask & 1)) {
2105 sdp = &bdp->socket[socket];
2106 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2108 make_per_cpu_thp(smaster);
2111 socket_mask = (socket_mask >> 1);
2113 make_per_hub_cpumask(hmaster);
2119 * initialize the bau_control structure for each cpu
2121 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2123 unsigned char *uvhub_mask;
2125 struct uvhub_desc *uvhub_descs;
2127 if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2128 timeout_us = calculate_destination_timeout();
2130 vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2131 uvhub_descs = (struct uvhub_desc *)vp;
2132 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2133 uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2135 if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2138 if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2143 init_per_cpu_tunables();
2153 * Initialization of BAU-related structures
2155 static int __init uv_bau_init(void)
2163 cpumask_var_t *mask;
2165 if (!is_uv_system())
2170 else if (is_uv3_hub())
2171 ops = uv123_bau_ops;
2172 else if (is_uv2_hub())
2173 ops = uv123_bau_ops;
2174 else if (is_uv1_hub())
2175 ops = uv123_bau_ops;
2177 for_each_possible_cpu(cur_cpu) {
2178 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2179 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2182 nuvhubs = uv_num_possible_blades();
2183 congested_cycles = usec_2_cycles(congested_respns_us);
2185 uv_base_pnode = 0x7fffffff;
2186 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2187 cpus = uv_blade_nr_possible_cpus(uvhub);
2188 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2189 uv_base_pnode = uv_blade_to_pnode(uvhub);
2192 /* software timeouts are not supported on UV4 */
2193 if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2196 if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2202 vector = UV_BAU_MESSAGE;
2203 for_each_possible_blade(uvhub) {
2204 if (uv_blade_nr_possible_cpus(uvhub))
2205 init_uvhub(uvhub, vector, uv_base_pnode);
2208 alloc_intr_gate(vector, uv_bau_message_intr1);
2210 for_each_possible_blade(uvhub) {
2211 if (uv_blade_nr_possible_cpus(uvhub)) {
2214 pnode = uv_blade_to_pnode(uvhub);
2217 write_gmmr_activation(pnode, val);
2218 mmr = 1; /* should be 1 to broadcast to both sockets */
2220 write_mmr_data_broadcast(pnode, mmr);
2226 core_initcall(uv_bau_init);
2227 fs_initcall(uv_ptc_init);