2 * IOSF-SB MailBox Interface Driver
3 * Copyright (c) 2013, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * The IOSF-SB is a fabric bus available on Atom based SOC's that uses a
16 * mailbox interface (MBI) to communicate with mutiple devices. This
17 * driver implements access to this interface for those platforms that can
18 * enumerate the device using PCI.
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/pci.h>
25 #include <linux/debugfs.h>
26 #include <linux/capability.h>
28 #include <asm/iosf_mbi.h>
30 #define PCI_DEVICE_ID_BAYTRAIL 0x0F00
31 #define PCI_DEVICE_ID_BRASWELL 0x2280
32 #define PCI_DEVICE_ID_QUARK_X1000 0x0958
33 #define PCI_DEVICE_ID_TANGIER 0x1170
35 static struct pci_dev *mbi_pdev;
36 static DEFINE_SPINLOCK(iosf_mbi_lock);
37 static DEFINE_MUTEX(iosf_mbi_punit_mutex);
38 static BLOCKING_NOTIFIER_HEAD(iosf_mbi_pmic_bus_access_notifier);
40 static inline u32 iosf_mbi_form_mcr(u8 op, u8 port, u8 offset)
42 return (op << 24) | (port << 16) | (offset << 8) | MBI_ENABLE;
45 static int iosf_mbi_pci_read_mdr(u32 mcrx, u32 mcr, u32 *mdr)
53 result = pci_write_config_dword(mbi_pdev, MBI_MCRX_OFFSET,
59 result = pci_write_config_dword(mbi_pdev, MBI_MCR_OFFSET, mcr);
63 result = pci_read_config_dword(mbi_pdev, MBI_MDR_OFFSET, mdr);
70 dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result);
74 static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr)
81 result = pci_write_config_dword(mbi_pdev, MBI_MDR_OFFSET, mdr);
86 result = pci_write_config_dword(mbi_pdev, MBI_MCRX_OFFSET,
92 result = pci_write_config_dword(mbi_pdev, MBI_MCR_OFFSET, mcr);
99 dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result);
103 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr)
109 /* Access to the GFX unit is handled by GPU code */
110 if (port == BT_MBI_UNIT_GFX) {
115 mcr = iosf_mbi_form_mcr(opcode, port, offset & MBI_MASK_LO);
116 mcrx = offset & MBI_MASK_HI;
118 spin_lock_irqsave(&iosf_mbi_lock, flags);
119 ret = iosf_mbi_pci_read_mdr(mcrx, mcr, mdr);
120 spin_unlock_irqrestore(&iosf_mbi_lock, flags);
124 EXPORT_SYMBOL(iosf_mbi_read);
126 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr)
132 /* Access to the GFX unit is handled by GPU code */
133 if (port == BT_MBI_UNIT_GFX) {
138 mcr = iosf_mbi_form_mcr(opcode, port, offset & MBI_MASK_LO);
139 mcrx = offset & MBI_MASK_HI;
141 spin_lock_irqsave(&iosf_mbi_lock, flags);
142 ret = iosf_mbi_pci_write_mdr(mcrx, mcr, mdr);
143 spin_unlock_irqrestore(&iosf_mbi_lock, flags);
147 EXPORT_SYMBOL(iosf_mbi_write);
149 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask)
156 /* Access to the GFX unit is handled by GPU code */
157 if (port == BT_MBI_UNIT_GFX) {
162 mcr = iosf_mbi_form_mcr(opcode, port, offset & MBI_MASK_LO);
163 mcrx = offset & MBI_MASK_HI;
165 spin_lock_irqsave(&iosf_mbi_lock, flags);
167 /* Read current mdr value */
168 ret = iosf_mbi_pci_read_mdr(mcrx, mcr & MBI_RD_MASK, &value);
170 spin_unlock_irqrestore(&iosf_mbi_lock, flags);
180 ret = iosf_mbi_pci_write_mdr(mcrx, mcr | MBI_WR_MASK, value);
182 spin_unlock_irqrestore(&iosf_mbi_lock, flags);
186 EXPORT_SYMBOL(iosf_mbi_modify);
188 bool iosf_mbi_available(void)
190 /* Mbi isn't hot-pluggable. No remove routine is provided */
193 EXPORT_SYMBOL(iosf_mbi_available);
195 void iosf_mbi_punit_acquire(void)
197 mutex_lock(&iosf_mbi_punit_mutex);
199 EXPORT_SYMBOL(iosf_mbi_punit_acquire);
201 void iosf_mbi_punit_release(void)
203 mutex_unlock(&iosf_mbi_punit_mutex);
205 EXPORT_SYMBOL(iosf_mbi_punit_release);
207 int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block *nb)
211 /* Wait for the bus to go inactive before registering */
212 mutex_lock(&iosf_mbi_punit_mutex);
213 ret = blocking_notifier_chain_register(
214 &iosf_mbi_pmic_bus_access_notifier, nb);
215 mutex_unlock(&iosf_mbi_punit_mutex);
219 EXPORT_SYMBOL(iosf_mbi_register_pmic_bus_access_notifier);
221 int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb)
225 /* Wait for the bus to go inactive before unregistering */
226 mutex_lock(&iosf_mbi_punit_mutex);
227 ret = blocking_notifier_chain_unregister(
228 &iosf_mbi_pmic_bus_access_notifier, nb);
229 mutex_unlock(&iosf_mbi_punit_mutex);
233 EXPORT_SYMBOL(iosf_mbi_unregister_pmic_bus_access_notifier);
235 int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val, void *v)
237 return blocking_notifier_call_chain(
238 &iosf_mbi_pmic_bus_access_notifier, val, v);
240 EXPORT_SYMBOL(iosf_mbi_call_pmic_bus_access_notifier_chain);
242 #ifdef CONFIG_IOSF_MBI_DEBUG
247 static int mcr_get(void *data, u64 *val)
253 static int mcr_set(void *data, u64 val)
255 u8 command = ((u32)val & 0xFF000000) >> 24,
256 port = ((u32)val & 0x00FF0000) >> 16,
257 offset = ((u32)val & 0x0000FF00) >> 8;
262 if (!capable(CAP_SYS_RAWIO))
266 err = iosf_mbi_write(port,
271 err = iosf_mbi_read(port,
278 DEFINE_SIMPLE_ATTRIBUTE(iosf_mcr_fops, mcr_get, mcr_set , "%llx\n");
280 static struct dentry *iosf_dbg;
282 static void iosf_sideband_debug_init(void)
286 iosf_dbg = debugfs_create_dir("iosf_sb", NULL);
287 if (IS_ERR_OR_NULL(iosf_dbg))
291 d = debugfs_create_x32("mdr", 0660, iosf_dbg, &dbg_mdr);
296 d = debugfs_create_x32("mcrx", 0660, iosf_dbg, &dbg_mcrx);
300 /* mcr - initiates mailbox tranaction */
301 d = debugfs_create_file("mcr", 0660, iosf_dbg, &dbg_mcr, &iosf_mcr_fops);
308 debugfs_remove_recursive(d);
311 static void iosf_debugfs_init(void)
313 iosf_sideband_debug_init();
316 static void iosf_debugfs_remove(void)
318 debugfs_remove_recursive(iosf_dbg);
321 static inline void iosf_debugfs_init(void) { }
322 static inline void iosf_debugfs_remove(void) { }
323 #endif /* CONFIG_IOSF_MBI_DEBUG */
325 static int iosf_mbi_probe(struct pci_dev *pdev,
326 const struct pci_device_id *unused)
330 ret = pci_enable_device(pdev);
332 dev_err(&pdev->dev, "error: could not enable device\n");
336 mbi_pdev = pci_dev_get(pdev);
340 static const struct pci_device_id iosf_mbi_pci_ids[] = {
341 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_BAYTRAIL) },
342 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_BRASWELL) },
343 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_QUARK_X1000) },
344 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_TANGIER) },
347 MODULE_DEVICE_TABLE(pci, iosf_mbi_pci_ids);
349 static struct pci_driver iosf_mbi_pci_driver = {
350 .name = "iosf_mbi_pci",
351 .probe = iosf_mbi_probe,
352 .id_table = iosf_mbi_pci_ids,
355 static int __init iosf_mbi_init(void)
359 return pci_register_driver(&iosf_mbi_pci_driver);
362 static void __exit iosf_mbi_exit(void)
364 iosf_debugfs_remove();
366 pci_unregister_driver(&iosf_mbi_pci_driver);
367 pci_dev_put(mbi_pdev);
371 module_init(iosf_mbi_init);
372 module_exit(iosf_mbi_exit);
374 MODULE_AUTHOR("David E. Box <david.e.box@linux.intel.com>");
375 MODULE_DESCRIPTION("IOSF Mailbox Interface accessor");
376 MODULE_LICENSE("GPL v2");