1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
4 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
5 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
6 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
7 * 0xcf8 PCI configuration read/write.
9 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
10 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
11 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
13 #include <linux/export.h>
14 #include <linux/init.h>
15 #include <linux/pci.h>
16 #include <linux/acpi.h>
19 #include <asm/io_apic.h>
20 #include <asm/pci_x86.h>
22 #include <asm/xen/hypervisor.h>
24 #include <xen/features.h>
25 #include <xen/events.h>
26 #include <asm/xen/pci.h>
27 #include <asm/xen/cpuid.h>
30 #include <asm/i8259.h>
32 static int xen_pcifront_enable_irq(struct pci_dev *dev)
39 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
41 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
45 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
48 if (gsi < nr_legacy_irqs())
51 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
53 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
59 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
64 static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
67 int rc, pirq = -1, irq = -1;
68 struct physdev_map_pirq map_irq;
72 irq = xen_irq_from_gsi(gsi);
79 map_irq.domid = DOMID_SELF;
80 map_irq.type = MAP_PIRQ_TYPE_GSI;
84 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
86 printk(KERN_WARNING "xen map irq failed %d\n", rc);
90 if (triggering == ACPI_EDGE_SENSITIVE) {
95 name = "ioapic-level";
98 if (gsi_override >= 0)
101 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
105 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
110 static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
111 int trigger, int polarity)
113 if (!xen_hvm_domain())
116 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
117 false /* no mapping of GSI to PIRQ */);
120 #ifdef CONFIG_XEN_DOM0
121 static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
124 struct physdev_setup_gsi setup_gsi;
126 if (!xen_pv_domain())
129 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
130 gsi, triggering, polarity);
132 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
135 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
136 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
138 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
140 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
142 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
149 static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
150 int trigger, int polarity)
152 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
157 #if defined(CONFIG_PCI_MSI)
158 #include <linux/msi.h>
159 #include <asm/msidef.h>
161 struct xen_pci_frontend_ops *xen_pci_frontend;
162 EXPORT_SYMBOL_GPL(xen_pci_frontend);
164 static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
167 struct msi_desc *msidesc;
170 if (type == PCI_CAP_ID_MSI && nvec > 1)
173 v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL);
177 if (type == PCI_CAP_ID_MSIX)
178 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
180 ret = xen_pci_frontend_enable_msi(dev, v);
184 for_each_pci_msi_entry(msidesc, dev) {
185 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
186 (type == PCI_CAP_ID_MSI) ? nvec : 1,
187 (type == PCI_CAP_ID_MSIX) ?
202 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
204 dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
210 #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
211 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
213 static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
216 /* We set vector == 0 to tell the hypervisor we don't care about it,
217 * but we want a pirq setup instead.
218 * We use the dest_id field to pass the pirq that we want. */
219 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
222 MSI_ADDR_DEST_MODE_PHYSICAL |
223 MSI_ADDR_REDIRECTION_CPU |
224 MSI_ADDR_DEST_ID(pirq);
226 msg->data = XEN_PIRQ_MSI_DATA;
229 static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
232 struct msi_desc *msidesc;
235 if (type == PCI_CAP_ID_MSI && nvec > 1)
238 for_each_pci_msi_entry(msidesc, dev) {
239 pirq = xen_allocate_pirq_msi(dev, msidesc);
244 xen_msi_compose_msg(dev, pirq, &msg);
245 __pci_write_msi_msg(msidesc, &msg);
246 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
247 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
248 (type == PCI_CAP_ID_MSI) ? nvec : 1,
249 (type == PCI_CAP_ID_MSIX) ?
255 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
260 dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n",
261 type == PCI_CAP_ID_MSI ? "" : "-X", irq);
265 #ifdef CONFIG_XEN_DOM0
266 static bool __read_mostly pci_seg_supported = true;
268 static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
271 struct msi_desc *msidesc;
273 for_each_pci_msi_entry(msidesc, dev) {
274 struct physdev_map_pirq map_irq;
277 domid = ret = xen_find_device_domain_owner(dev);
278 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
279 * hence check ret value for < 0. */
283 memset(&map_irq, 0, sizeof(map_irq));
284 map_irq.domid = domid;
285 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
288 map_irq.bus = dev->bus->number |
289 (pci_domain_nr(dev->bus) << 16);
290 map_irq.devfn = dev->devfn;
292 if (type == PCI_CAP_ID_MSI && nvec > 1) {
293 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
294 map_irq.entry_nr = nvec;
295 } else if (type == PCI_CAP_ID_MSIX) {
298 u32 table_offset, bir;
301 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
303 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
304 flags = pci_resource_flags(dev, bir);
305 if (!flags || (flags & IORESOURCE_UNSET))
308 map_irq.table_base = pci_resource_start(dev, bir);
309 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
313 if (pci_seg_supported)
314 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
316 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
318 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
319 * there's nothing else we can do in this case.
320 * Just set ret > 0 so driver can retry with
326 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
327 map_irq.type = MAP_PIRQ_TYPE_MSI;
330 map_irq.bus = dev->bus->number;
331 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
334 pci_seg_supported = false;
337 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
342 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
343 (type == PCI_CAP_ID_MSI) ? nvec : 1,
344 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
354 static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
358 if (pci_seg_supported) {
359 struct physdev_pci_device restore_ext;
361 restore_ext.seg = pci_domain_nr(dev->bus);
362 restore_ext.bus = dev->bus->number;
363 restore_ext.devfn = dev->devfn;
364 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
367 pci_seg_supported = false;
368 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
370 if (!pci_seg_supported) {
371 struct physdev_restore_msi restore;
373 restore.bus = dev->bus->number;
374 restore.devfn = dev->devfn;
375 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
376 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
381 static void xen_teardown_msi_irqs(struct pci_dev *dev)
383 struct msi_desc *msidesc;
385 msidesc = first_pci_msi_entry(dev);
386 if (msidesc->msi_attrib.is_msix)
387 xen_pci_frontend_disable_msix(dev);
389 xen_pci_frontend_disable_msi(dev);
391 /* Free the IRQ's and the msidesc using the generic code. */
392 default_teardown_msi_irqs(dev);
395 static void xen_teardown_msi_irq(unsigned int irq)
397 xen_destroy_irq(irq);
402 int __init pci_xen_init(void)
404 if (!xen_pv_domain() || xen_initial_domain())
407 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
409 pcibios_set_cache_line_size();
411 pcibios_enable_irq = xen_pcifront_enable_irq;
412 pcibios_disable_irq = NULL;
414 /* Keep ACPI out of the picture */
417 #ifdef CONFIG_PCI_MSI
418 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
419 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
420 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
421 pci_msi_ignore_mask = 1;
426 #ifdef CONFIG_PCI_MSI
427 void __init xen_msi_init(void)
431 * If hardware supports (x2)APIC virtualization (as indicated
432 * by hypervisor's leaf 4) then we don't need to use pirqs/
433 * event channels for MSI handling and instead use regular
436 uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
438 if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
439 ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
443 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
444 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
446 * With XEN PIRQ/Eventchannels in use PCI/MSI[-X] masking is solely
447 * controlled by the hypervisor.
449 pci_msi_ignore_mask = 1;
453 int __init pci_xen_hvm_init(void)
455 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
460 * We don't want to change the actual ACPI delivery model,
461 * just how GSIs get registered.
463 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
464 __acpi_unregister_gsi = NULL;
467 #ifdef CONFIG_PCI_MSI
469 * We need to wait until after x2apic is initialized
470 * before we can set MSI IRQ ops.
472 x86_platform.apic_post_init = xen_msi_init;
477 #ifdef CONFIG_XEN_DOM0
478 int __init pci_xen_initial_domain(void)
482 #ifdef CONFIG_PCI_MSI
483 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
484 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
485 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
486 pci_msi_ignore_mask = 1;
488 __acpi_register_gsi = acpi_register_gsi_xen;
489 __acpi_unregister_gsi = NULL;
491 * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here
492 * because we don't have a PIC and thus nr_legacy_irqs() is zero.
494 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
495 int trigger, polarity;
497 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
500 xen_register_pirq(irq, -1 /* no GSI override */,
501 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
502 true /* Map GSI to PIRQ */);
504 if (0 == nr_ioapics) {
505 for (irq = 0; irq < nr_legacy_irqs(); irq++)
506 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
511 struct xen_device_domain_owner {
514 struct list_head list;
517 static DEFINE_SPINLOCK(dev_domain_list_spinlock);
518 static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
520 static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
522 struct xen_device_domain_owner *owner;
524 list_for_each_entry(owner, &dev_domain_list, list) {
525 if (owner->dev == dev)
531 int xen_find_device_domain_owner(struct pci_dev *dev)
533 struct xen_device_domain_owner *owner;
534 int domain = -ENODEV;
536 spin_lock(&dev_domain_list_spinlock);
537 owner = find_device(dev);
539 domain = owner->domain;
540 spin_unlock(&dev_domain_list_spinlock);
543 EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
545 int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
547 struct xen_device_domain_owner *owner;
549 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
553 spin_lock(&dev_domain_list_spinlock);
554 if (find_device(dev)) {
555 spin_unlock(&dev_domain_list_spinlock);
559 owner->domain = domain;
561 list_add_tail(&owner->list, &dev_domain_list);
562 spin_unlock(&dev_domain_list_spinlock);
565 EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
567 int xen_unregister_device_domain_owner(struct pci_dev *dev)
569 struct xen_device_domain_owner *owner;
571 spin_lock(&dev_domain_list_spinlock);
572 owner = find_device(dev);
574 spin_unlock(&dev_domain_list_spinlock);
577 list_del(&owner->list);
578 spin_unlock(&dev_domain_list_spinlock);
582 EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);