2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
36 unsigned long numpages;
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
55 #define CPA_FREE_PAGETABLES 8
58 static unsigned long direct_pages_count[PG_LEVEL_NUM];
60 void update_page_count(int level, unsigned long pages)
62 /* Protect against CPA */
64 direct_pages_count[level] += pages;
65 spin_unlock(&pgd_lock);
68 static void split_page_count(int level)
70 if (direct_pages_count[level] == 0)
73 direct_pages_count[level]--;
74 direct_pages_count[level - 1] += PTRS_PER_PTE;
77 void arch_report_meminfo(struct seq_file *m)
79 seq_printf(m, "DirectMap4k: %8lu kB\n",
80 direct_pages_count[PG_LEVEL_4K] << 2);
81 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
82 seq_printf(m, "DirectMap2M: %8lu kB\n",
83 direct_pages_count[PG_LEVEL_2M] << 11);
85 seq_printf(m, "DirectMap4M: %8lu kB\n",
86 direct_pages_count[PG_LEVEL_2M] << 12);
89 seq_printf(m, "DirectMap1G: %8lu kB\n",
90 direct_pages_count[PG_LEVEL_1G] << 20);
93 static inline void split_page_count(int level) { }
98 static inline unsigned long highmap_start_pfn(void)
100 return __pa_symbol(_text) >> PAGE_SHIFT;
103 static inline unsigned long highmap_end_pfn(void)
105 /* Do not reference physical address outside the kernel. */
106 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
112 within(unsigned long addr, unsigned long start, unsigned long end)
114 return addr >= start && addr < end;
118 within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
120 return addr >= start && addr <= end;
128 * clflush_cache_range - flush a cache range with clflush
129 * @vaddr: virtual start address
130 * @size: number of bytes to flush
132 * clflushopt is an unordered instruction which needs fencing with mfence or
133 * sfence to avoid ordering issues.
135 void clflush_cache_range(void *vaddr, unsigned int size)
137 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
138 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
139 void *vend = vaddr + size;
146 for (; p < vend; p += clflush_size)
151 EXPORT_SYMBOL_GPL(clflush_cache_range);
153 static void __cpa_flush_all(void *arg)
155 unsigned long cache = (unsigned long)arg;
158 * Flush all to work around Errata in early athlons regarding
159 * large page flushing.
163 if (cache && boot_cpu_data.x86 >= 4)
167 static void cpa_flush_all(unsigned long cache)
169 BUG_ON(irqs_disabled());
171 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
174 static void __cpa_flush_range(void *arg)
177 * We could optimize that further and do individual per page
178 * tlb invalidates for a low number of pages. Caveat: we must
179 * flush the high aliases on 64bit as well.
184 static void cpa_flush_range(unsigned long start, int numpages, int cache)
186 unsigned int i, level;
189 BUG_ON(irqs_disabled());
190 WARN_ON(PAGE_ALIGN(start) != start);
192 on_each_cpu(__cpa_flush_range, NULL, 1);
198 * We only need to flush on one CPU,
199 * clflush is a MESI-coherent instruction that
200 * will cause all other CPUs to flush the same
203 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
204 pte_t *pte = lookup_address(addr, &level);
207 * Only flush present addresses:
209 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
210 clflush_cache_range((void *) addr, PAGE_SIZE);
214 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
215 int in_flags, struct page **pages)
217 unsigned int i, level;
218 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
220 BUG_ON(irqs_disabled());
222 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
224 if (!cache || do_wbinvd)
228 * We only need to flush on one CPU,
229 * clflush is a MESI-coherent instruction that
230 * will cause all other CPUs to flush the same
233 for (i = 0; i < numpages; i++) {
237 if (in_flags & CPA_PAGES_ARRAY)
238 addr = (unsigned long)page_address(pages[i]);
242 pte = lookup_address(addr, &level);
245 * Only flush present addresses:
247 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
248 clflush_cache_range((void *)addr, PAGE_SIZE);
253 * Certain areas of memory on x86 require very specific protection flags,
254 * for example the BIOS area or kernel text. Callers don't always get this
255 * right (again, ioremap() on BIOS memory is not uncommon) so this function
256 * checks and fixes these known static required protection bits.
258 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
261 pgprot_t forbidden = __pgprot(0);
264 * The BIOS area between 640k and 1Mb needs to be executable for
265 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
267 #ifdef CONFIG_PCI_BIOS
268 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
269 pgprot_val(forbidden) |= _PAGE_NX;
273 * The kernel text needs to be executable for obvious reasons
274 * Does not cover __inittext since that is gone later on. On
275 * 64bit we do not enforce !NX on the low mapping
277 if (within(address, (unsigned long)_text, (unsigned long)_etext))
278 pgprot_val(forbidden) |= _PAGE_NX;
281 * The .rodata section needs to be read-only. Using the pfn
282 * catches all aliases. This also includes __ro_after_init,
283 * so do not enforce until kernel_set_to_readonly is true.
285 if (kernel_set_to_readonly &&
286 within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
287 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
288 pgprot_val(forbidden) |= _PAGE_RW;
290 #if defined(CONFIG_X86_64)
292 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
293 * kernel text mappings for the large page aligned text, rodata sections
294 * will be always read-only. For the kernel identity mappings covering
295 * the holes caused by this alignment can be anything that user asks.
297 * This will preserve the large page mappings for kernel text/data
300 if (kernel_set_to_readonly &&
301 within(address, (unsigned long)_text,
302 (unsigned long)__end_rodata_hpage_align)) {
306 * Don't enforce the !RW mapping for the kernel text mapping,
307 * if the current mapping is already using small page mapping.
308 * No need to work hard to preserve large page mappings in this
311 * This also fixes the Linux Xen paravirt guest boot failure
312 * (because of unexpected read-only mappings for kernel identity
313 * mappings). In this paravirt guest case, the kernel text
314 * mapping and the kernel identity mapping share the same
315 * page-table pages. Thus we can't really use different
316 * protections for the kernel text and identity mappings. Also,
317 * these shared mappings are made of small page mappings.
318 * Thus this don't enforce !RW mapping for small page kernel
319 * text mapping logic will help Linux Xen parvirt guest boot
322 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
323 pgprot_val(forbidden) |= _PAGE_RW;
327 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
333 * Lookup the page table entry for a virtual address in a specific pgd.
334 * Return a pointer to the entry and the level of the mapping.
336 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
342 *level = PG_LEVEL_NONE;
347 pud = pud_offset(pgd, address);
351 *level = PG_LEVEL_1G;
352 if (pud_large(*pud) || !pud_present(*pud))
355 pmd = pmd_offset(pud, address);
359 *level = PG_LEVEL_2M;
360 if (pmd_large(*pmd) || !pmd_present(*pmd))
363 *level = PG_LEVEL_4K;
365 return pte_offset_kernel(pmd, address);
369 * Lookup the page table entry for a virtual address. Return a pointer
370 * to the entry and the level of the mapping.
372 * Note: We return pud and pmd either when the entry is marked large
373 * or when the present bit is not set. Otherwise we would return a
374 * pointer to a nonexisting mapping.
376 pte_t *lookup_address(unsigned long address, unsigned int *level)
378 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
380 EXPORT_SYMBOL_GPL(lookup_address);
382 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
386 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
389 return lookup_address(address, level);
393 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
394 * or NULL if not present.
396 pmd_t *lookup_pmd_address(unsigned long address)
401 pgd = pgd_offset_k(address);
405 pud = pud_offset(pgd, address);
406 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
409 return pmd_offset(pud, address);
413 * This is necessary because __pa() does not work on some
414 * kinds of memory, like vmalloc() or the alloc_remap()
415 * areas on 32-bit NUMA systems. The percpu areas can
416 * end up in this kind of memory, for instance.
418 * This could be optimized, but it is only intended to be
419 * used at inititalization time, and keeping it
420 * unoptimized should increase the testing coverage for
421 * the more obscure platforms.
423 phys_addr_t slow_virt_to_phys(void *__virt_addr)
425 unsigned long virt_addr = (unsigned long)__virt_addr;
426 phys_addr_t phys_addr;
427 unsigned long offset;
431 pte = lookup_address(virt_addr, &level);
435 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
436 * before being left-shifted PAGE_SHIFT bits -- this trick is to
437 * make 32-PAE kernel work correctly.
441 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
442 offset = virt_addr & ~PUD_PAGE_MASK;
445 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
446 offset = virt_addr & ~PMD_PAGE_MASK;
449 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
450 offset = virt_addr & ~PAGE_MASK;
453 return (phys_addr_t)(phys_addr | offset);
455 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
458 * Set the new pmd in all the pgds we know about:
460 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
463 set_pte_atomic(kpte, pte);
465 if (!SHARED_KERNEL_PMD) {
468 list_for_each_entry(page, &pgd_list, lru) {
473 pgd = (pgd_t *)page_address(page) + pgd_index(address);
474 pud = pud_offset(pgd, address);
475 pmd = pmd_offset(pud, address);
476 set_pte_atomic((pte_t *)pmd, pte);
483 try_preserve_large_page(pte_t *kpte, unsigned long address,
484 struct cpa_data *cpa)
486 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
487 pte_t new_pte, old_pte, *tmp;
488 pgprot_t old_prot, new_prot, req_prot;
492 if (cpa->force_split)
495 spin_lock(&pgd_lock);
497 * Check for races, another CPU might have split this page
500 tmp = _lookup_address_cpa(cpa, address, &level);
506 old_prot = pmd_pgprot(*(pmd_t *)kpte);
507 old_pfn = pmd_pfn(*(pmd_t *)kpte);
510 old_prot = pud_pgprot(*(pud_t *)kpte);
511 old_pfn = pud_pfn(*(pud_t *)kpte);
518 psize = page_level_size(level);
519 pmask = page_level_mask(level);
522 * Calculate the number of pages, which fit into this large
523 * page starting at address:
525 nextpage_addr = (address + psize) & pmask;
526 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
527 if (numpages < cpa->numpages)
528 cpa->numpages = numpages;
531 * We are safe now. Check whether the new pgprot is the same:
532 * Convert protection attributes to 4k-format, as cpa->mask* are set
536 req_prot = pgprot_large_2_4k(old_prot);
538 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
539 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
542 * req_prot is in format of 4k pages. It must be converted to large
543 * page format: the caching mode includes the PAT bit located at
544 * different bit positions in the two formats.
546 req_prot = pgprot_4k_2_large(req_prot);
549 * Set the PSE and GLOBAL flags only if the PRESENT flag is
550 * set otherwise pmd_present/pmd_huge will return true even on
551 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
552 * for the ancient hardware that doesn't support it.
554 if (pgprot_val(req_prot) & _PAGE_PRESENT)
555 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
557 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
559 req_prot = canon_pgprot(req_prot);
562 * old_pfn points to the large page base pfn. So we need
563 * to add the offset of the virtual address:
565 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
568 new_prot = static_protections(req_prot, address, pfn);
571 * We need to check the full range, whether
572 * static_protection() requires a different pgprot for one of
573 * the pages in the range we try to preserve:
575 addr = address & pmask;
577 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
578 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
580 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
585 * If there are no changes, return. maxpages has been updated
588 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
594 * We need to change the attributes. Check, whether we can
595 * change the large page in one go. We request a split, when
596 * the address is not aligned and the number of pages is
597 * smaller than the number of pages in the large page. Note
598 * that we limited the number of possible pages already to
599 * the number of pages in the large page.
601 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
603 * The address is aligned and the number of pages
604 * covers the full page.
606 new_pte = pfn_pte(old_pfn, new_prot);
607 __set_pmd_pte(kpte, address, new_pte);
608 cpa->flags |= CPA_FLUSHTLB;
613 spin_unlock(&pgd_lock);
619 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
622 pte_t *pbase = (pte_t *)page_address(base);
623 unsigned long ref_pfn, pfn, pfninc = 1;
624 unsigned int i, level;
628 spin_lock(&pgd_lock);
630 * Check for races, another CPU might have split this page
633 tmp = _lookup_address_cpa(cpa, address, &level);
635 spin_unlock(&pgd_lock);
639 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
643 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
644 /* clear PSE and promote PAT bit to correct position */
645 ref_prot = pgprot_large_2_4k(ref_prot);
646 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
650 ref_prot = pud_pgprot(*(pud_t *)kpte);
651 ref_pfn = pud_pfn(*(pud_t *)kpte);
652 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
655 * Clear the PSE flags if the PRESENT flag is not set
656 * otherwise pmd_present/pmd_huge will return true
657 * even on a non present pmd.
659 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
660 pgprot_val(ref_prot) &= ~_PAGE_PSE;
664 spin_unlock(&pgd_lock);
669 * Set the GLOBAL flags only if the PRESENT flag is set
670 * otherwise pmd/pte_present will return true even on a non
671 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
672 * for the ancient hardware that doesn't support it.
674 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
675 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
677 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
680 * Get the target pfn from the original entry:
683 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
684 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
686 if (virt_addr_valid(address)) {
687 unsigned long pfn = PFN_DOWN(__pa(address));
689 if (pfn_range_is_mapped(pfn, pfn + 1))
690 split_page_count(level);
694 * Install the new, split up pagetable.
696 * We use the standard kernel pagetable protections for the new
697 * pagetable protections, the actual ptes set above control the
698 * primary protection behavior:
700 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
703 * Intel Atom errata AAH41 workaround.
705 * The real fix should be in hw or in a microcode update, but
706 * we also probabilistically try to reduce the window of having
707 * a large TLB mixed with 4K TLBs while instruction fetches are
711 spin_unlock(&pgd_lock);
716 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
717 unsigned long address)
721 if (!debug_pagealloc_enabled())
722 spin_unlock(&cpa_lock);
723 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
724 if (!debug_pagealloc_enabled())
725 spin_lock(&cpa_lock);
729 if (__split_large_page(cpa, kpte, address, base))
735 static bool try_to_free_pte_page(struct cpa_data *cpa, pte_t *pte)
739 if (!(cpa->flags & CPA_FREE_PAGETABLES))
742 for (i = 0; i < PTRS_PER_PTE; i++)
743 if (!pte_none(pte[i]))
746 free_page((unsigned long)pte);
750 static bool try_to_free_pmd_page(struct cpa_data *cpa, pmd_t *pmd)
754 if (!(cpa->flags & CPA_FREE_PAGETABLES))
757 for (i = 0; i < PTRS_PER_PMD; i++)
758 if (!pmd_none(pmd[i]))
761 free_page((unsigned long)pmd);
765 static bool unmap_pte_range(struct cpa_data *cpa, pmd_t *pmd,
769 pte_t *pte = pte_offset_kernel(pmd, start);
771 while (start < end) {
772 set_pte(pte, __pte(0));
778 if (try_to_free_pte_page(cpa, (pte_t *)pmd_page_vaddr(*pmd))) {
785 static void __unmap_pmd_range(struct cpa_data *cpa, pud_t *pud, pmd_t *pmd,
786 unsigned long start, unsigned long end)
788 if (unmap_pte_range(cpa, pmd, start, end))
789 if (try_to_free_pmd_page(cpa, (pmd_t *)pud_page_vaddr(*pud)))
793 static void unmap_pmd_range(struct cpa_data *cpa, pud_t *pud,
794 unsigned long start, unsigned long end)
796 pmd_t *pmd = pmd_offset(pud, start);
799 * Not on a 2MB page boundary?
801 if (start & (PMD_SIZE - 1)) {
802 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
803 unsigned long pre_end = min_t(unsigned long, end, next_page);
805 __unmap_pmd_range(cpa, pud, pmd, start, pre_end);
812 * Try to unmap in 2M chunks.
814 while (end - start >= PMD_SIZE) {
818 __unmap_pmd_range(cpa, pud, pmd,
819 start, start + PMD_SIZE);
829 return __unmap_pmd_range(cpa, pud, pmd, start, end);
832 * Try again to free the PMD page if haven't succeeded above.
835 if (try_to_free_pmd_page(cpa, (pmd_t *)pud_page_vaddr(*pud)))
839 static void __unmap_pud_range(struct cpa_data *cpa, pgd_t *pgd,
843 pud_t *pud = pud_offset(pgd, start);
846 * Not on a GB page boundary?
848 if (start & (PUD_SIZE - 1)) {
849 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
850 unsigned long pre_end = min_t(unsigned long, end, next_page);
852 unmap_pmd_range(cpa, pud, start, pre_end);
859 * Try to unmap in 1G chunks?
861 while (end - start >= PUD_SIZE) {
866 unmap_pmd_range(cpa, pud, start, start + PUD_SIZE);
876 unmap_pmd_range(cpa, pud, start, end);
879 * No need to try to free the PUD page because we'll free it in
880 * populate_pgd's error path
884 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
886 struct cpa_data cpa = {
887 .flags = CPA_FREE_PAGETABLES,
890 __unmap_pud_range(&cpa, pgd, start, end);
893 void unmap_pud_range_nofree(pgd_t *pgd, unsigned long start, unsigned long end)
895 struct cpa_data cpa = {
899 __unmap_pud_range(&cpa, pgd, start, end);
902 static int alloc_pte_page(pmd_t *pmd)
904 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
908 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
912 static int alloc_pmd_page(pud_t *pud)
914 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
918 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
922 static void populate_pte(struct cpa_data *cpa,
923 unsigned long start, unsigned long end,
924 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
928 pte = pte_offset_kernel(pmd, start);
931 * Set the GLOBAL flags only if the PRESENT flag is
932 * set otherwise pte_present will return true even on
933 * a non present pte. The canon_pgprot will clear
934 * _PAGE_GLOBAL for the ancient hardware that doesn't
937 if (pgprot_val(pgprot) & _PAGE_PRESENT)
938 pgprot_val(pgprot) |= _PAGE_GLOBAL;
940 pgprot_val(pgprot) &= ~_PAGE_GLOBAL;
942 pgprot = canon_pgprot(pgprot);
944 while (num_pages-- && start < end) {
945 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
953 static long populate_pmd(struct cpa_data *cpa,
954 unsigned long start, unsigned long end,
955 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
962 * Not on a 2M boundary?
964 if (start & (PMD_SIZE - 1)) {
965 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
966 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
968 pre_end = min_t(unsigned long, pre_end, next_page);
969 cur_pages = (pre_end - start) >> PAGE_SHIFT;
970 cur_pages = min_t(unsigned int, num_pages, cur_pages);
975 pmd = pmd_offset(pud, start);
977 if (alloc_pte_page(pmd))
980 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
986 * We mapped them all?
988 if (num_pages == cur_pages)
991 pmd_pgprot = pgprot_4k_2_large(pgprot);
993 while (end - start >= PMD_SIZE) {
996 * We cannot use a 1G page so allocate a PMD page if needed.
999 if (alloc_pmd_page(pud))
1002 pmd = pmd_offset(pud, start);
1004 set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
1005 canon_pgprot(pmd_pgprot))));
1008 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1009 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1013 * Map trailing 4K pages.
1016 pmd = pmd_offset(pud, start);
1018 if (alloc_pte_page(pmd))
1021 populate_pte(cpa, start, end, num_pages - cur_pages,
1027 static long populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
1033 pgprot_t pud_pgprot;
1035 end = start + (cpa->numpages << PAGE_SHIFT);
1038 * Not on a Gb page boundary? => map everything up to it with
1041 if (start & (PUD_SIZE - 1)) {
1042 unsigned long pre_end;
1043 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1045 pre_end = min_t(unsigned long, end, next_page);
1046 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1047 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1049 pud = pud_offset(pgd, start);
1055 if (alloc_pmd_page(pud))
1058 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1066 /* We mapped them all? */
1067 if (cpa->numpages == cur_pages)
1070 pud = pud_offset(pgd, start);
1071 pud_pgprot = pgprot_4k_2_large(pgprot);
1074 * Map everything starting from the Gb boundary, possibly with 1G pages
1076 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1077 set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
1078 canon_pgprot(pud_pgprot))));
1081 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1082 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1086 /* Map trailing leftover */
1090 pud = pud_offset(pgd, start);
1092 if (alloc_pmd_page(pud))
1095 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1106 * Restrictions for kernel page table do not necessarily apply when mapping in
1109 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1111 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1112 pud_t *pud = NULL; /* shut up gcc */
1116 pgd_entry = cpa->pgd + pgd_index(addr);
1119 * Allocate a PUD page and hand it down for mapping.
1121 if (pgd_none(*pgd_entry)) {
1122 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1126 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1129 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1130 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1132 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1135 * Leave the PUD page in place in case some other CPU or thread
1136 * already found it, but remove any useless entries we just
1139 unmap_pud_range(pgd_entry, addr,
1140 addr + (cpa->numpages << PAGE_SHIFT));
1144 cpa->numpages = ret;
1148 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1153 * Right now, we only execute this code path when mapping
1154 * the EFI virtual memory map regions, no other users
1155 * provide a ->pgd value. This may change in the future.
1157 return populate_pgd(cpa, vaddr);
1161 * Ignore all non primary paths.
1169 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1171 * Also set numpages to '1' indicating that we processed cpa req for
1172 * one virtual address page and its pfn. TBD: numpages can be set based
1173 * on the initial value and the level returned by lookup_address().
1175 if (within(vaddr, PAGE_OFFSET,
1176 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1178 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1181 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1182 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1189 static int __change_page_attr(struct cpa_data *cpa, int primary)
1191 unsigned long address;
1194 pte_t *kpte, old_pte;
1196 if (cpa->flags & CPA_PAGES_ARRAY) {
1197 struct page *page = cpa->pages[cpa->curpage];
1198 if (unlikely(PageHighMem(page)))
1200 address = (unsigned long)page_address(page);
1201 } else if (cpa->flags & CPA_ARRAY)
1202 address = cpa->vaddr[cpa->curpage];
1204 address = *cpa->vaddr;
1206 kpte = _lookup_address_cpa(cpa, address, &level);
1208 return __cpa_process_fault(cpa, address, primary);
1211 if (pte_none(old_pte))
1212 return __cpa_process_fault(cpa, address, primary);
1214 if (level == PG_LEVEL_4K) {
1216 pgprot_t new_prot = pte_pgprot(old_pte);
1217 unsigned long pfn = pte_pfn(old_pte);
1219 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1220 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1222 new_prot = static_protections(new_prot, address, pfn);
1225 * Set the GLOBAL flags only if the PRESENT flag is
1226 * set otherwise pte_present will return true even on
1227 * a non present pte. The canon_pgprot will clear
1228 * _PAGE_GLOBAL for the ancient hardware that doesn't
1231 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1232 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1234 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1237 * We need to keep the pfn from the existing PTE,
1238 * after all we're only going to change it's attributes
1239 * not the memory it points to
1241 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1244 * Do we really change anything ?
1246 if (pte_val(old_pte) != pte_val(new_pte)) {
1247 set_pte_atomic(kpte, new_pte);
1248 cpa->flags |= CPA_FLUSHTLB;
1255 * Check, whether we can keep the large page intact
1256 * and just change the pte:
1258 do_split = try_preserve_large_page(kpte, address, cpa);
1260 * When the range fits into the existing large page,
1261 * return. cp->numpages and cpa->tlbflush have been updated in
1268 * We have to split the large page:
1270 err = split_large_page(cpa, kpte, address);
1273 * Do a global flush tlb after splitting the large page
1274 * and before we do the actual change page attribute in the PTE.
1276 * With out this, we violate the TLB application note, that says
1277 * "The TLBs may contain both ordinary and large-page
1278 * translations for a 4-KByte range of linear addresses. This
1279 * may occur if software modifies the paging structures so that
1280 * the page size used for the address range changes. If the two
1281 * translations differ with respect to page frame or attributes
1282 * (e.g., permissions), processor behavior is undefined and may
1283 * be implementation-specific."
1285 * We do this global tlb flush inside the cpa_lock, so that we
1286 * don't allow any other cpu, with stale tlb entries change the
1287 * page attribute in parallel, that also falls into the
1288 * just split large page entry.
1297 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1299 static int cpa_process_alias(struct cpa_data *cpa)
1301 struct cpa_data alias_cpa;
1302 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1303 unsigned long vaddr;
1306 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1310 * No need to redo, when the primary call touched the direct
1313 if (cpa->flags & CPA_PAGES_ARRAY) {
1314 struct page *page = cpa->pages[cpa->curpage];
1315 if (unlikely(PageHighMem(page)))
1317 vaddr = (unsigned long)page_address(page);
1318 } else if (cpa->flags & CPA_ARRAY)
1319 vaddr = cpa->vaddr[cpa->curpage];
1321 vaddr = *cpa->vaddr;
1323 if (!(within(vaddr, PAGE_OFFSET,
1324 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1327 alias_cpa.vaddr = &laddr;
1328 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1330 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1335 #ifdef CONFIG_X86_64
1337 * If the primary call didn't touch the high mapping already
1338 * and the physical address is inside the kernel map, we need
1339 * to touch the high mapped kernel as well:
1341 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1342 within_inclusive(cpa->pfn, highmap_start_pfn(),
1343 highmap_end_pfn())) {
1344 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1345 __START_KERNEL_map - phys_base;
1347 alias_cpa.vaddr = &temp_cpa_vaddr;
1348 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1351 * The high mapping range is imprecise, so ignore the
1354 __change_page_attr_set_clr(&alias_cpa, 0);
1361 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1363 unsigned long numpages = cpa->numpages;
1368 * Store the remaining nr of pages for the large page
1369 * preservation check.
1371 cpa->numpages = numpages;
1372 /* for array changes, we can't use large page */
1373 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1376 if (!debug_pagealloc_enabled())
1377 spin_lock(&cpa_lock);
1378 ret = __change_page_attr(cpa, checkalias);
1379 if (!debug_pagealloc_enabled())
1380 spin_unlock(&cpa_lock);
1385 ret = cpa_process_alias(cpa);
1391 * Adjust the number of pages with the result of the
1392 * CPA operation. Either a large page has been
1393 * preserved or a single page update happened.
1395 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1396 numpages -= cpa->numpages;
1397 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1400 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1406 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1407 pgprot_t mask_set, pgprot_t mask_clr,
1408 int force_split, int in_flag,
1409 struct page **pages)
1411 struct cpa_data cpa;
1412 int ret, cache, checkalias;
1413 unsigned long baddr = 0;
1415 memset(&cpa, 0, sizeof(cpa));
1418 * Check, if we are requested to change a not supported
1421 mask_set = canon_pgprot(mask_set);
1422 mask_clr = canon_pgprot(mask_clr);
1423 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1426 /* Ensure we are PAGE_SIZE aligned */
1427 if (in_flag & CPA_ARRAY) {
1429 for (i = 0; i < numpages; i++) {
1430 if (addr[i] & ~PAGE_MASK) {
1431 addr[i] &= PAGE_MASK;
1435 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1437 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1438 * No need to cehck in that case
1440 if (*addr & ~PAGE_MASK) {
1443 * People should not be passing in unaligned addresses:
1448 * Save address for cache flush. *addr is modified in the call
1449 * to __change_page_attr_set_clr() below.
1454 /* Must avoid aliasing mappings in the highmem code */
1455 kmap_flush_unused();
1461 cpa.numpages = numpages;
1462 cpa.mask_set = mask_set;
1463 cpa.mask_clr = mask_clr;
1466 cpa.force_split = force_split;
1468 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1469 cpa.flags |= in_flag;
1471 /* No alias checking for _NX bit modifications */
1472 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1474 ret = __change_page_attr_set_clr(&cpa, checkalias);
1477 * Check whether we really changed something:
1479 if (!(cpa.flags & CPA_FLUSHTLB))
1483 * No need to flush, when we did not set any of the caching
1486 cache = !!pgprot2cachemode(mask_set);
1489 * On success we use CLFLUSH, when the CPU supports it to
1490 * avoid the WBINVD. If the CPU does not support it and in the
1491 * error case we fall back to cpa_flush_all (which uses
1494 if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1495 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1496 cpa_flush_array(addr, numpages, cache,
1499 cpa_flush_range(baddr, numpages, cache);
1501 cpa_flush_all(cache);
1507 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1508 pgprot_t mask, int array)
1510 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1511 (array ? CPA_ARRAY : 0), NULL);
1514 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1515 pgprot_t mask, int array)
1517 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1518 (array ? CPA_ARRAY : 0), NULL);
1521 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1524 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1525 CPA_PAGES_ARRAY, pages);
1528 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1531 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1532 CPA_PAGES_ARRAY, pages);
1535 int _set_memory_uc(unsigned long addr, int numpages)
1538 * for now UC MINUS. see comments in ioremap_nocache()
1539 * If you really need strong UC use ioremap_uc(), but note
1540 * that you cannot override IO areas with set_memory_*() as
1541 * these helpers cannot work with IO memory.
1543 return change_page_attr_set(&addr, numpages,
1544 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1548 int set_memory_uc(unsigned long addr, int numpages)
1553 * for now UC MINUS. see comments in ioremap_nocache()
1555 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1556 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1560 ret = _set_memory_uc(addr, numpages);
1567 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1571 EXPORT_SYMBOL(set_memory_uc);
1573 static int _set_memory_array(unsigned long *addr, int addrinarray,
1574 enum page_cache_mode new_type)
1576 enum page_cache_mode set_type;
1580 for (i = 0; i < addrinarray; i++) {
1581 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1587 /* If WC, set to UC- first and then WC */
1588 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1589 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1591 ret = change_page_attr_set(addr, addrinarray,
1592 cachemode2pgprot(set_type), 1);
1594 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1595 ret = change_page_attr_set_clr(addr, addrinarray,
1597 _PAGE_CACHE_MODE_WC),
1598 __pgprot(_PAGE_CACHE_MASK),
1599 0, CPA_ARRAY, NULL);
1606 for (j = 0; j < i; j++)
1607 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1612 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1614 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1616 EXPORT_SYMBOL(set_memory_array_uc);
1618 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1620 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1622 EXPORT_SYMBOL(set_memory_array_wc);
1624 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1626 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1628 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1630 int _set_memory_wc(unsigned long addr, int numpages)
1633 unsigned long addr_copy = addr;
1635 ret = change_page_attr_set(&addr, numpages,
1636 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1639 ret = change_page_attr_set_clr(&addr_copy, numpages,
1641 _PAGE_CACHE_MODE_WC),
1642 __pgprot(_PAGE_CACHE_MASK),
1648 int set_memory_wc(unsigned long addr, int numpages)
1652 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1653 _PAGE_CACHE_MODE_WC, NULL);
1657 ret = _set_memory_wc(addr, numpages);
1659 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1663 EXPORT_SYMBOL(set_memory_wc);
1665 int _set_memory_wt(unsigned long addr, int numpages)
1667 return change_page_attr_set(&addr, numpages,
1668 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1671 int set_memory_wt(unsigned long addr, int numpages)
1675 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1676 _PAGE_CACHE_MODE_WT, NULL);
1680 ret = _set_memory_wt(addr, numpages);
1682 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1686 EXPORT_SYMBOL_GPL(set_memory_wt);
1688 int _set_memory_wb(unsigned long addr, int numpages)
1690 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1691 return change_page_attr_clear(&addr, numpages,
1692 __pgprot(_PAGE_CACHE_MASK), 0);
1695 int set_memory_wb(unsigned long addr, int numpages)
1699 ret = _set_memory_wb(addr, numpages);
1703 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1706 EXPORT_SYMBOL(set_memory_wb);
1708 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1713 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1714 ret = change_page_attr_clear(addr, addrinarray,
1715 __pgprot(_PAGE_CACHE_MASK), 1);
1719 for (i = 0; i < addrinarray; i++)
1720 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1724 EXPORT_SYMBOL(set_memory_array_wb);
1726 int set_memory_x(unsigned long addr, int numpages)
1728 if (!(__supported_pte_mask & _PAGE_NX))
1731 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1733 EXPORT_SYMBOL(set_memory_x);
1735 int set_memory_nx(unsigned long addr, int numpages)
1737 if (!(__supported_pte_mask & _PAGE_NX))
1740 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1742 EXPORT_SYMBOL(set_memory_nx);
1744 int set_memory_ro(unsigned long addr, int numpages)
1746 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1749 int set_memory_rw(unsigned long addr, int numpages)
1751 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1754 int set_memory_np(unsigned long addr, int numpages)
1756 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1759 int set_memory_4k(unsigned long addr, int numpages)
1761 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1762 __pgprot(0), 1, 0, NULL);
1765 int set_pages_uc(struct page *page, int numpages)
1767 unsigned long addr = (unsigned long)page_address(page);
1769 return set_memory_uc(addr, numpages);
1771 EXPORT_SYMBOL(set_pages_uc);
1773 static int _set_pages_array(struct page **pages, int addrinarray,
1774 enum page_cache_mode new_type)
1776 unsigned long start;
1778 enum page_cache_mode set_type;
1783 for (i = 0; i < addrinarray; i++) {
1784 if (PageHighMem(pages[i]))
1786 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1787 end = start + PAGE_SIZE;
1788 if (reserve_memtype(start, end, new_type, NULL))
1792 /* If WC, set to UC- first and then WC */
1793 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1794 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1796 ret = cpa_set_pages_array(pages, addrinarray,
1797 cachemode2pgprot(set_type));
1798 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1799 ret = change_page_attr_set_clr(NULL, addrinarray,
1801 _PAGE_CACHE_MODE_WC),
1802 __pgprot(_PAGE_CACHE_MASK),
1803 0, CPA_PAGES_ARRAY, pages);
1806 return 0; /* Success */
1809 for (i = 0; i < free_idx; i++) {
1810 if (PageHighMem(pages[i]))
1812 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1813 end = start + PAGE_SIZE;
1814 free_memtype(start, end);
1819 int set_pages_array_uc(struct page **pages, int addrinarray)
1821 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1823 EXPORT_SYMBOL(set_pages_array_uc);
1825 int set_pages_array_wc(struct page **pages, int addrinarray)
1827 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1829 EXPORT_SYMBOL(set_pages_array_wc);
1831 int set_pages_array_wt(struct page **pages, int addrinarray)
1833 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1835 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1837 int set_pages_wb(struct page *page, int numpages)
1839 unsigned long addr = (unsigned long)page_address(page);
1841 return set_memory_wb(addr, numpages);
1843 EXPORT_SYMBOL(set_pages_wb);
1845 int set_pages_array_wb(struct page **pages, int addrinarray)
1848 unsigned long start;
1852 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1853 retval = cpa_clear_pages_array(pages, addrinarray,
1854 __pgprot(_PAGE_CACHE_MASK));
1858 for (i = 0; i < addrinarray; i++) {
1859 if (PageHighMem(pages[i]))
1861 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1862 end = start + PAGE_SIZE;
1863 free_memtype(start, end);
1868 EXPORT_SYMBOL(set_pages_array_wb);
1870 int set_pages_x(struct page *page, int numpages)
1872 unsigned long addr = (unsigned long)page_address(page);
1874 return set_memory_x(addr, numpages);
1876 EXPORT_SYMBOL(set_pages_x);
1878 int set_pages_nx(struct page *page, int numpages)
1880 unsigned long addr = (unsigned long)page_address(page);
1882 return set_memory_nx(addr, numpages);
1884 EXPORT_SYMBOL(set_pages_nx);
1886 int set_pages_ro(struct page *page, int numpages)
1888 unsigned long addr = (unsigned long)page_address(page);
1890 return set_memory_ro(addr, numpages);
1893 int set_pages_rw(struct page *page, int numpages)
1895 unsigned long addr = (unsigned long)page_address(page);
1897 return set_memory_rw(addr, numpages);
1900 #ifdef CONFIG_DEBUG_PAGEALLOC
1902 static int __set_pages_p(struct page *page, int numpages)
1904 unsigned long tempaddr = (unsigned long) page_address(page);
1905 struct cpa_data cpa = { .vaddr = &tempaddr,
1907 .numpages = numpages,
1908 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1909 .mask_clr = __pgprot(0),
1913 * No alias checking needed for setting present flag. otherwise,
1914 * we may need to break large pages for 64-bit kernel text
1915 * mappings (this adds to complexity if we want to do this from
1916 * atomic context especially). Let's keep it simple!
1918 return __change_page_attr_set_clr(&cpa, 0);
1921 static int __set_pages_np(struct page *page, int numpages)
1923 unsigned long tempaddr = (unsigned long) page_address(page);
1924 struct cpa_data cpa = { .vaddr = &tempaddr,
1926 .numpages = numpages,
1927 .mask_set = __pgprot(0),
1928 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1932 * No alias checking needed for setting not present flag. otherwise,
1933 * we may need to break large pages for 64-bit kernel text
1934 * mappings (this adds to complexity if we want to do this from
1935 * atomic context especially). Let's keep it simple!
1937 return __change_page_attr_set_clr(&cpa, 0);
1940 void __kernel_map_pages(struct page *page, int numpages, int enable)
1942 if (PageHighMem(page))
1945 debug_check_no_locks_freed(page_address(page),
1946 numpages * PAGE_SIZE);
1950 * The return value is ignored as the calls cannot fail.
1951 * Large pages for identity mappings are not used at boot time
1952 * and hence no memory allocations during large page split.
1955 __set_pages_p(page, numpages);
1957 __set_pages_np(page, numpages);
1960 * We should perform an IPI and flush all tlbs,
1961 * but that can deadlock->flush only current cpu:
1965 arch_flush_lazy_mmu_mode();
1968 #ifdef CONFIG_HIBERNATION
1970 bool kernel_page_present(struct page *page)
1975 if (PageHighMem(page))
1978 pte = lookup_address((unsigned long)page_address(page), &level);
1979 return (pte_val(*pte) & _PAGE_PRESENT);
1982 #endif /* CONFIG_HIBERNATION */
1984 #endif /* CONFIG_DEBUG_PAGEALLOC */
1986 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1987 unsigned numpages, unsigned long page_flags)
1989 int retval = -EINVAL;
1991 struct cpa_data cpa = {
1995 .numpages = numpages,
1996 .mask_set = __pgprot(0),
1997 .mask_clr = __pgprot(0),
2001 if (!(__supported_pte_mask & _PAGE_NX))
2004 if (!(page_flags & _PAGE_NX))
2005 cpa.mask_clr = __pgprot(_PAGE_NX);
2007 if (!(page_flags & _PAGE_RW))
2008 cpa.mask_clr = __pgprot(_PAGE_RW);
2010 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2012 retval = __change_page_attr_set_clr(&cpa, 0);
2020 * The testcases use internal knowledge of the implementation that shouldn't
2021 * be exposed to the rest of the kernel. Include these directly here.
2023 #ifdef CONFIG_CPA_DEBUG
2024 #include "pageattr-test.c"