1 // SPDX-License-Identifier: GPL-2.0
3 * MMX 3DNow! library helper functions
6 * We can use MMX just for prefetch in IRQ's. This may be a win.
7 * (reported so on K6-III)
8 * We should use a better code neutral filler for the short jump
9 * leal ebx. [ebx] is apparently best for K6-2, but Cyrix ??
10 * We also want to clobber the filler register so we don't get any
11 * register forwarding stalls on the filler.
13 * Add *user handling. Checksums are not a win with MMX on any CPU
14 * tested so far for any MMX solution figured.
16 * 22/09/2000 - Arjan van de Ven
17 * Improved for non-engineering-sample Athlons
20 #include <linux/hardirq.h>
21 #include <linux/string.h>
22 #include <linux/export.h>
23 #include <linux/sched.h>
24 #include <linux/types.h>
26 #include <asm/fpu/api.h>
30 * Use KFPU_387. MMX instructions are not affected by MXCSR,
31 * but both AMD and Intel documentation states that even integer MMX
32 * operations will result in #MF if an exception is pending in FCW.
34 * EMMS is not needed afterwards because, after calling kernel_fpu_end(),
35 * any subsequent user of the 387 stack will reinitialize it using
39 void *_mmx_memcpy(void *to, const void *from, size_t len)
44 if (unlikely(in_interrupt()))
45 return __memcpy(to, from, len);
48 i = len >> 6; /* len/64 */
50 kernel_fpu_begin_mask(KFPU_387);
52 __asm__ __volatile__ (
53 "1: prefetch (%0)\n" /* This set is 28 bytes */
59 ".section .fixup, \"ax\"\n"
60 "3: movw $0x1AEB, 1b\n" /* jmp on 26 bytes */
67 __asm__ __volatile__ (
68 "1: prefetch 320(%0)\n"
69 "2: movq (%0), %%mm0\n"
70 " movq 8(%0), %%mm1\n"
71 " movq 16(%0), %%mm2\n"
72 " movq 24(%0), %%mm3\n"
74 " movq %%mm1, 8(%1)\n"
75 " movq %%mm2, 16(%1)\n"
76 " movq %%mm3, 24(%1)\n"
77 " movq 32(%0), %%mm0\n"
78 " movq 40(%0), %%mm1\n"
79 " movq 48(%0), %%mm2\n"
80 " movq 56(%0), %%mm3\n"
81 " movq %%mm0, 32(%1)\n"
82 " movq %%mm1, 40(%1)\n"
83 " movq %%mm2, 48(%1)\n"
84 " movq %%mm3, 56(%1)\n"
85 ".section .fixup, \"ax\"\n"
86 "3: movw $0x05EB, 1b\n" /* jmp on 5 bytes */
90 : : "r" (from), "r" (to) : "memory");
97 __asm__ __volatile__ (
99 " movq 8(%0), %%mm1\n"
100 " movq 16(%0), %%mm2\n"
101 " movq 24(%0), %%mm3\n"
102 " movq %%mm0, (%1)\n"
103 " movq %%mm1, 8(%1)\n"
104 " movq %%mm2, 16(%1)\n"
105 " movq %%mm3, 24(%1)\n"
106 " movq 32(%0), %%mm0\n"
107 " movq 40(%0), %%mm1\n"
108 " movq 48(%0), %%mm2\n"
109 " movq 56(%0), %%mm3\n"
110 " movq %%mm0, 32(%1)\n"
111 " movq %%mm1, 40(%1)\n"
112 " movq %%mm2, 48(%1)\n"
113 " movq %%mm3, 56(%1)\n"
114 : : "r" (from), "r" (to) : "memory");
120 * Now do the tail of the block:
122 __memcpy(to, from, len & 63);
127 EXPORT_SYMBOL(_mmx_memcpy);
132 * The K7 has streaming cache bypass load/store. The Cyrix III, K6 and
133 * other MMX using processors do not.
136 static void fast_clear_page(void *page)
140 kernel_fpu_begin_mask(KFPU_387);
142 __asm__ __volatile__ (
143 " pxor %%mm0, %%mm0\n" : :
146 for (i = 0; i < 4096/64; i++) {
147 __asm__ __volatile__ (
148 " movntq %%mm0, (%0)\n"
149 " movntq %%mm0, 8(%0)\n"
150 " movntq %%mm0, 16(%0)\n"
151 " movntq %%mm0, 24(%0)\n"
152 " movntq %%mm0, 32(%0)\n"
153 " movntq %%mm0, 40(%0)\n"
154 " movntq %%mm0, 48(%0)\n"
155 " movntq %%mm0, 56(%0)\n"
156 : : "r" (page) : "memory");
161 * Since movntq is weakly-ordered, a "sfence" is needed to become
164 __asm__ __volatile__("sfence\n"::);
169 static void fast_copy_page(void *to, void *from)
173 kernel_fpu_begin_mask(KFPU_387);
176 * maybe the prefetch stuff can go before the expensive fnsave...
177 * but that is for later. -AV
179 __asm__ __volatile__(
182 " prefetch 128(%0)\n"
183 " prefetch 192(%0)\n"
184 " prefetch 256(%0)\n"
186 ".section .fixup, \"ax\"\n"
187 "3: movw $0x1AEB, 1b\n" /* jmp on 26 bytes */
190 _ASM_EXTABLE(1b, 3b) : : "r" (from));
192 for (i = 0; i < (4096-320)/64; i++) {
193 __asm__ __volatile__ (
194 "1: prefetch 320(%0)\n"
195 "2: movq (%0), %%mm0\n"
196 " movntq %%mm0, (%1)\n"
197 " movq 8(%0), %%mm1\n"
198 " movntq %%mm1, 8(%1)\n"
199 " movq 16(%0), %%mm2\n"
200 " movntq %%mm2, 16(%1)\n"
201 " movq 24(%0), %%mm3\n"
202 " movntq %%mm3, 24(%1)\n"
203 " movq 32(%0), %%mm4\n"
204 " movntq %%mm4, 32(%1)\n"
205 " movq 40(%0), %%mm5\n"
206 " movntq %%mm5, 40(%1)\n"
207 " movq 48(%0), %%mm6\n"
208 " movntq %%mm6, 48(%1)\n"
209 " movq 56(%0), %%mm7\n"
210 " movntq %%mm7, 56(%1)\n"
211 ".section .fixup, \"ax\"\n"
212 "3: movw $0x05EB, 1b\n" /* jmp on 5 bytes */
215 _ASM_EXTABLE(1b, 3b) : : "r" (from), "r" (to) : "memory");
221 for (i = (4096-320)/64; i < 4096/64; i++) {
222 __asm__ __volatile__ (
223 "2: movq (%0), %%mm0\n"
224 " movntq %%mm0, (%1)\n"
225 " movq 8(%0), %%mm1\n"
226 " movntq %%mm1, 8(%1)\n"
227 " movq 16(%0), %%mm2\n"
228 " movntq %%mm2, 16(%1)\n"
229 " movq 24(%0), %%mm3\n"
230 " movntq %%mm3, 24(%1)\n"
231 " movq 32(%0), %%mm4\n"
232 " movntq %%mm4, 32(%1)\n"
233 " movq 40(%0), %%mm5\n"
234 " movntq %%mm5, 40(%1)\n"
235 " movq 48(%0), %%mm6\n"
236 " movntq %%mm6, 48(%1)\n"
237 " movq 56(%0), %%mm7\n"
238 " movntq %%mm7, 56(%1)\n"
239 : : "r" (from), "r" (to) : "memory");
244 * Since movntq is weakly-ordered, a "sfence" is needed to become
247 __asm__ __volatile__("sfence \n"::);
251 #else /* CONFIG_MK7 */
254 * Generic MMX implementation without K7 specific streaming
256 static void fast_clear_page(void *page)
260 kernel_fpu_begin_mask(KFPU_387);
262 __asm__ __volatile__ (
263 " pxor %%mm0, %%mm0\n" : :
266 for (i = 0; i < 4096/128; i++) {
267 __asm__ __volatile__ (
268 " movq %%mm0, (%0)\n"
269 " movq %%mm0, 8(%0)\n"
270 " movq %%mm0, 16(%0)\n"
271 " movq %%mm0, 24(%0)\n"
272 " movq %%mm0, 32(%0)\n"
273 " movq %%mm0, 40(%0)\n"
274 " movq %%mm0, 48(%0)\n"
275 " movq %%mm0, 56(%0)\n"
276 " movq %%mm0, 64(%0)\n"
277 " movq %%mm0, 72(%0)\n"
278 " movq %%mm0, 80(%0)\n"
279 " movq %%mm0, 88(%0)\n"
280 " movq %%mm0, 96(%0)\n"
281 " movq %%mm0, 104(%0)\n"
282 " movq %%mm0, 112(%0)\n"
283 " movq %%mm0, 120(%0)\n"
284 : : "r" (page) : "memory");
291 static void fast_copy_page(void *to, void *from)
295 kernel_fpu_begin_mask(KFPU_387);
297 __asm__ __volatile__ (
300 " prefetch 128(%0)\n"
301 " prefetch 192(%0)\n"
302 " prefetch 256(%0)\n"
304 ".section .fixup, \"ax\"\n"
305 "3: movw $0x1AEB, 1b\n" /* jmp on 26 bytes */
308 _ASM_EXTABLE(1b, 3b) : : "r" (from));
310 for (i = 0; i < 4096/64; i++) {
311 __asm__ __volatile__ (
312 "1: prefetch 320(%0)\n"
313 "2: movq (%0), %%mm0\n"
314 " movq 8(%0), %%mm1\n"
315 " movq 16(%0), %%mm2\n"
316 " movq 24(%0), %%mm3\n"
317 " movq %%mm0, (%1)\n"
318 " movq %%mm1, 8(%1)\n"
319 " movq %%mm2, 16(%1)\n"
320 " movq %%mm3, 24(%1)\n"
321 " movq 32(%0), %%mm0\n"
322 " movq 40(%0), %%mm1\n"
323 " movq 48(%0), %%mm2\n"
324 " movq 56(%0), %%mm3\n"
325 " movq %%mm0, 32(%1)\n"
326 " movq %%mm1, 40(%1)\n"
327 " movq %%mm2, 48(%1)\n"
328 " movq %%mm3, 56(%1)\n"
329 ".section .fixup, \"ax\"\n"
330 "3: movw $0x05EB, 1b\n" /* jmp on 5 bytes */
334 : : "r" (from), "r" (to) : "memory");
342 #endif /* !CONFIG_MK7 */
345 * Favour MMX for page clear and copy:
347 static void slow_zero_page(void *page)
351 __asm__ __volatile__(
355 : "=&c" (d0), "=&D" (d1)
356 :"a" (0), "1" (page), "0" (1024)
360 void mmx_clear_page(void *page)
362 if (unlikely(in_interrupt()))
363 slow_zero_page(page);
365 fast_clear_page(page);
367 EXPORT_SYMBOL(mmx_clear_page);
369 static void slow_copy_page(void *to, void *from)
373 __asm__ __volatile__(
376 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
377 : "0" (1024), "1" ((long) to), "2" ((long) from)
381 void mmx_copy_page(void *to, void *from)
383 if (unlikely(in_interrupt()))
384 slow_copy_page(to, from);
386 fast_copy_page(to, from);
388 EXPORT_SYMBOL(mmx_copy_page);