arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /* Enable/disable SMT_RSB bug mitigation */
 188 bool __read_mostly mitigate_smt_rsb;
 189 module_param(mitigate_smt_rsb, bool, 0444);
 190
 191 /*
 192  * Restoring the host value for MSRs that are only consumed when running in
 193  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 194  * returns to userspace, i.e. the kernel can run with the guest's value.
 195  */
 196 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 197
 198 struct kvm_user_return_msrs {
 199         struct user_return_notifier urn;
 200         bool registered;
 201         struct kvm_user_return_msr_values {
 202                 u64 host;
 203                 u64 curr;
 204         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 205 };
 206
 207 u32 __read_mostly kvm_nr_uret_msrs;
 208 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 209 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 210 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 211
 212 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 213                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 214                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 215                                 | XFEATURE_MASK_PKRU)
 216
 217 u64 __read_mostly host_efer;
 218 EXPORT_SYMBOL_GPL(host_efer);
 219
 220 bool __read_mostly allow_smaller_maxphyaddr = 0;
 221 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 222
 223 bool __read_mostly enable_apicv = true;
 224 EXPORT_SYMBOL_GPL(enable_apicv);
 225
 226 u64 __read_mostly host_xss;
 227 EXPORT_SYMBOL_GPL(host_xss);
 228 u64 __read_mostly supported_xss;
 229 EXPORT_SYMBOL_GPL(supported_xss);
 230
 231 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 232         KVM_GENERIC_VM_STATS(),
 233         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 234         STATS_DESC_COUNTER(VM, mmu_pte_write),
 235         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 236         STATS_DESC_COUNTER(VM, mmu_flooded),
 237         STATS_DESC_COUNTER(VM, mmu_recycled),
 238         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 239         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 240         STATS_DESC_ICOUNTER(VM, pages_4k),
 241         STATS_DESC_ICOUNTER(VM, pages_2m),
 242         STATS_DESC_ICOUNTER(VM, pages_1g),
 243         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 244         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 245         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 246 };
 247
 248 const struct kvm_stats_header kvm_vm_stats_header = {
 249         .name_size = KVM_STATS_NAME_SIZE,
 250         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 251         .id_offset = sizeof(struct kvm_stats_header),
 252         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 253         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 254                        sizeof(kvm_vm_stats_desc),
 255 };
 256
 257 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 258         KVM_GENERIC_VCPU_STATS(),
 259         STATS_DESC_COUNTER(VCPU, pf_fixed),
 260         STATS_DESC_COUNTER(VCPU, pf_guest),
 261         STATS_DESC_COUNTER(VCPU, tlb_flush),
 262         STATS_DESC_COUNTER(VCPU, invlpg),
 263         STATS_DESC_COUNTER(VCPU, exits),
 264         STATS_DESC_COUNTER(VCPU, io_exits),
 265         STATS_DESC_COUNTER(VCPU, mmio_exits),
 266         STATS_DESC_COUNTER(VCPU, signal_exits),
 267         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 268         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 269         STATS_DESC_COUNTER(VCPU, l1d_flush),
 270         STATS_DESC_COUNTER(VCPU, halt_exits),
 271         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 272         STATS_DESC_COUNTER(VCPU, irq_exits),
 273         STATS_DESC_COUNTER(VCPU, host_state_reload),
 274         STATS_DESC_COUNTER(VCPU, fpu_reload),
 275         STATS_DESC_COUNTER(VCPU, insn_emulation),
 276         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 277         STATS_DESC_COUNTER(VCPU, hypercalls),
 278         STATS_DESC_COUNTER(VCPU, irq_injections),
 279         STATS_DESC_COUNTER(VCPU, nmi_injections),
 280         STATS_DESC_COUNTER(VCPU, req_event),
 281         STATS_DESC_COUNTER(VCPU, nested_run),
 282         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 283         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 284         STATS_DESC_COUNTER(VCPU, preemption_reported),
 285         STATS_DESC_COUNTER(VCPU, preemption_other),
 286         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 287 };
 288
 289 const struct kvm_stats_header kvm_vcpu_stats_header = {
 290         .name_size = KVM_STATS_NAME_SIZE,
 291         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 292         .id_offset = sizeof(struct kvm_stats_header),
 293         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 294         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 295                        sizeof(kvm_vcpu_stats_desc),
 296 };
 297
 298 u64 __read_mostly host_xcr0;
 299 u64 __read_mostly supported_xcr0;
 300 EXPORT_SYMBOL_GPL(supported_xcr0);
 301
 302 static struct kmem_cache *x86_fpu_cache;
 303
 304 static struct kmem_cache *x86_emulator_cache;
 305
 306 /*
 307  * When called, it means the previous get/set msr reached an invalid msr.
 308  * Return true if we want to ignore/silent this failed msr access.
 309  */
 310 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 311 {
 312         const char *op = write ? "wrmsr" : "rdmsr";
 313
 314         if (ignore_msrs) {
 315                 if (report_ignored_msrs)
 316                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 317                                       op, msr, data);
 318                 /* Mask the error */
 319                 return true;
 320         } else {
 321                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 322                                       op, msr, data);
 323                 return false;
 324         }
 325 }
 326
 327 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 328 {
 329         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 330         unsigned int size = sizeof(struct x86_emulate_ctxt);
 331
 332         return kmem_cache_create_usercopy("x86_emulator", size,
 333                                           __alignof__(struct x86_emulate_ctxt),
 334                                           SLAB_ACCOUNT, useroffset,
 335                                           size - useroffset, NULL);
 336 }
 337
 338 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 339
 340 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 341 {
 342         int i;
 343         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 344                 vcpu->arch.apf.gfns[i] = ~0;
 345 }
 346
 347 static void kvm_on_user_return(struct user_return_notifier *urn)
 348 {
 349         unsigned slot;
 350         struct kvm_user_return_msrs *msrs
 351                 = container_of(urn, struct kvm_user_return_msrs, urn);
 352         struct kvm_user_return_msr_values *values;
 353         unsigned long flags;
 354
 355         /*
 356          * Disabling irqs at this point since the following code could be
 357          * interrupted and executed through kvm_arch_hardware_disable()
 358          */
 359         local_irq_save(flags);
 360         if (msrs->registered) {
 361                 msrs->registered = false;
 362                 user_return_notifier_unregister(urn);
 363         }
 364         local_irq_restore(flags);
 365         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 366                 values = &msrs->values[slot];
 367                 if (values->host != values->curr) {
 368                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 369                         values->curr = values->host;
 370                 }
 371         }
 372 }
 373
 374 static int kvm_probe_user_return_msr(u32 msr)
 375 {
 376         u64 val;
 377         int ret;
 378
 379         preempt_disable();
 380         ret = rdmsrl_safe(msr, &val);
 381         if (ret)
 382                 goto out;
 383         ret = wrmsrl_safe(msr, val);
 384 out:
 385         preempt_enable();
 386         return ret;
 387 }
 388
 389 int kvm_add_user_return_msr(u32 msr)
 390 {
 391         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 392
 393         if (kvm_probe_user_return_msr(msr))
 394                 return -1;
 395
 396         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 397         return kvm_nr_uret_msrs++;
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 400
 401 int kvm_find_user_return_msr(u32 msr)
 402 {
 403         int i;
 404
 405         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 406                 if (kvm_uret_msrs_list[i] == msr)
 407                         return i;
 408         }
 409         return -1;
 410 }
 411 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 412
 413 static void kvm_user_return_msr_cpu_online(void)
 414 {
 415         unsigned int cpu = smp_processor_id();
 416         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 417         u64 value;
 418         int i;
 419
 420         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 421                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 422                 msrs->values[i].host = value;
 423                 msrs->values[i].curr = value;
 424         }
 425 }
 426
 427 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 428 {
 429         unsigned int cpu = smp_processor_id();
 430         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 431         int err;
 432
 433         value = (value & mask) | (msrs->values[slot].host & ~mask);
 434         if (value == msrs->values[slot].curr)
 435                 return 0;
 436         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 437         if (err)
 438                 return 1;
 439
 440         msrs->values[slot].curr = value;
 441         if (!msrs->registered) {
 442                 msrs->urn.on_user_return = kvm_on_user_return;
 443                 user_return_notifier_register(&msrs->urn);
 444                 msrs->registered = true;
 445         }
 446         return 0;
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 449
 450 static void drop_user_return_notifiers(void)
 451 {
 452         unsigned int cpu = smp_processor_id();
 453         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 454
 455         if (msrs->registered)
 456                 kvm_on_user_return(&msrs->urn);
 457 }
 458
 459 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 460 {
 461         return vcpu->arch.apic_base;
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 464
 465 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 466 {
 467         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 470
 471 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 472 {
 473         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 474         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 475         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 476                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 477
 478         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 479                 return 1;
 480         if (!msr_info->host_initiated) {
 481                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 482                         return 1;
 483                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 484                         return 1;
 485         }
 486
 487         kvm_lapic_set_base(vcpu, msr_info->data);
 488         kvm_recalculate_apic_map(vcpu->kvm);
 489         return 0;
 490 }
 491 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 492
 493 /*
 494  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 495  *
 496  * Hardware virtualization extension instructions may fault if a reboot turns
 497  * off virtualization while processes are running.  Usually after catching the
 498  * fault we just panic; during reboot instead the instruction is ignored.
 499  */
 500 noinstr void kvm_spurious_fault(void)
 501 {
 502         /* Fault while not rebooting.  We want the trace. */
 503         BUG_ON(!kvm_rebooting);
 504 }
 505 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 506
 507 #define EXCPT_BENIGN            0
 508 #define EXCPT_CONTRIBUTORY      1
 509 #define EXCPT_PF                2
 510
 511 static int exception_class(int vector)
 512 {
 513         switch (vector) {
 514         case PF_VECTOR:
 515                 return EXCPT_PF;
 516         case DE_VECTOR:
 517         case TS_VECTOR:
 518         case NP_VECTOR:
 519         case SS_VECTOR:
 520         case GP_VECTOR:
 521                 return EXCPT_CONTRIBUTORY;
 522         default:
 523                 break;
 524         }
 525         return EXCPT_BENIGN;
 526 }
 527
 528 #define EXCPT_FAULT             0
 529 #define EXCPT_TRAP              1
 530 #define EXCPT_ABORT             2
 531 #define EXCPT_INTERRUPT         3
 532 #define EXCPT_DB                4
 533
 534 static int exception_type(int vector)
 535 {
 536         unsigned int mask;
 537
 538         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 539                 return EXCPT_INTERRUPT;
 540
 541         mask = 1 << vector;
 542
 543         /*
 544          * #DBs can be trap-like or fault-like, the caller must check other CPU
 545          * state, e.g. DR6, to determine whether a #DB is a trap or fault.
 546          */
 547         if (mask & (1 << DB_VECTOR))
 548                 return EXCPT_DB;
 549
 550         if (mask & ((1 << BP_VECTOR) | (1 << OF_VECTOR)))
 551                 return EXCPT_TRAP;
 552
 553         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 554                 return EXCPT_ABORT;
 555
 556         /* Reserved exceptions will result in fault */
 557         return EXCPT_FAULT;
 558 }
 559
 560 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 561 {
 562         unsigned nr = vcpu->arch.exception.nr;
 563         bool has_payload = vcpu->arch.exception.has_payload;
 564         unsigned long payload = vcpu->arch.exception.payload;
 565
 566         if (!has_payload)
 567                 return;
 568
 569         switch (nr) {
 570         case DB_VECTOR:
 571                 /*
 572                  * "Certain debug exceptions may clear bit 0-3.  The
 573                  * remaining contents of the DR6 register are never
 574                  * cleared by the processor".
 575                  */
 576                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 577                 /*
 578                  * In order to reflect the #DB exception payload in guest
 579                  * dr6, three components need to be considered: active low
 580                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 581                  * DR6_BS and DR6_BT)
 582                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 583                  * In the target guest dr6:
 584                  * FIXED_1 bits should always be set.
 585                  * Active low bits should be cleared if 1-setting in payload.
 586                  * Active high bits should be set if 1-setting in payload.
 587                  *
 588                  * Note, the payload is compatible with the pending debug
 589                  * exceptions/exit qualification under VMX, that active_low bits
 590                  * are active high in payload.
 591                  * So they need to be flipped for DR6.
 592                  */
 593                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 594                 vcpu->arch.dr6 |= payload;
 595                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 596
 597                 /*
 598                  * The #DB payload is defined as compatible with the 'pending
 599                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 600                  * defined in the 'pending debug exceptions' field (enabled
 601                  * breakpoint), it is reserved and must be zero in DR6.
 602                  */
 603                 vcpu->arch.dr6 &= ~BIT(12);
 604                 break;
 605         case PF_VECTOR:
 606                 vcpu->arch.cr2 = payload;
 607                 break;
 608         }
 609
 610         vcpu->arch.exception.has_payload = false;
 611         vcpu->arch.exception.payload = 0;
 612 }
 613 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 614
 615 /* Forcibly leave the nested mode in cases like a vCPU reset */
 616 static void kvm_leave_nested(struct kvm_vcpu *vcpu)
 617 {
 618         kvm_x86_ops.nested_ops->leave_nested(vcpu);
 619 }
 620
 621 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 622                 unsigned nr, bool has_error, u32 error_code,
 623                 bool has_payload, unsigned long payload, bool reinject)
 624 {
 625         u32 prev_nr;
 626         int class1, class2;
 627
 628         kvm_make_request(KVM_REQ_EVENT, vcpu);
 629
 630         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 631         queue:
 632                 if (reinject) {
 633                         /*
 634                          * On vmentry, vcpu->arch.exception.pending is only
 635                          * true if an event injection was blocked by
 636                          * nested_run_pending.  In that case, however,
 637                          * vcpu_enter_guest requests an immediate exit,
 638                          * and the guest shouldn't proceed far enough to
 639                          * need reinjection.
 640                          */
 641                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 642                         vcpu->arch.exception.injected = true;
 643                         if (WARN_ON_ONCE(has_payload)) {
 644                                 /*
 645                                  * A reinjected event has already
 646                                  * delivered its payload.
 647                                  */
 648                                 has_payload = false;
 649                                 payload = 0;
 650                         }
 651                 } else {
 652                         vcpu->arch.exception.pending = true;
 653                         vcpu->arch.exception.injected = false;
 654                 }
 655                 vcpu->arch.exception.has_error_code = has_error;
 656                 vcpu->arch.exception.nr = nr;
 657                 vcpu->arch.exception.error_code = error_code;
 658                 vcpu->arch.exception.has_payload = has_payload;
 659                 vcpu->arch.exception.payload = payload;
 660                 if (!is_guest_mode(vcpu))
 661                         kvm_deliver_exception_payload(vcpu);
 662                 return;
 663         }
 664
 665         /* to check exception */
 666         prev_nr = vcpu->arch.exception.nr;
 667         if (prev_nr == DF_VECTOR) {
 668                 /* triple fault -> shutdown */
 669                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 670                 return;
 671         }
 672         class1 = exception_class(prev_nr);
 673         class2 = exception_class(nr);
 674         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 675                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 676                 /*
 677                  * Generate double fault per SDM Table 5-5.  Set
 678                  * exception.pending = true so that the double fault
 679                  * can trigger a nested vmexit.
 680                  */
 681                 vcpu->arch.exception.pending = true;
 682                 vcpu->arch.exception.injected = false;
 683                 vcpu->arch.exception.has_error_code = true;
 684                 vcpu->arch.exception.nr = DF_VECTOR;
 685                 vcpu->arch.exception.error_code = 0;
 686                 vcpu->arch.exception.has_payload = false;
 687                 vcpu->arch.exception.payload = 0;
 688         } else
 689                 /* replace previous exception with a new one in a hope
 690                    that instruction re-execution will regenerate lost
 691                    exception */
 692                 goto queue;
 693 }
 694
 695 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 696 {
 697         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 700
 701 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 702 {
 703         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 706
 707 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 708                            unsigned long payload)
 709 {
 710         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 711 }
 712 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 713
 714 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 715                                     u32 error_code, unsigned long payload)
 716 {
 717         kvm_multiple_exception(vcpu, nr, true, error_code,
 718                                true, payload, false);
 719 }
 720
 721 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 722 {
 723         if (err)
 724                 kvm_inject_gp(vcpu, 0);
 725         else
 726                 return kvm_skip_emulated_instruction(vcpu);
 727
 728         return 1;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 731
 732 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 733 {
 734         ++vcpu->stat.pf_guest;
 735         vcpu->arch.exception.nested_apf =
 736                 is_guest_mode(vcpu) && fault->async_page_fault;
 737         if (vcpu->arch.exception.nested_apf) {
 738                 vcpu->arch.apf.nested_apf_token = fault->address;
 739                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 740         } else {
 741                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 742                                         fault->address);
 743         }
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 746
 747 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 748                                     struct x86_exception *fault)
 749 {
 750         struct kvm_mmu *fault_mmu;
 751         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 752
 753         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 754                                                vcpu->arch.walk_mmu;
 755
 756         /*
 757          * Invalidate the TLB entry for the faulting address, if it exists,
 758          * else the access will fault indefinitely (and to emulate hardware).
 759          */
 760         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 761             !(fault->error_code & PFERR_RSVD_MASK))
 762                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 763                                        fault_mmu->root_hpa);
 764
 765         fault_mmu->inject_page_fault(vcpu, fault);
 766         return fault->nested_page_fault;
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 769
 770 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 771 {
 772         atomic_inc(&vcpu->arch.nmi_queued);
 773         kvm_make_request(KVM_REQ_NMI, vcpu);
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 776
 777 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 778 {
 779         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 782
 783 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 784 {
 785         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 786 }
 787 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 788
 789 /*
 790  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 791  * a #GP and return false.
 792  */
 793 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 794 {
 795         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 796                 return true;
 797         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 798         return false;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 801
 802 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 803 {
 804         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 805                 return true;
 806
 807         kvm_queue_exception(vcpu, UD_VECTOR);
 808         return false;
 809 }
 810 EXPORT_SYMBOL_GPL(kvm_require_dr);
 811
 812 /*
 813  * This function will be used to read from the physical memory of the currently
 814  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 815  * can read from guest physical or from the guest's guest physical memory.
 816  */
 817 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 818                             gfn_t ngfn, void *data, int offset, int len,
 819                             u32 access)
 820 {
 821         struct x86_exception exception;
 822         gfn_t real_gfn;
 823         gpa_t ngpa;
 824
 825         ngpa     = gfn_to_gpa(ngfn);
 826         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 827         if (real_gfn == UNMAPPED_GVA)
 828                 return -EFAULT;
 829
 830         real_gfn = gpa_to_gfn(real_gfn);
 831
 832         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 835
 836 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 837 {
 838         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 839 }
 840
 841 /*
 842  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 843  */
 844 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 845 {
 846         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 847         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 848         int i;
 849         int ret;
 850         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 851
 852         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 853                                       offset * sizeof(u64), sizeof(pdpte),
 854                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 855         if (ret < 0) {
 856                 ret = 0;
 857                 goto out;
 858         }
 859         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 860                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 861                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 862                         ret = 0;
 863                         goto out;
 864                 }
 865         }
 866         ret = 1;
 867
 868         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 869         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 870         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 871         vcpu->arch.pdptrs_from_userspace = false;
 872
 873 out:
 874
 875         return ret;
 876 }
 877 EXPORT_SYMBOL_GPL(load_pdptrs);
 878
 879 static bool kvm_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 880 {
 881 #ifdef CONFIG_X86_64
 882         if (cr0 & 0xffffffff00000000UL)
 883                 return false;
 884 #endif
 885
 886         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 887                 return false;
 888
 889         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 890                 return false;
 891
 892         return static_call(kvm_x86_is_valid_cr0)(vcpu, cr0);
 893 }
 894
 895 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 896 {
 897         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 898                 kvm_clear_async_pf_completion_queue(vcpu);
 899                 kvm_async_pf_hash_reset(vcpu);
 900         }
 901
 902         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 903                 kvm_mmu_reset_context(vcpu);
 904
 905         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 906             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 907             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 908                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 909 }
 910 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 911
 912 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 913 {
 914         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 915         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 916
 917         if (!kvm_is_valid_cr0(vcpu, cr0))
 918                 return 1;
 919
 920         cr0 |= X86_CR0_ET;
 921
 922         /* Write to CR0 reserved bits are ignored, even on Intel. */
 923         cr0 &= ~CR0_RESERVED_BITS;
 924
 925 #ifdef CONFIG_X86_64
 926         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 927             (cr0 & X86_CR0_PG)) {
 928                 int cs_db, cs_l;
 929
 930                 if (!is_pae(vcpu))
 931                         return 1;
 932                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 933                 if (cs_l)
 934                         return 1;
 935         }
 936 #endif
 937         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 938             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 939             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 940                 return 1;
 941
 942         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 943                 return 1;
 944
 945         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 946
 947         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 948
 949         return 0;
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 952
 953 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 954 {
 955         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_lmsw);
 958
 959 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 960 {
 961         if (vcpu->arch.guest_state_protected)
 962                 return;
 963
 964         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 965
 966                 if (vcpu->arch.xcr0 != host_xcr0)
 967                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 968
 969                 if (vcpu->arch.xsaves_enabled &&
 970                     vcpu->arch.ia32_xss != host_xss)
 971                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 972         }
 973
 974         if (static_cpu_has(X86_FEATURE_PKU) &&
 975             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 976              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 977             vcpu->arch.pkru != vcpu->arch.host_pkru)
 978                 write_pkru(vcpu->arch.pkru);
 979 }
 980 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 981
 982 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 983 {
 984         if (vcpu->arch.guest_state_protected)
 985                 return;
 986
 987         if (static_cpu_has(X86_FEATURE_PKU) &&
 988             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 989              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 990                 vcpu->arch.pkru = rdpkru();
 991                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 992                         write_pkru(vcpu->arch.host_pkru);
 993         }
 994
 995         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 996
 997                 if (vcpu->arch.xcr0 != host_xcr0)
 998                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 999
1000                 if (vcpu->arch.xsaves_enabled &&
1001                     vcpu->arch.ia32_xss != host_xss)
1002                         wrmsrl(MSR_IA32_XSS, host_xss);
1003         }
1004
1005 }
1006 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1007
1008 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1009 {
1010         u64 xcr0 = xcr;
1011         u64 old_xcr0 = vcpu->arch.xcr0;
1012         u64 valid_bits;
1013
1014         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
1015         if (index != XCR_XFEATURE_ENABLED_MASK)
1016                 return 1;
1017         if (!(xcr0 & XFEATURE_MASK_FP))
1018                 return 1;
1019         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1020                 return 1;
1021
1022         /*
1023          * Do not allow the guest to set bits that we do not support
1024          * saving.  However, xcr0 bit 0 is always set, even if the
1025          * emulated CPU does not support XSAVE (see fx_init).
1026          */
1027         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1028         if (xcr0 & ~valid_bits)
1029                 return 1;
1030
1031         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1032             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1033                 return 1;
1034
1035         if (xcr0 & XFEATURE_MASK_AVX512) {
1036                 if (!(xcr0 & XFEATURE_MASK_YMM))
1037                         return 1;
1038                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1039                         return 1;
1040         }
1041         vcpu->arch.xcr0 = xcr0;
1042
1043         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1044                 kvm_update_cpuid_runtime(vcpu);
1045         return 0;
1046 }
1047
1048 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1049 {
1050         /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1051         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1052             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1053                 kvm_inject_gp(vcpu, 0);
1054                 return 1;
1055         }
1056
1057         return kvm_skip_emulated_instruction(vcpu);
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1060
1061 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1062 {
1063         if (cr4 & cr4_reserved_bits)
1064                 return false;
1065
1066         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1067                 return false;
1068
1069         return true;
1070 }
1071 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4);
1072
1073 static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1074 {
1075         return __kvm_is_valid_cr4(vcpu, cr4) &&
1076                static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1077 }
1078
1079 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1080 {
1081         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1082             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1083                 kvm_mmu_reset_context(vcpu);
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1086
1087 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1088 {
1089         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1090         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1091                                    X86_CR4_SMEP;
1092
1093         if (!kvm_is_valid_cr4(vcpu, cr4))
1094                 return 1;
1095
1096         if (is_long_mode(vcpu)) {
1097                 if (!(cr4 & X86_CR4_PAE))
1098                         return 1;
1099                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1100                         return 1;
1101         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1102                    && ((cr4 ^ old_cr4) & pdptr_bits)
1103                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1104                                    kvm_read_cr3(vcpu)))
1105                 return 1;
1106
1107         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1108                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1109                         return 1;
1110
1111                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1112                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1113                         return 1;
1114         }
1115
1116         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1117
1118         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1119
1120         return 0;
1121 }
1122 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1123
1124 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1125 {
1126         struct kvm_mmu *mmu = vcpu->arch.mmu;
1127         unsigned long roots_to_free = 0;
1128         int i;
1129
1130         /*
1131          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1132          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1133          * also via the emulator.  KVM's TDP page tables are not in the scope of
1134          * the invalidation, but the guest's TLB entries need to be flushed as
1135          * the CPU may have cached entries in its TLB for the target PCID.
1136          */
1137         if (unlikely(tdp_enabled)) {
1138                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1139                 return;
1140         }
1141
1142         /*
1143          * If neither the current CR3 nor any of the prev_roots use the given
1144          * PCID, then nothing needs to be done here because a resync will
1145          * happen anyway before switching to any other CR3.
1146          */
1147         if (kvm_get_active_pcid(vcpu) == pcid) {
1148                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1149                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1150         }
1151
1152         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1153                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1154                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1155
1156         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1157 }
1158
1159 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1160 {
1161         bool skip_tlb_flush = false;
1162         unsigned long pcid = 0;
1163 #ifdef CONFIG_X86_64
1164         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1165
1166         if (pcid_enabled) {
1167                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1168                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1169                 pcid = cr3 & X86_CR3_PCID_MASK;
1170         }
1171 #endif
1172
1173         /* PDPTRs are always reloaded for PAE paging. */
1174         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1175                 goto handle_tlb_flush;
1176
1177         /*
1178          * Do not condition the GPA check on long mode, this helper is used to
1179          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1180          * the current vCPU mode is accurate.
1181          */
1182         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1183                 return 1;
1184
1185         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1186                 return 1;
1187
1188         if (cr3 != kvm_read_cr3(vcpu))
1189                 kvm_mmu_new_pgd(vcpu, cr3);
1190
1191         vcpu->arch.cr3 = cr3;
1192         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1193
1194 handle_tlb_flush:
1195         /*
1196          * A load of CR3 that flushes the TLB flushes only the current PCID,
1197          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1198          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1199          * and it's impossible to use a non-zero PCID when PCID is disabled,
1200          * i.e. only PCID=0 can be relevant.
1201          */
1202         if (!skip_tlb_flush)
1203                 kvm_invalidate_pcid(vcpu, pcid);
1204
1205         return 0;
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1208
1209 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1210 {
1211         if (cr8 & CR8_RESERVED_BITS)
1212                 return 1;
1213         if (lapic_in_kernel(vcpu))
1214                 kvm_lapic_set_tpr(vcpu, cr8);
1215         else
1216                 vcpu->arch.cr8 = cr8;
1217         return 0;
1218 }
1219 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1220
1221 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1222 {
1223         if (lapic_in_kernel(vcpu))
1224                 return kvm_lapic_get_cr8(vcpu);
1225         else
1226                 return vcpu->arch.cr8;
1227 }
1228 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1229
1230 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1231 {
1232         int i;
1233
1234         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1235                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1236                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1237         }
1238 }
1239
1240 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1241 {
1242         unsigned long dr7;
1243
1244         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1245                 dr7 = vcpu->arch.guest_debug_dr7;
1246         else
1247                 dr7 = vcpu->arch.dr7;
1248         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1249         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1250         if (dr7 & DR7_BP_EN_MASK)
1251                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1252 }
1253 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1254
1255 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1256 {
1257         u64 fixed = DR6_FIXED_1;
1258
1259         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1260                 fixed |= DR6_RTM;
1261
1262         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1263                 fixed |= DR6_BUS_LOCK;
1264         return fixed;
1265 }
1266
1267 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1268 {
1269         size_t size = ARRAY_SIZE(vcpu->arch.db);
1270
1271         switch (dr) {
1272         case 0 ... 3:
1273                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1274                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1275                         vcpu->arch.eff_db[dr] = val;
1276                 break;
1277         case 4:
1278         case 6:
1279                 if (!kvm_dr6_valid(val))
1280                         return 1; /* #GP */
1281                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1282                 break;
1283         case 5:
1284         default: /* 7 */
1285                 if (!kvm_dr7_valid(val))
1286                         return 1; /* #GP */
1287                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1288                 kvm_update_dr7(vcpu);
1289                 break;
1290         }
1291
1292         return 0;
1293 }
1294 EXPORT_SYMBOL_GPL(kvm_set_dr);
1295
1296 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1297 {
1298         size_t size = ARRAY_SIZE(vcpu->arch.db);
1299
1300         switch (dr) {
1301         case 0 ... 3:
1302                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1303                 break;
1304         case 4:
1305         case 6:
1306                 *val = vcpu->arch.dr6;
1307                 break;
1308         case 5:
1309         default: /* 7 */
1310                 *val = vcpu->arch.dr7;
1311                 break;
1312         }
1313 }
1314 EXPORT_SYMBOL_GPL(kvm_get_dr);
1315
1316 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1317 {
1318         u32 ecx = kvm_rcx_read(vcpu);
1319         u64 data;
1320
1321         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1322                 kvm_inject_gp(vcpu, 0);
1323                 return 1;
1324         }
1325
1326         kvm_rax_write(vcpu, (u32)data);
1327         kvm_rdx_write(vcpu, data >> 32);
1328         return kvm_skip_emulated_instruction(vcpu);
1329 }
1330 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1331
1332 /*
1333  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1334  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1335  *
1336  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1337  * extract the supported MSRs from the related const lists.
1338  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1339  * capabilities of the host cpu. This capabilities test skips MSRs that are
1340  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1341  * may depend on host virtualization features rather than host cpu features.
1342  */
1343
1344 static const u32 msrs_to_save_all[] = {
1345         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1346         MSR_STAR,
1347 #ifdef CONFIG_X86_64
1348         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1349 #endif
1350         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1351         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1352         MSR_IA32_SPEC_CTRL,
1353         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1354         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1355         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1356         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1357         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1358         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1359         MSR_IA32_UMWAIT_CONTROL,
1360
1361         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1362         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1363         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1364         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1365         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1366         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1367         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1368         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1369         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1370         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1371         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1372         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1373
1374         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1375         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1376         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1377         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1378         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1379         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1380 };
1381
1382 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1383 static unsigned num_msrs_to_save;
1384
1385 static const u32 emulated_msrs_all[] = {
1386         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1387         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1388         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1389         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1390         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1391         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1392         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1393         HV_X64_MSR_RESET,
1394         HV_X64_MSR_VP_INDEX,
1395         HV_X64_MSR_VP_RUNTIME,
1396         HV_X64_MSR_SCONTROL,
1397         HV_X64_MSR_STIMER0_CONFIG,
1398         HV_X64_MSR_VP_ASSIST_PAGE,
1399         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1400         HV_X64_MSR_TSC_EMULATION_STATUS,
1401         HV_X64_MSR_SYNDBG_OPTIONS,
1402         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1403         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1404         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1405
1406         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1407         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1408
1409         MSR_IA32_TSC_ADJUST,
1410         MSR_IA32_TSC_DEADLINE,
1411         MSR_IA32_ARCH_CAPABILITIES,
1412         MSR_IA32_PERF_CAPABILITIES,
1413         MSR_IA32_MISC_ENABLE,
1414         MSR_IA32_MCG_STATUS,
1415         MSR_IA32_MCG_CTL,
1416         MSR_IA32_MCG_EXT_CTL,
1417         MSR_IA32_SMBASE,
1418         MSR_SMI_COUNT,
1419         MSR_PLATFORM_INFO,
1420         MSR_MISC_FEATURES_ENABLES,
1421         MSR_AMD64_VIRT_SPEC_CTRL,
1422         MSR_IA32_POWER_CTL,
1423         MSR_IA32_UCODE_REV,
1424
1425         /*
1426          * The following list leaves out MSRs whose values are determined
1427          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1428          * We always support the "true" VMX control MSRs, even if the host
1429          * processor does not, so I am putting these registers here rather
1430          * than in msrs_to_save_all.
1431          */
1432         MSR_IA32_VMX_BASIC,
1433         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1434         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1435         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1436         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1437         MSR_IA32_VMX_MISC,
1438         MSR_IA32_VMX_CR0_FIXED0,
1439         MSR_IA32_VMX_CR4_FIXED0,
1440         MSR_IA32_VMX_VMCS_ENUM,
1441         MSR_IA32_VMX_PROCBASED_CTLS2,
1442         MSR_IA32_VMX_EPT_VPID_CAP,
1443         MSR_IA32_VMX_VMFUNC,
1444
1445         MSR_K7_HWCR,
1446         MSR_KVM_POLL_CONTROL,
1447 };
1448
1449 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1450 static unsigned num_emulated_msrs;
1451
1452 /*
1453  * List of msr numbers which are used to expose MSR-based features that
1454  * can be used by a hypervisor to validate requested CPU features.
1455  */
1456 static const u32 msr_based_features_all[] = {
1457         MSR_IA32_VMX_BASIC,
1458         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1459         MSR_IA32_VMX_PINBASED_CTLS,
1460         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1461         MSR_IA32_VMX_PROCBASED_CTLS,
1462         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1463         MSR_IA32_VMX_EXIT_CTLS,
1464         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1465         MSR_IA32_VMX_ENTRY_CTLS,
1466         MSR_IA32_VMX_MISC,
1467         MSR_IA32_VMX_CR0_FIXED0,
1468         MSR_IA32_VMX_CR0_FIXED1,
1469         MSR_IA32_VMX_CR4_FIXED0,
1470         MSR_IA32_VMX_CR4_FIXED1,
1471         MSR_IA32_VMX_VMCS_ENUM,
1472         MSR_IA32_VMX_PROCBASED_CTLS2,
1473         MSR_IA32_VMX_EPT_VPID_CAP,
1474         MSR_IA32_VMX_VMFUNC,
1475
1476         MSR_AMD64_DE_CFG,
1477         MSR_IA32_UCODE_REV,
1478         MSR_IA32_ARCH_CAPABILITIES,
1479         MSR_IA32_PERF_CAPABILITIES,
1480 };
1481
1482 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1483 static unsigned int num_msr_based_features;
1484
1485 /*
1486  * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1487  * does not yet virtualize. These include:
1488  *   10 - MISC_PACKAGE_CTRLS
1489  *   11 - ENERGY_FILTERING_CTL
1490  *   12 - DOITM
1491  *   18 - FB_CLEAR_CTRL
1492  *   21 - XAPIC_DISABLE_STATUS
1493  *   23 - OVERCLOCKING_STATUS
1494  */
1495
1496 #define KVM_SUPPORTED_ARCH_CAP \
1497         (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1498          ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1499          ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1500          ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1501          ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO)
1502
1503 static u64 kvm_get_arch_capabilities(void)
1504 {
1505         u64 data = 0;
1506
1507         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {
1508                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1509                 data &= KVM_SUPPORTED_ARCH_CAP;
1510         }
1511
1512         /*
1513          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1514          * the nested hypervisor runs with NX huge pages.  If it is not,
1515          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1516          * L1 guests, so it need not worry about its own (L2) guests.
1517          */
1518         data |= ARCH_CAP_PSCHANGE_MC_NO;
1519
1520         /*
1521          * If we're doing cache flushes (either "always" or "cond")
1522          * we will do one whenever the guest does a vmlaunch/vmresume.
1523          * If an outer hypervisor is doing the cache flush for us
1524          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1525          * capability to the guest too, and if EPT is disabled we're not
1526          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1527          * require a nested hypervisor to do a flush of its own.
1528          */
1529         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1530                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1531
1532         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1533                 data |= ARCH_CAP_RDCL_NO;
1534         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1535                 data |= ARCH_CAP_SSB_NO;
1536         if (!boot_cpu_has_bug(X86_BUG_MDS))
1537                 data |= ARCH_CAP_MDS_NO;
1538
1539         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1540                 /*
1541                  * If RTM=0 because the kernel has disabled TSX, the host might
1542                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1543                  * and therefore knows that there cannot be TAA) but keep
1544                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1545                  * and we want to allow migrating those guests to tsx=off hosts.
1546                  */
1547                 data &= ~ARCH_CAP_TAA_NO;
1548         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1549                 data |= ARCH_CAP_TAA_NO;
1550         } else {
1551                 /*
1552                  * Nothing to do here; we emulate TSX_CTRL if present on the
1553                  * host so the guest can choose between disabling TSX or
1554                  * using VERW to clear CPU buffers.
1555                  */
1556         }
1557
1558         if (!boot_cpu_has_bug(X86_BUG_GDS) || gds_ucode_mitigated())
1559                 data |= ARCH_CAP_GDS_NO;
1560
1561         return data;
1562 }
1563
1564 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1565 {
1566         switch (msr->index) {
1567         case MSR_IA32_ARCH_CAPABILITIES:
1568                 msr->data = kvm_get_arch_capabilities();
1569                 break;
1570         case MSR_IA32_UCODE_REV:
1571                 rdmsrl_safe(msr->index, &msr->data);
1572                 break;
1573         default:
1574                 return static_call(kvm_x86_get_msr_feature)(msr);
1575         }
1576         return 0;
1577 }
1578
1579 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1580 {
1581         struct kvm_msr_entry msr;
1582         int r;
1583
1584         msr.index = index;
1585         r = kvm_get_msr_feature(&msr);
1586
1587         if (r == KVM_MSR_RET_INVALID) {
1588                 /* Unconditionally clear the output for simplicity */
1589                 *data = 0;
1590                 if (kvm_msr_ignored_check(index, 0, false))
1591                         r = 0;
1592         }
1593
1594         if (r)
1595                 return r;
1596
1597         *data = msr.data;
1598
1599         return 0;
1600 }
1601
1602 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1603 {
1604         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1605                 return false;
1606
1607         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1608                 return false;
1609
1610         if (efer & (EFER_LME | EFER_LMA) &&
1611             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1612                 return false;
1613
1614         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1615                 return false;
1616
1617         return true;
1618
1619 }
1620 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1621 {
1622         if (efer & efer_reserved_bits)
1623                 return false;
1624
1625         return __kvm_valid_efer(vcpu, efer);
1626 }
1627 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1628
1629 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1630 {
1631         u64 old_efer = vcpu->arch.efer;
1632         u64 efer = msr_info->data;
1633         int r;
1634
1635         if (efer & efer_reserved_bits)
1636                 return 1;
1637
1638         if (!msr_info->host_initiated) {
1639                 if (!__kvm_valid_efer(vcpu, efer))
1640                         return 1;
1641
1642                 if (is_paging(vcpu) &&
1643                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1644                         return 1;
1645         }
1646
1647         efer &= ~EFER_LMA;
1648         efer |= vcpu->arch.efer & EFER_LMA;
1649
1650         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1651         if (r) {
1652                 WARN_ON(r > 0);
1653                 return r;
1654         }
1655
1656         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1657                 kvm_mmu_reset_context(vcpu);
1658
1659         return 0;
1660 }
1661
1662 void kvm_enable_efer_bits(u64 mask)
1663 {
1664        efer_reserved_bits &= ~mask;
1665 }
1666 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1667
1668 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1669 {
1670         struct kvm_x86_msr_filter *msr_filter;
1671         struct msr_bitmap_range *ranges;
1672         struct kvm *kvm = vcpu->kvm;
1673         bool allowed;
1674         int idx;
1675         u32 i;
1676
1677         /* x2APIC MSRs do not support filtering. */
1678         if (index >= 0x800 && index <= 0x8ff)
1679                 return true;
1680
1681         idx = srcu_read_lock(&kvm->srcu);
1682
1683         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1684         if (!msr_filter) {
1685                 allowed = true;
1686                 goto out;
1687         }
1688
1689         allowed = msr_filter->default_allow;
1690         ranges = msr_filter->ranges;
1691
1692         for (i = 0; i < msr_filter->count; i++) {
1693                 u32 start = ranges[i].base;
1694                 u32 end = start + ranges[i].nmsrs;
1695                 u32 flags = ranges[i].flags;
1696                 unsigned long *bitmap = ranges[i].bitmap;
1697
1698                 if ((index >= start) && (index < end) && (flags & type)) {
1699                         allowed = !!test_bit(index - start, bitmap);
1700                         break;
1701                 }
1702         }
1703
1704 out:
1705         srcu_read_unlock(&kvm->srcu, idx);
1706
1707         return allowed;
1708 }
1709 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1710
1711 /*
1712  * Write @data into the MSR specified by @index.  Select MSR specific fault
1713  * checks are bypassed if @host_initiated is %true.
1714  * Returns 0 on success, non-0 otherwise.
1715  * Assumes vcpu_load() was already called.
1716  */
1717 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1718                          bool host_initiated)
1719 {
1720         struct msr_data msr;
1721
1722         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1723                 return KVM_MSR_RET_FILTERED;
1724
1725         switch (index) {
1726         case MSR_FS_BASE:
1727         case MSR_GS_BASE:
1728         case MSR_KERNEL_GS_BASE:
1729         case MSR_CSTAR:
1730         case MSR_LSTAR:
1731                 if (is_noncanonical_address(data, vcpu))
1732                         return 1;
1733                 break;
1734         case MSR_IA32_SYSENTER_EIP:
1735         case MSR_IA32_SYSENTER_ESP:
1736                 /*
1737                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1738                  * non-canonical address is written on Intel but not on
1739                  * AMD (which ignores the top 32-bits, because it does
1740                  * not implement 64-bit SYSENTER).
1741                  *
1742                  * 64-bit code should hence be able to write a non-canonical
1743                  * value on AMD.  Making the address canonical ensures that
1744                  * vmentry does not fail on Intel after writing a non-canonical
1745                  * value, and that something deterministic happens if the guest
1746                  * invokes 64-bit SYSENTER.
1747                  */
1748                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1749                 break;
1750         case MSR_TSC_AUX:
1751                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1752                         return 1;
1753
1754                 if (!host_initiated &&
1755                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1756                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1757                         return 1;
1758
1759                 /*
1760                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1761                  * incomplete and conflicting architectural behavior.  Current
1762                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1763                  * reserved and always read as zeros.  Enforce Intel's reserved
1764                  * bits check if and only if the guest CPU is Intel, and clear
1765                  * the bits in all other cases.  This ensures cross-vendor
1766                  * migration will provide consistent behavior for the guest.
1767                  */
1768                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1769                         return 1;
1770
1771                 data = (u32)data;
1772                 break;
1773         }
1774
1775         msr.data = data;
1776         msr.index = index;
1777         msr.host_initiated = host_initiated;
1778
1779         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1780 }
1781
1782 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1783                                      u32 index, u64 data, bool host_initiated)
1784 {
1785         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1786
1787         if (ret == KVM_MSR_RET_INVALID)
1788                 if (kvm_msr_ignored_check(index, data, true))
1789                         ret = 0;
1790
1791         return ret;
1792 }
1793
1794 /*
1795  * Read the MSR specified by @index into @data.  Select MSR specific fault
1796  * checks are bypassed if @host_initiated is %true.
1797  * Returns 0 on success, non-0 otherwise.
1798  * Assumes vcpu_load() was already called.
1799  */
1800 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1801                   bool host_initiated)
1802 {
1803         struct msr_data msr;
1804         int ret;
1805
1806         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1807                 return KVM_MSR_RET_FILTERED;
1808
1809         switch (index) {
1810         case MSR_TSC_AUX:
1811                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1812                         return 1;
1813
1814                 if (!host_initiated &&
1815                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1816                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1817                         return 1;
1818                 break;
1819         }
1820
1821         msr.index = index;
1822         msr.host_initiated = host_initiated;
1823
1824         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1825         if (!ret)
1826                 *data = msr.data;
1827         return ret;
1828 }
1829
1830 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1831                                      u32 index, u64 *data, bool host_initiated)
1832 {
1833         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1834
1835         if (ret == KVM_MSR_RET_INVALID) {
1836                 /* Unconditionally clear *data for simplicity */
1837                 *data = 0;
1838                 if (kvm_msr_ignored_check(index, 0, false))
1839                         ret = 0;
1840         }
1841
1842         return ret;
1843 }
1844
1845 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1846 {
1847         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1848 }
1849 EXPORT_SYMBOL_GPL(kvm_get_msr);
1850
1851 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1852 {
1853         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1854 }
1855 EXPORT_SYMBOL_GPL(kvm_set_msr);
1856
1857 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1858 {
1859         int err = vcpu->run->msr.error;
1860         if (!err) {
1861                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1862                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1863         }
1864
1865         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1866 }
1867
1868 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1869 {
1870         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1871 }
1872
1873 static u64 kvm_msr_reason(int r)
1874 {
1875         switch (r) {
1876         case KVM_MSR_RET_INVALID:
1877                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1878         case KVM_MSR_RET_FILTERED:
1879                 return KVM_MSR_EXIT_REASON_FILTER;
1880         default:
1881                 return KVM_MSR_EXIT_REASON_INVAL;
1882         }
1883 }
1884
1885 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1886                               u32 exit_reason, u64 data,
1887                               int (*completion)(struct kvm_vcpu *vcpu),
1888                               int r)
1889 {
1890         u64 msr_reason = kvm_msr_reason(r);
1891
1892         /* Check if the user wanted to know about this MSR fault */
1893         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1894                 return 0;
1895
1896         vcpu->run->exit_reason = exit_reason;
1897         vcpu->run->msr.error = 0;
1898         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1899         vcpu->run->msr.reason = msr_reason;
1900         vcpu->run->msr.index = index;
1901         vcpu->run->msr.data = data;
1902         vcpu->arch.complete_userspace_io = completion;
1903
1904         return 1;
1905 }
1906
1907 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1908 {
1909         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1910                                    complete_emulated_rdmsr, r);
1911 }
1912
1913 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1914 {
1915         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1916                                    complete_emulated_wrmsr, r);
1917 }
1918
1919 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1920 {
1921         u32 ecx = kvm_rcx_read(vcpu);
1922         u64 data;
1923         int r;
1924
1925         r = kvm_get_msr(vcpu, ecx, &data);
1926
1927         /* MSR read failed? See if we should ask user space */
1928         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1929                 /* Bounce to user space */
1930                 return 0;
1931         }
1932
1933         if (!r) {
1934                 trace_kvm_msr_read(ecx, data);
1935
1936                 kvm_rax_write(vcpu, data & -1u);
1937                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1938         } else {
1939                 trace_kvm_msr_read_ex(ecx);
1940         }
1941
1942         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1943 }
1944 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1945
1946 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1947 {
1948         u32 ecx = kvm_rcx_read(vcpu);
1949         u64 data = kvm_read_edx_eax(vcpu);
1950         int r;
1951
1952         r = kvm_set_msr(vcpu, ecx, data);
1953
1954         /* MSR write failed? See if we should ask user space */
1955         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1956                 /* Bounce to user space */
1957                 return 0;
1958
1959         /* Signal all other negative errors to userspace */
1960         if (r < 0)
1961                 return r;
1962
1963         if (!r)
1964                 trace_kvm_msr_write(ecx, data);
1965         else
1966                 trace_kvm_msr_write_ex(ecx, data);
1967
1968         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1969 }
1970 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1971
1972 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1973 {
1974         return kvm_skip_emulated_instruction(vcpu);
1975 }
1976 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1977
1978 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1979 {
1980         /* Treat an INVD instruction as a NOP and just skip it. */
1981         return kvm_emulate_as_nop(vcpu);
1982 }
1983 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1984
1985 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1986 {
1987         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1988         return kvm_emulate_as_nop(vcpu);
1989 }
1990 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1991
1992 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1993 {
1994         kvm_queue_exception(vcpu, UD_VECTOR);
1995         return 1;
1996 }
1997 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1998
1999 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2000 {
2001         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2002         return kvm_emulate_as_nop(vcpu);
2003 }
2004 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2005
2006 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2007 {
2008         xfer_to_guest_mode_prepare();
2009         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2010                 xfer_to_guest_mode_work_pending();
2011 }
2012
2013 /*
2014  * The fast path for frequent and performance sensitive wrmsr emulation,
2015  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2016  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2017  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2018  * other cases which must be called after interrupts are enabled on the host.
2019  */
2020 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2021 {
2022         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2023                 return 1;
2024
2025         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2026                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2027                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2028                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2029
2030                 data &= ~(1 << 12);
2031                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2032                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2033                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2034                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2035                 return 0;
2036         }
2037
2038         return 1;
2039 }
2040
2041 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2042 {
2043         if (!kvm_can_use_hv_timer(vcpu))
2044                 return 1;
2045
2046         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2047         return 0;
2048 }
2049
2050 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2051 {
2052         u32 msr = kvm_rcx_read(vcpu);
2053         u64 data;
2054         fastpath_t ret = EXIT_FASTPATH_NONE;
2055
2056         switch (msr) {
2057         case APIC_BASE_MSR + (APIC_ICR >> 4):
2058                 data = kvm_read_edx_eax(vcpu);
2059                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2060                         kvm_skip_emulated_instruction(vcpu);
2061                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2062                 }
2063                 break;
2064         case MSR_IA32_TSC_DEADLINE:
2065                 data = kvm_read_edx_eax(vcpu);
2066                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2067                         kvm_skip_emulated_instruction(vcpu);
2068                         ret = EXIT_FASTPATH_REENTER_GUEST;
2069                 }
2070                 break;
2071         default:
2072                 break;
2073         }
2074
2075         if (ret != EXIT_FASTPATH_NONE)
2076                 trace_kvm_msr_write(msr, data);
2077
2078         return ret;
2079 }
2080 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2081
2082 /*
2083  * Adapt set_msr() to msr_io()'s calling convention
2084  */
2085 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2086 {
2087         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2088 }
2089
2090 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2091 {
2092         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2093 }
2094
2095 #ifdef CONFIG_X86_64
2096 struct pvclock_clock {
2097         int vclock_mode;
2098         u64 cycle_last;
2099         u64 mask;
2100         u32 mult;
2101         u32 shift;
2102         u64 base_cycles;
2103         u64 offset;
2104 };
2105
2106 struct pvclock_gtod_data {
2107         seqcount_t      seq;
2108
2109         struct pvclock_clock clock; /* extract of a clocksource struct */
2110         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2111
2112         ktime_t         offs_boot;
2113         u64             wall_time_sec;
2114 };
2115
2116 static struct pvclock_gtod_data pvclock_gtod_data;
2117
2118 static void update_pvclock_gtod(struct timekeeper *tk)
2119 {
2120         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2121
2122         write_seqcount_begin(&vdata->seq);
2123
2124         /* copy pvclock gtod data */
2125         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2126         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2127         vdata->clock.mask               = tk->tkr_mono.mask;
2128         vdata->clock.mult               = tk->tkr_mono.mult;
2129         vdata->clock.shift              = tk->tkr_mono.shift;
2130         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2131         vdata->clock.offset             = tk->tkr_mono.base;
2132
2133         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2134         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2135         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2136         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2137         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2138         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2139         vdata->raw_clock.offset         = tk->tkr_raw.base;
2140
2141         vdata->wall_time_sec            = tk->xtime_sec;
2142
2143         vdata->offs_boot                = tk->offs_boot;
2144
2145         write_seqcount_end(&vdata->seq);
2146 }
2147
2148 static s64 get_kvmclock_base_ns(void)
2149 {
2150         /* Count up from boot time, but with the frequency of the raw clock.  */
2151         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2152 }
2153 #else
2154 static s64 get_kvmclock_base_ns(void)
2155 {
2156         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2157         return ktime_get_boottime_ns();
2158 }
2159 #endif
2160
2161 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2162 {
2163         int version;
2164         int r;
2165         struct pvclock_wall_clock wc;
2166         u32 wc_sec_hi;
2167         u64 wall_nsec;
2168
2169         if (!wall_clock)
2170                 return;
2171
2172         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2173         if (r)
2174                 return;
2175
2176         if (version & 1)
2177                 ++version;  /* first time write, random junk */
2178
2179         ++version;
2180
2181         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2182                 return;
2183
2184         /*
2185          * The guest calculates current wall clock time by adding
2186          * system time (updated by kvm_guest_time_update below) to the
2187          * wall clock specified here.  We do the reverse here.
2188          */
2189         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2190
2191         wc.nsec = do_div(wall_nsec, 1000000000);
2192         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2193         wc.version = version;
2194
2195         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2196
2197         if (sec_hi_ofs) {
2198                 wc_sec_hi = wall_nsec >> 32;
2199                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2200                                 &wc_sec_hi, sizeof(wc_sec_hi));
2201         }
2202
2203         version++;
2204         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2205 }
2206
2207 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2208                                   bool old_msr, bool host_initiated)
2209 {
2210         struct kvm_arch *ka = &vcpu->kvm->arch;
2211
2212         if (vcpu->vcpu_id == 0 && !host_initiated) {
2213                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2214                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2215
2216                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2217         }
2218
2219         vcpu->arch.time = system_time;
2220         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2221
2222         /* we verify if the enable bit is set... */
2223         vcpu->arch.pv_time_enabled = false;
2224         if (!(system_time & 1))
2225                 return;
2226
2227         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2228                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2229                                        sizeof(struct pvclock_vcpu_time_info)))
2230                 vcpu->arch.pv_time_enabled = true;
2231
2232         return;
2233 }
2234
2235 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2236 {
2237         do_shl32_div32(dividend, divisor);
2238         return dividend;
2239 }
2240
2241 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2242                                s8 *pshift, u32 *pmultiplier)
2243 {
2244         uint64_t scaled64;
2245         int32_t  shift = 0;
2246         uint64_t tps64;
2247         uint32_t tps32;
2248
2249         tps64 = base_hz;
2250         scaled64 = scaled_hz;
2251         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2252                 tps64 >>= 1;
2253                 shift--;
2254         }
2255
2256         tps32 = (uint32_t)tps64;
2257         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2258                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2259                         scaled64 >>= 1;
2260                 else
2261                         tps32 <<= 1;
2262                 shift++;
2263         }
2264
2265         *pshift = shift;
2266         *pmultiplier = div_frac(scaled64, tps32);
2267 }
2268
2269 #ifdef CONFIG_X86_64
2270 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2271 #endif
2272
2273 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2274 static unsigned long max_tsc_khz;
2275
2276 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2277 {
2278         u64 v = (u64)khz * (1000000 + ppm);
2279         do_div(v, 1000000);
2280         return v;
2281 }
2282
2283 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2284
2285 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2286 {
2287         u64 ratio;
2288
2289         /* Guest TSC same frequency as host TSC? */
2290         if (!scale) {
2291                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2292                 return 0;
2293         }
2294
2295         /* TSC scaling supported? */
2296         if (!kvm_has_tsc_control) {
2297                 if (user_tsc_khz > tsc_khz) {
2298                         vcpu->arch.tsc_catchup = 1;
2299                         vcpu->arch.tsc_always_catchup = 1;
2300                         return 0;
2301                 } else {
2302                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2303                         return -1;
2304                 }
2305         }
2306
2307         /* TSC scaling required  - calculate ratio */
2308         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2309                                 user_tsc_khz, tsc_khz);
2310
2311         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2312                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2313                                     user_tsc_khz);
2314                 return -1;
2315         }
2316
2317         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2318         return 0;
2319 }
2320
2321 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2322 {
2323         u32 thresh_lo, thresh_hi;
2324         int use_scaling = 0;
2325
2326         /* tsc_khz can be zero if TSC calibration fails */
2327         if (user_tsc_khz == 0) {
2328                 /* set tsc_scaling_ratio to a safe value */
2329                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2330                 return -1;
2331         }
2332
2333         /* Compute a scale to convert nanoseconds in TSC cycles */
2334         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2335                            &vcpu->arch.virtual_tsc_shift,
2336                            &vcpu->arch.virtual_tsc_mult);
2337         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2338
2339         /*
2340          * Compute the variation in TSC rate which is acceptable
2341          * within the range of tolerance and decide if the
2342          * rate being applied is within that bounds of the hardware
2343          * rate.  If so, no scaling or compensation need be done.
2344          */
2345         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2346         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2347         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2348                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2349                 use_scaling = 1;
2350         }
2351         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2352 }
2353
2354 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2355 {
2356         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2357                                       vcpu->arch.virtual_tsc_mult,
2358                                       vcpu->arch.virtual_tsc_shift);
2359         tsc += vcpu->arch.this_tsc_write;
2360         return tsc;
2361 }
2362
2363 static inline int gtod_is_based_on_tsc(int mode)
2364 {
2365         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2366 }
2367
2368 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2369 {
2370 #ifdef CONFIG_X86_64
2371         bool vcpus_matched;
2372         struct kvm_arch *ka = &vcpu->kvm->arch;
2373         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2374
2375         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2376                          atomic_read(&vcpu->kvm->online_vcpus));
2377
2378         /*
2379          * Once the masterclock is enabled, always perform request in
2380          * order to update it.
2381          *
2382          * In order to enable masterclock, the host clocksource must be TSC
2383          * and the vcpus need to have matched TSCs.  When that happens,
2384          * perform request to enable masterclock.
2385          */
2386         if (ka->use_master_clock ||
2387             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2388                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2389
2390         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2391                             atomic_read(&vcpu->kvm->online_vcpus),
2392                             ka->use_master_clock, gtod->clock.vclock_mode);
2393 #endif
2394 }
2395
2396 /*
2397  * Multiply tsc by a fixed point number represented by ratio.
2398  *
2399  * The most significant 64-N bits (mult) of ratio represent the
2400  * integral part of the fixed point number; the remaining N bits
2401  * (frac) represent the fractional part, ie. ratio represents a fixed
2402  * point number (mult + frac * 2^(-N)).
2403  *
2404  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2405  */
2406 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2407 {
2408         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2409 }
2410
2411 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2412 {
2413         u64 _tsc = tsc;
2414
2415         if (ratio != kvm_default_tsc_scaling_ratio)
2416                 _tsc = __scale_tsc(ratio, tsc);
2417
2418         return _tsc;
2419 }
2420 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2421
2422 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2423 {
2424         u64 tsc;
2425
2426         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2427
2428         return target_tsc - tsc;
2429 }
2430
2431 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2432 {
2433         return vcpu->arch.l1_tsc_offset +
2434                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2435 }
2436 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2437
2438 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2439 {
2440         u64 nested_offset;
2441
2442         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2443                 nested_offset = l1_offset;
2444         else
2445                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2446                                                 kvm_tsc_scaling_ratio_frac_bits);
2447
2448         nested_offset += l2_offset;
2449         return nested_offset;
2450 }
2451 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2452
2453 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2454 {
2455         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2456                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2457                                        kvm_tsc_scaling_ratio_frac_bits);
2458
2459         return l1_multiplier;
2460 }
2461 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2462
2463 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2464 {
2465         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2466                                    vcpu->arch.l1_tsc_offset,
2467                                    l1_offset);
2468
2469         vcpu->arch.l1_tsc_offset = l1_offset;
2470
2471         /*
2472          * If we are here because L1 chose not to trap WRMSR to TSC then
2473          * according to the spec this should set L1's TSC (as opposed to
2474          * setting L1's offset for L2).
2475          */
2476         if (is_guest_mode(vcpu))
2477                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2478                         l1_offset,
2479                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2480                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2481         else
2482                 vcpu->arch.tsc_offset = l1_offset;
2483
2484         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2485 }
2486
2487 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2488 {
2489         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2490
2491         /* Userspace is changing the multiplier while L2 is active */
2492         if (is_guest_mode(vcpu))
2493                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2494                         l1_multiplier,
2495                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2496         else
2497                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2498
2499         if (kvm_has_tsc_control)
2500                 static_call(kvm_x86_write_tsc_multiplier)(
2501                         vcpu, vcpu->arch.tsc_scaling_ratio);
2502 }
2503
2504 static inline bool kvm_check_tsc_unstable(void)
2505 {
2506 #ifdef CONFIG_X86_64
2507         /*
2508          * TSC is marked unstable when we're running on Hyper-V,
2509          * 'TSC page' clocksource is good.
2510          */
2511         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2512                 return false;
2513 #endif
2514         return check_tsc_unstable();
2515 }
2516
2517 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2518 {
2519         struct kvm *kvm = vcpu->kvm;
2520         u64 offset, ns, elapsed;
2521         unsigned long flags;
2522         bool matched;
2523         bool already_matched;
2524         bool synchronizing = false;
2525
2526         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2527         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2528         ns = get_kvmclock_base_ns();
2529         elapsed = ns - kvm->arch.last_tsc_nsec;
2530
2531         if (vcpu->arch.virtual_tsc_khz) {
2532                 if (data == 0) {
2533                         /*
2534                          * detection of vcpu initialization -- need to sync
2535                          * with other vCPUs. This particularly helps to keep
2536                          * kvm_clock stable after CPU hotplug
2537                          */
2538                         synchronizing = true;
2539                 } else {
2540                         u64 tsc_exp = kvm->arch.last_tsc_write +
2541                                                 nsec_to_cycles(vcpu, elapsed);
2542                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2543                         /*
2544                          * Special case: TSC write with a small delta (1 second)
2545                          * of virtual cycle time against real time is
2546                          * interpreted as an attempt to synchronize the CPU.
2547                          */
2548                         synchronizing = data < tsc_exp + tsc_hz &&
2549                                         data + tsc_hz > tsc_exp;
2550                 }
2551         }
2552
2553         /*
2554          * For a reliable TSC, we can match TSC offsets, and for an unstable
2555          * TSC, we add elapsed time in this computation.  We could let the
2556          * compensation code attempt to catch up if we fall behind, but
2557          * it's better to try to match offsets from the beginning.
2558          */
2559         if (synchronizing &&
2560             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2561                 if (!kvm_check_tsc_unstable()) {
2562                         offset = kvm->arch.cur_tsc_offset;
2563                 } else {
2564                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2565                         data += delta;
2566                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2567                 }
2568                 matched = true;
2569                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2570         } else {
2571                 /*
2572                  * We split periods of matched TSC writes into generations.
2573                  * For each generation, we track the original measured
2574                  * nanosecond time, offset, and write, so if TSCs are in
2575                  * sync, we can match exact offset, and if not, we can match
2576                  * exact software computation in compute_guest_tsc()
2577                  *
2578                  * These values are tracked in kvm->arch.cur_xxx variables.
2579                  */
2580                 kvm->arch.cur_tsc_generation++;
2581                 kvm->arch.cur_tsc_nsec = ns;
2582                 kvm->arch.cur_tsc_write = data;
2583                 kvm->arch.cur_tsc_offset = offset;
2584                 matched = false;
2585         }
2586
2587         /*
2588          * We also track th most recent recorded KHZ, write and time to
2589          * allow the matching interval to be extended at each write.
2590          */
2591         kvm->arch.last_tsc_nsec = ns;
2592         kvm->arch.last_tsc_write = data;
2593         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2594
2595         vcpu->arch.last_guest_tsc = data;
2596
2597         /* Keep track of which generation this VCPU has synchronized to */
2598         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2599         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2600         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2601
2602         kvm_vcpu_write_tsc_offset(vcpu, offset);
2603         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2604
2605         raw_spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2606         if (!matched) {
2607                 kvm->arch.nr_vcpus_matched_tsc = 0;
2608         } else if (!already_matched) {
2609                 kvm->arch.nr_vcpus_matched_tsc++;
2610         }
2611
2612         kvm_track_tsc_matching(vcpu);
2613         raw_spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2614 }
2615
2616 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2617                                            s64 adjustment)
2618 {
2619         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2620         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2621 }
2622
2623 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2624 {
2625         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2626                 WARN_ON(adjustment < 0);
2627         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2628                                    vcpu->arch.l1_tsc_scaling_ratio);
2629         adjust_tsc_offset_guest(vcpu, adjustment);
2630 }
2631
2632 #ifdef CONFIG_X86_64
2633
2634 static u64 read_tsc(void)
2635 {
2636         u64 ret = (u64)rdtsc_ordered();
2637         u64 last = pvclock_gtod_data.clock.cycle_last;
2638
2639         if (likely(ret >= last))
2640                 return ret;
2641
2642         /*
2643          * GCC likes to generate cmov here, but this branch is extremely
2644          * predictable (it's just a function of time and the likely is
2645          * very likely) and there's a data dependence, so force GCC
2646          * to generate a branch instead.  I don't barrier() because
2647          * we don't actually need a barrier, and if this function
2648          * ever gets inlined it will generate worse code.
2649          */
2650         asm volatile ("");
2651         return last;
2652 }
2653
2654 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2655                           int *mode)
2656 {
2657         long v;
2658         u64 tsc_pg_val;
2659
2660         switch (clock->vclock_mode) {
2661         case VDSO_CLOCKMODE_HVCLOCK:
2662                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2663                                                   tsc_timestamp);
2664                 if (tsc_pg_val != U64_MAX) {
2665                         /* TSC page valid */
2666                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2667                         v = (tsc_pg_val - clock->cycle_last) &
2668                                 clock->mask;
2669                 } else {
2670                         /* TSC page invalid */
2671                         *mode = VDSO_CLOCKMODE_NONE;
2672                 }
2673                 break;
2674         case VDSO_CLOCKMODE_TSC:
2675                 *mode = VDSO_CLOCKMODE_TSC;
2676                 *tsc_timestamp = read_tsc();
2677                 v = (*tsc_timestamp - clock->cycle_last) &
2678                         clock->mask;
2679                 break;
2680         default:
2681                 *mode = VDSO_CLOCKMODE_NONE;
2682         }
2683
2684         if (*mode == VDSO_CLOCKMODE_NONE)
2685                 *tsc_timestamp = v = 0;
2686
2687         return v * clock->mult;
2688 }
2689
2690 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2691 {
2692         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2693         unsigned long seq;
2694         int mode;
2695         u64 ns;
2696
2697         do {
2698                 seq = read_seqcount_begin(&gtod->seq);
2699                 ns = gtod->raw_clock.base_cycles;
2700                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2701                 ns >>= gtod->raw_clock.shift;
2702                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2703         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2704         *t = ns;
2705
2706         return mode;
2707 }
2708
2709 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2710 {
2711         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2712         unsigned long seq;
2713         int mode;
2714         u64 ns;
2715
2716         do {
2717                 seq = read_seqcount_begin(&gtod->seq);
2718                 ts->tv_sec = gtod->wall_time_sec;
2719                 ns = gtod->clock.base_cycles;
2720                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2721                 ns >>= gtod->clock.shift;
2722         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2723
2724         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2725         ts->tv_nsec = ns;
2726
2727         return mode;
2728 }
2729
2730 /* returns true if host is using TSC based clocksource */
2731 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2732 {
2733         /* checked again under seqlock below */
2734         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2735                 return false;
2736
2737         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2738                                                       tsc_timestamp));
2739 }
2740
2741 /* returns true if host is using TSC based clocksource */
2742 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2743                                            u64 *tsc_timestamp)
2744 {
2745         /* checked again under seqlock below */
2746         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2747                 return false;
2748
2749         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2750 }
2751 #endif
2752
2753 /*
2754  *
2755  * Assuming a stable TSC across physical CPUS, and a stable TSC
2756  * across virtual CPUs, the following condition is possible.
2757  * Each numbered line represents an event visible to both
2758  * CPUs at the next numbered event.
2759  *
2760  * "timespecX" represents host monotonic time. "tscX" represents
2761  * RDTSC value.
2762  *
2763  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2764  *
2765  * 1.  read timespec0,tsc0
2766  * 2.                                   | timespec1 = timespec0 + N
2767  *                                      | tsc1 = tsc0 + M
2768  * 3. transition to guest               | transition to guest
2769  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2770  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2771  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2772  *
2773  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2774  *
2775  *      - ret0 < ret1
2776  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2777  *              ...
2778  *      - 0 < N - M => M < N
2779  *
2780  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2781  * always the case (the difference between two distinct xtime instances
2782  * might be smaller then the difference between corresponding TSC reads,
2783  * when updating guest vcpus pvclock areas).
2784  *
2785  * To avoid that problem, do not allow visibility of distinct
2786  * system_timestamp/tsc_timestamp values simultaneously: use a master
2787  * copy of host monotonic time values. Update that master copy
2788  * in lockstep.
2789  *
2790  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2791  *
2792  */
2793
2794 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2795 {
2796 #ifdef CONFIG_X86_64
2797         struct kvm_arch *ka = &kvm->arch;
2798         int vclock_mode;
2799         bool host_tsc_clocksource, vcpus_matched;
2800
2801         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2802                         atomic_read(&kvm->online_vcpus));
2803
2804         /*
2805          * If the host uses TSC clock, then passthrough TSC as stable
2806          * to the guest.
2807          */
2808         host_tsc_clocksource = kvm_get_time_and_clockread(
2809                                         &ka->master_kernel_ns,
2810                                         &ka->master_cycle_now);
2811
2812         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2813                                 && !ka->backwards_tsc_observed
2814                                 && !ka->boot_vcpu_runs_old_kvmclock;
2815
2816         if (ka->use_master_clock)
2817                 atomic_set(&kvm_guest_has_master_clock, 1);
2818
2819         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2820         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2821                                         vcpus_matched);
2822 #endif
2823 }
2824
2825 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2826 {
2827         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2828 }
2829
2830 static void kvm_gen_update_masterclock(struct kvm *kvm)
2831 {
2832 #ifdef CONFIG_X86_64
2833         int i;
2834         struct kvm_vcpu *vcpu;
2835         struct kvm_arch *ka = &kvm->arch;
2836         unsigned long flags;
2837
2838         kvm_hv_invalidate_tsc_page(kvm);
2839
2840         kvm_make_mclock_inprogress_request(kvm);
2841
2842         /* no guest entries from this point */
2843         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2844         pvclock_update_vm_gtod_copy(kvm);
2845         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2846
2847         kvm_for_each_vcpu(i, vcpu, kvm)
2848                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2849
2850         /* guest entries allowed */
2851         kvm_for_each_vcpu(i, vcpu, kvm)
2852                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2853 #endif
2854 }
2855
2856 u64 get_kvmclock_ns(struct kvm *kvm)
2857 {
2858         struct kvm_arch *ka = &kvm->arch;
2859         struct pvclock_vcpu_time_info hv_clock;
2860         unsigned long flags;
2861         u64 ret;
2862
2863         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2864         if (!ka->use_master_clock) {
2865                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2866                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2867         }
2868
2869         hv_clock.tsc_timestamp = ka->master_cycle_now;
2870         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2871         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2872
2873         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2874         get_cpu();
2875
2876         if (__this_cpu_read(cpu_tsc_khz)) {
2877                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2878                                    &hv_clock.tsc_shift,
2879                                    &hv_clock.tsc_to_system_mul);
2880                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2881         } else
2882                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2883
2884         put_cpu();
2885
2886         return ret;
2887 }
2888
2889 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2890                                    struct gfn_to_hva_cache *cache,
2891                                    unsigned int offset)
2892 {
2893         struct kvm_vcpu_arch *vcpu = &v->arch;
2894         struct pvclock_vcpu_time_info guest_hv_clock;
2895
2896         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2897                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2898                 return;
2899
2900         /* This VCPU is paused, but it's legal for a guest to read another
2901          * VCPU's kvmclock, so we really have to follow the specification where
2902          * it says that version is odd if data is being modified, and even after
2903          * it is consistent.
2904          *
2905          * Version field updates must be kept separate.  This is because
2906          * kvm_write_guest_cached might use a "rep movs" instruction, and
2907          * writes within a string instruction are weakly ordered.  So there
2908          * are three writes overall.
2909          *
2910          * As a small optimization, only write the version field in the first
2911          * and third write.  The vcpu->pv_time cache is still valid, because the
2912          * version field is the first in the struct.
2913          */
2914         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2915
2916         if (guest_hv_clock.version & 1)
2917                 ++guest_hv_clock.version;  /* first time write, random junk */
2918
2919         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2920         kvm_write_guest_offset_cached(v->kvm, cache,
2921                                       &vcpu->hv_clock, offset,
2922                                       sizeof(vcpu->hv_clock.version));
2923
2924         smp_wmb();
2925
2926         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2927         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2928
2929         if (vcpu->pvclock_set_guest_stopped_request) {
2930                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2931                 vcpu->pvclock_set_guest_stopped_request = false;
2932         }
2933
2934         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2935
2936         kvm_write_guest_offset_cached(v->kvm, cache,
2937                                       &vcpu->hv_clock, offset,
2938                                       sizeof(vcpu->hv_clock));
2939
2940         smp_wmb();
2941
2942         vcpu->hv_clock.version++;
2943         kvm_write_guest_offset_cached(v->kvm, cache,
2944                                      &vcpu->hv_clock, offset,
2945                                      sizeof(vcpu->hv_clock.version));
2946 }
2947
2948 static int kvm_guest_time_update(struct kvm_vcpu *v)
2949 {
2950         unsigned long flags, tgt_tsc_khz;
2951         struct kvm_vcpu_arch *vcpu = &v->arch;
2952         struct kvm_arch *ka = &v->kvm->arch;
2953         s64 kernel_ns;
2954         u64 tsc_timestamp, host_tsc;
2955         u8 pvclock_flags;
2956         bool use_master_clock;
2957
2958         kernel_ns = 0;
2959         host_tsc = 0;
2960
2961         /*
2962          * If the host uses TSC clock, then passthrough TSC as stable
2963          * to the guest.
2964          */
2965         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2966         use_master_clock = ka->use_master_clock;
2967         if (use_master_clock) {
2968                 host_tsc = ka->master_cycle_now;
2969                 kernel_ns = ka->master_kernel_ns;
2970         }
2971         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2972
2973         /* Keep irq disabled to prevent changes to the clock */
2974         local_irq_save(flags);
2975         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2976         if (unlikely(tgt_tsc_khz == 0)) {
2977                 local_irq_restore(flags);
2978                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2979                 return 1;
2980         }
2981         if (!use_master_clock) {
2982                 host_tsc = rdtsc();
2983                 kernel_ns = get_kvmclock_base_ns();
2984         }
2985
2986         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2987
2988         /*
2989          * We may have to catch up the TSC to match elapsed wall clock
2990          * time for two reasons, even if kvmclock is used.
2991          *   1) CPU could have been running below the maximum TSC rate
2992          *   2) Broken TSC compensation resets the base at each VCPU
2993          *      entry to avoid unknown leaps of TSC even when running
2994          *      again on the same CPU.  This may cause apparent elapsed
2995          *      time to disappear, and the guest to stand still or run
2996          *      very slowly.
2997          */
2998         if (vcpu->tsc_catchup) {
2999                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3000                 if (tsc > tsc_timestamp) {
3001                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3002                         tsc_timestamp = tsc;
3003                 }
3004         }
3005
3006         local_irq_restore(flags);
3007
3008         /* With all the info we got, fill in the values */
3009
3010         if (kvm_has_tsc_control)
3011                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3012                                             v->arch.l1_tsc_scaling_ratio);
3013
3014         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3015                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3016                                    &vcpu->hv_clock.tsc_shift,
3017                                    &vcpu->hv_clock.tsc_to_system_mul);
3018                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3019         }
3020
3021         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3022         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3023         vcpu->last_guest_tsc = tsc_timestamp;
3024
3025         /* If the host uses TSC clocksource, then it is stable */
3026         pvclock_flags = 0;
3027         if (use_master_clock)
3028                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3029
3030         vcpu->hv_clock.flags = pvclock_flags;
3031
3032         if (vcpu->pv_time_enabled)
3033                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3034         if (vcpu->xen.vcpu_info_set)
3035                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3036                                        offsetof(struct compat_vcpu_info, time));
3037         if (vcpu->xen.vcpu_time_info_set)
3038                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3039         if (!v->vcpu_idx)
3040                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3041         return 0;
3042 }
3043
3044 /*
3045  * kvmclock updates which are isolated to a given vcpu, such as
3046  * vcpu->cpu migration, should not allow system_timestamp from
3047  * the rest of the vcpus to remain static. Otherwise ntp frequency
3048  * correction applies to one vcpu's system_timestamp but not
3049  * the others.
3050  *
3051  * So in those cases, request a kvmclock update for all vcpus.
3052  * We need to rate-limit these requests though, as they can
3053  * considerably slow guests that have a large number of vcpus.
3054  * The time for a remote vcpu to update its kvmclock is bound
3055  * by the delay we use to rate-limit the updates.
3056  */
3057
3058 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3059
3060 static void kvmclock_update_fn(struct work_struct *work)
3061 {
3062         int i;
3063         struct delayed_work *dwork = to_delayed_work(work);
3064         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3065                                            kvmclock_update_work);
3066         struct kvm *kvm = container_of(ka, struct kvm, arch);
3067         struct kvm_vcpu *vcpu;
3068
3069         kvm_for_each_vcpu(i, vcpu, kvm) {
3070                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3071                 kvm_vcpu_kick(vcpu);
3072         }
3073 }
3074
3075 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3076 {
3077         struct kvm *kvm = v->kvm;
3078
3079         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3080         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3081                                         KVMCLOCK_UPDATE_DELAY);
3082 }
3083
3084 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3085
3086 static void kvmclock_sync_fn(struct work_struct *work)
3087 {
3088         struct delayed_work *dwork = to_delayed_work(work);
3089         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3090                                            kvmclock_sync_work);
3091         struct kvm *kvm = container_of(ka, struct kvm, arch);
3092
3093         if (!kvmclock_periodic_sync)
3094                 return;
3095
3096         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3097         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3098                                         KVMCLOCK_SYNC_PERIOD);
3099 }
3100
3101 /*
3102  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3103  */
3104 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3105 {
3106         /* McStatusWrEn enabled? */
3107         if (guest_cpuid_is_amd_or_hygon(vcpu))
3108                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3109
3110         return false;
3111 }
3112
3113 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3114 {
3115         u64 mcg_cap = vcpu->arch.mcg_cap;
3116         unsigned bank_num = mcg_cap & 0xff;
3117         u32 msr = msr_info->index;
3118         u64 data = msr_info->data;
3119
3120         switch (msr) {
3121         case MSR_IA32_MCG_STATUS:
3122                 vcpu->arch.mcg_status = data;
3123                 break;
3124         case MSR_IA32_MCG_CTL:
3125                 if (!(mcg_cap & MCG_CTL_P) &&
3126                     (data || !msr_info->host_initiated))
3127                         return 1;
3128                 if (data != 0 && data != ~(u64)0)
3129                         return 1;
3130                 vcpu->arch.mcg_ctl = data;
3131                 break;
3132         default:
3133                 if (msr >= MSR_IA32_MC0_CTL &&
3134                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3135                         u32 offset = array_index_nospec(
3136                                 msr - MSR_IA32_MC0_CTL,
3137                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3138
3139                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3140                          * some Linux kernels though clear bit 10 in bank 4 to
3141                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3142                          * this to avoid an uncatched #GP in the guest.
3143                          *
3144                          * UNIXWARE clears bit 0 of MC1_CTL to ignore
3145                          * correctable, single-bit ECC data errors.
3146                          */
3147                         if ((offset & 0x3) == 0 &&
3148                             data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3149                                 return 1;
3150
3151                         /* MCi_STATUS */
3152                         if (!msr_info->host_initiated &&
3153                             (offset & 0x3) == 1 && data != 0) {
3154                                 if (!can_set_mci_status(vcpu))
3155                                         return 1;
3156                         }
3157
3158                         vcpu->arch.mce_banks[offset] = data;
3159                         break;
3160                 }
3161                 return 1;
3162         }
3163         return 0;
3164 }
3165
3166 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3167 {
3168         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3169
3170         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3171 }
3172
3173 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3174 {
3175         gpa_t gpa = data & ~0x3f;
3176
3177         /* Bits 4:5 are reserved, Should be zero */
3178         if (data & 0x30)
3179                 return 1;
3180
3181         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3182             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3183                 return 1;
3184
3185         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3186             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3187                 return 1;
3188
3189         if (!lapic_in_kernel(vcpu))
3190                 return data ? 1 : 0;
3191
3192         vcpu->arch.apf.msr_en_val = data;
3193
3194         if (!kvm_pv_async_pf_enabled(vcpu)) {
3195                 kvm_clear_async_pf_completion_queue(vcpu);
3196                 kvm_async_pf_hash_reset(vcpu);
3197                 return 0;
3198         }
3199
3200         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3201                                         sizeof(u64)))
3202                 return 1;
3203
3204         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3205         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3206
3207         kvm_async_pf_wakeup_all(vcpu);
3208
3209         return 0;
3210 }
3211
3212 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3213 {
3214         /* Bits 8-63 are reserved */
3215         if (data >> 8)
3216                 return 1;
3217
3218         if (!lapic_in_kernel(vcpu))
3219                 return 1;
3220
3221         vcpu->arch.apf.msr_int_val = data;
3222
3223         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3224
3225         return 0;
3226 }
3227
3228 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3229 {
3230         vcpu->arch.pv_time_enabled = false;
3231         vcpu->arch.time = 0;
3232 }
3233
3234 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3235 {
3236         ++vcpu->stat.tlb_flush;
3237         static_call(kvm_x86_tlb_flush_all)(vcpu);
3238 }
3239
3240 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3241 {
3242         ++vcpu->stat.tlb_flush;
3243
3244         if (!tdp_enabled) {
3245                /*
3246                  * A TLB flush on behalf of the guest is equivalent to
3247                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3248                  * a forced sync of the shadow page tables.  Unload the
3249                  * entire MMU here and the subsequent load will sync the
3250                  * shadow page tables, and also flush the TLB.
3251                  */
3252                 kvm_mmu_unload(vcpu);
3253                 return;
3254         }
3255
3256         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3257 }
3258
3259
3260 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3261 {
3262         ++vcpu->stat.tlb_flush;
3263         static_call(kvm_x86_tlb_flush_current)(vcpu);
3264 }
3265
3266 /*
3267  * Service "local" TLB flush requests, which are specific to the current MMU
3268  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3269  * TLB flushes that are targeted at an MMU context also need to be serviced
3270  * prior before nested VM-Enter/VM-Exit.
3271  */
3272 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3273 {
3274         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3275                 kvm_vcpu_flush_tlb_current(vcpu);
3276
3277         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3278                 kvm_vcpu_flush_tlb_guest(vcpu);
3279 }
3280 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3281
3282 static void record_steal_time(struct kvm_vcpu *vcpu)
3283 {
3284         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3285         struct kvm_steal_time __user *st;
3286         struct kvm_memslots *slots;
3287         gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3288         u64 steal;
3289         u32 version;
3290
3291         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3292                 kvm_xen_runstate_set_running(vcpu);
3293                 return;
3294         }
3295
3296         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3297                 return;
3298
3299         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3300                 return;
3301
3302         slots = kvm_memslots(vcpu->kvm);
3303
3304         if (unlikely(slots->generation != ghc->generation ||
3305                      gpa != ghc->gpa ||
3306                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3307                 /* We rely on the fact that it fits in a single page. */
3308                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3309
3310                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gpa, sizeof(*st)) ||
3311                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3312                         return;
3313         }
3314
3315         st = (struct kvm_steal_time __user *)ghc->hva;
3316         /*
3317          * Doing a TLB flush here, on the guest's behalf, can avoid
3318          * expensive IPIs.
3319          */
3320         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3321                 u8 st_preempted = 0;
3322                 int err = -EFAULT;
3323
3324                 if (!user_access_begin(st, sizeof(*st)))
3325                         return;
3326
3327                 asm volatile("1: xchgb %0, %2\n"
3328                              "xor %1, %1\n"
3329                              "2:\n"
3330                              _ASM_EXTABLE_UA(1b, 2b)
3331                              : "+q" (st_preempted),
3332                                "+&r" (err),
3333                                "+m" (st->preempted));
3334                 if (err)
3335                         goto out;
3336
3337                 user_access_end();
3338
3339                 vcpu->arch.st.preempted = 0;
3340
3341                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3342                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3343                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3344                         kvm_vcpu_flush_tlb_guest(vcpu);
3345
3346                 if (!user_access_begin(st, sizeof(*st)))
3347                         goto dirty;
3348         } else {
3349                 if (!user_access_begin(st, sizeof(*st)))
3350                         return;
3351
3352                 unsafe_put_user(0, &st->preempted, out);
3353                 vcpu->arch.st.preempted = 0;
3354         }
3355
3356         unsafe_get_user(version, &st->version, out);
3357         if (version & 1)
3358                 version += 1;  /* first time write, random junk */
3359
3360         version += 1;
3361         unsafe_put_user(version, &st->version, out);
3362
3363         smp_wmb();
3364
3365         unsafe_get_user(steal, &st->steal, out);
3366         steal += current->sched_info.run_delay -
3367                 vcpu->arch.st.last_steal;
3368         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3369         unsafe_put_user(steal, &st->steal, out);
3370
3371         version += 1;
3372         unsafe_put_user(version, &st->version, out);
3373
3374  out:
3375         user_access_end();
3376  dirty:
3377         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3378 }
3379
3380 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3381 {
3382         bool pr = false;
3383         u32 msr = msr_info->index;
3384         u64 data = msr_info->data;
3385
3386         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3387                 return kvm_xen_write_hypercall_page(vcpu, data);
3388
3389         switch (msr) {
3390         case MSR_AMD64_NB_CFG:
3391         case MSR_IA32_UCODE_WRITE:
3392         case MSR_VM_HSAVE_PA:
3393         case MSR_AMD64_PATCH_LOADER:
3394         case MSR_AMD64_BU_CFG2:
3395         case MSR_AMD64_DC_CFG:
3396         case MSR_F15H_EX_CFG:
3397                 break;
3398
3399         case MSR_IA32_UCODE_REV:
3400                 if (msr_info->host_initiated)
3401                         vcpu->arch.microcode_version = data;
3402                 break;
3403         case MSR_IA32_ARCH_CAPABILITIES:
3404                 if (!msr_info->host_initiated)
3405                         return 1;
3406                 vcpu->arch.arch_capabilities = data;
3407                 break;
3408         case MSR_IA32_PERF_CAPABILITIES: {
3409                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3410
3411                 if (!msr_info->host_initiated)
3412                         return 1;
3413                 if (kvm_get_msr_feature(&msr_ent))
3414                         return 1;
3415                 if (data & ~msr_ent.data)
3416                         return 1;
3417
3418                 vcpu->arch.perf_capabilities = data;
3419
3420                 return 0;
3421                 }
3422         case MSR_EFER:
3423                 return set_efer(vcpu, msr_info);
3424         case MSR_K7_HWCR:
3425                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3426                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3427                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3428
3429                 /* Handle McStatusWrEn */
3430                 if (data == BIT_ULL(18)) {
3431                         vcpu->arch.msr_hwcr = data;
3432                 } else if (data != 0) {
3433                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3434                                     data);
3435                         return 1;
3436                 }
3437                 break;
3438         case MSR_FAM10H_MMIO_CONF_BASE:
3439                 if (data != 0) {
3440                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3441                                     "0x%llx\n", data);
3442                         return 1;
3443                 }
3444                 break;
3445         case 0x200 ... 0x2ff:
3446                 return kvm_mtrr_set_msr(vcpu, msr, data);
3447         case MSR_IA32_APICBASE:
3448                 return kvm_set_apic_base(vcpu, msr_info);
3449         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3450                 return kvm_x2apic_msr_write(vcpu, msr, data);
3451         case MSR_IA32_TSC_DEADLINE:
3452                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3453                 break;
3454         case MSR_IA32_TSC_ADJUST:
3455                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3456                         if (!msr_info->host_initiated) {
3457                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3458                                 adjust_tsc_offset_guest(vcpu, adj);
3459                                 /* Before back to guest, tsc_timestamp must be adjusted
3460                                  * as well, otherwise guest's percpu pvclock time could jump.
3461                                  */
3462                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3463                         }
3464                         vcpu->arch.ia32_tsc_adjust_msr = data;
3465                 }
3466                 break;
3467         case MSR_IA32_MISC_ENABLE:
3468                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3469                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3470                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3471                                 return 1;
3472                         vcpu->arch.ia32_misc_enable_msr = data;
3473                         kvm_update_cpuid_runtime(vcpu);
3474                 } else {
3475                         vcpu->arch.ia32_misc_enable_msr = data;
3476                 }
3477                 break;
3478         case MSR_IA32_SMBASE:
3479                 if (!msr_info->host_initiated)
3480                         return 1;
3481                 vcpu->arch.smbase = data;
3482                 break;
3483         case MSR_IA32_POWER_CTL:
3484                 vcpu->arch.msr_ia32_power_ctl = data;
3485                 break;
3486         case MSR_IA32_TSC:
3487                 if (msr_info->host_initiated) {
3488                         kvm_synchronize_tsc(vcpu, data);
3489                 } else {
3490                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3491                         adjust_tsc_offset_guest(vcpu, adj);
3492                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3493                 }
3494                 break;
3495         case MSR_IA32_XSS:
3496                 if (!msr_info->host_initiated &&
3497                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3498                         return 1;
3499                 /*
3500                  * KVM supports exposing PT to the guest, but does not support
3501                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3502                  * XSAVES/XRSTORS to save/restore PT MSRs.
3503                  */
3504                 if (data & ~supported_xss)
3505                         return 1;
3506                 vcpu->arch.ia32_xss = data;
3507                 kvm_update_cpuid_runtime(vcpu);
3508                 break;
3509         case MSR_SMI_COUNT:
3510                 if (!msr_info->host_initiated)
3511                         return 1;
3512                 vcpu->arch.smi_count = data;
3513                 break;
3514         case MSR_KVM_WALL_CLOCK_NEW:
3515                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3516                         return 1;
3517
3518                 vcpu->kvm->arch.wall_clock = data;
3519                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3520                 break;
3521         case MSR_KVM_WALL_CLOCK:
3522                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3523                         return 1;
3524
3525                 vcpu->kvm->arch.wall_clock = data;
3526                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3527                 break;
3528         case MSR_KVM_SYSTEM_TIME_NEW:
3529                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3530                         return 1;
3531
3532                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3533                 break;
3534         case MSR_KVM_SYSTEM_TIME:
3535                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3536                         return 1;
3537
3538                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3539                 break;
3540         case MSR_KVM_ASYNC_PF_EN:
3541                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3542                         return 1;
3543
3544                 if (kvm_pv_enable_async_pf(vcpu, data))
3545                         return 1;
3546                 break;
3547         case MSR_KVM_ASYNC_PF_INT:
3548                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3549                         return 1;
3550
3551                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3552                         return 1;
3553                 break;
3554         case MSR_KVM_ASYNC_PF_ACK:
3555                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3556                         return 1;
3557                 if (data & 0x1) {
3558                         vcpu->arch.apf.pageready_pending = false;
3559                         kvm_check_async_pf_completion(vcpu);
3560                 }
3561                 break;
3562         case MSR_KVM_STEAL_TIME:
3563                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3564                         return 1;
3565
3566                 if (unlikely(!sched_info_on()))
3567                         return 1;
3568
3569                 if (data & KVM_STEAL_RESERVED_MASK)
3570                         return 1;
3571
3572                 vcpu->arch.st.msr_val = data;
3573
3574                 if (!(data & KVM_MSR_ENABLED))
3575                         break;
3576
3577                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3578
3579                 break;
3580         case MSR_KVM_PV_EOI_EN:
3581                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3582                         return 1;
3583
3584                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3585                         return 1;
3586                 break;
3587
3588         case MSR_KVM_POLL_CONTROL:
3589                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3590                         return 1;
3591
3592                 /* only enable bit supported */
3593                 if (data & (-1ULL << 1))
3594                         return 1;
3595
3596                 vcpu->arch.msr_kvm_poll_control = data;
3597                 break;
3598
3599         case MSR_IA32_MCG_CTL:
3600         case MSR_IA32_MCG_STATUS:
3601         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3602                 return set_msr_mce(vcpu, msr_info);
3603
3604         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3605         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3606                 pr = true;
3607                 fallthrough;
3608         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3609         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3610                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3611                         return kvm_pmu_set_msr(vcpu, msr_info);
3612
3613                 if (pr || data != 0)
3614                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3615                                     "0x%x data 0x%llx\n", msr, data);
3616                 break;
3617         case MSR_K7_CLK_CTL:
3618                 /*
3619                  * Ignore all writes to this no longer documented MSR.
3620                  * Writes are only relevant for old K7 processors,
3621                  * all pre-dating SVM, but a recommended workaround from
3622                  * AMD for these chips. It is possible to specify the
3623                  * affected processor models on the command line, hence
3624                  * the need to ignore the workaround.
3625                  */
3626                 break;
3627         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3628         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3629         case HV_X64_MSR_SYNDBG_OPTIONS:
3630         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3631         case HV_X64_MSR_CRASH_CTL:
3632         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3633         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3634         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3635         case HV_X64_MSR_TSC_EMULATION_STATUS:
3636                 return kvm_hv_set_msr_common(vcpu, msr, data,
3637                                              msr_info->host_initiated);
3638         case MSR_IA32_BBL_CR_CTL3:
3639                 /* Drop writes to this legacy MSR -- see rdmsr
3640                  * counterpart for further detail.
3641                  */
3642                 if (report_ignored_msrs)
3643                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3644                                 msr, data);
3645                 break;
3646         case MSR_AMD64_OSVW_ID_LENGTH:
3647                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3648                         return 1;
3649                 vcpu->arch.osvw.length = data;
3650                 break;
3651         case MSR_AMD64_OSVW_STATUS:
3652                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3653                         return 1;
3654                 vcpu->arch.osvw.status = data;
3655                 break;
3656         case MSR_PLATFORM_INFO:
3657                 if (!msr_info->host_initiated ||
3658                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3659                      cpuid_fault_enabled(vcpu)))
3660                         return 1;
3661                 vcpu->arch.msr_platform_info = data;
3662                 break;
3663         case MSR_MISC_FEATURES_ENABLES:
3664                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3665                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3666                      !supports_cpuid_fault(vcpu)))
3667                         return 1;
3668                 vcpu->arch.msr_misc_features_enables = data;
3669                 break;
3670         default:
3671                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3672                         return kvm_pmu_set_msr(vcpu, msr_info);
3673                 return KVM_MSR_RET_INVALID;
3674         }
3675         return 0;
3676 }
3677 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3678
3679 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3680 {
3681         u64 data;
3682         u64 mcg_cap = vcpu->arch.mcg_cap;
3683         unsigned bank_num = mcg_cap & 0xff;
3684
3685         switch (msr) {
3686         case MSR_IA32_P5_MC_ADDR:
3687         case MSR_IA32_P5_MC_TYPE:
3688                 data = 0;
3689                 break;
3690         case MSR_IA32_MCG_CAP:
3691                 data = vcpu->arch.mcg_cap;
3692                 break;
3693         case MSR_IA32_MCG_CTL:
3694                 if (!(mcg_cap & MCG_CTL_P) && !host)
3695                         return 1;
3696                 data = vcpu->arch.mcg_ctl;
3697                 break;
3698         case MSR_IA32_MCG_STATUS:
3699                 data = vcpu->arch.mcg_status;
3700                 break;
3701         default:
3702                 if (msr >= MSR_IA32_MC0_CTL &&
3703                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3704                         u32 offset = array_index_nospec(
3705                                 msr - MSR_IA32_MC0_CTL,
3706                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3707
3708                         data = vcpu->arch.mce_banks[offset];
3709                         break;
3710                 }
3711                 return 1;
3712         }
3713         *pdata = data;
3714         return 0;
3715 }
3716
3717 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3718 {
3719         switch (msr_info->index) {
3720         case MSR_IA32_PLATFORM_ID:
3721         case MSR_IA32_EBL_CR_POWERON:
3722         case MSR_IA32_LASTBRANCHFROMIP:
3723         case MSR_IA32_LASTBRANCHTOIP:
3724         case MSR_IA32_LASTINTFROMIP:
3725         case MSR_IA32_LASTINTTOIP:
3726         case MSR_AMD64_SYSCFG:
3727         case MSR_K8_TSEG_ADDR:
3728         case MSR_K8_TSEG_MASK:
3729         case MSR_VM_HSAVE_PA:
3730         case MSR_K8_INT_PENDING_MSG:
3731         case MSR_AMD64_NB_CFG:
3732         case MSR_FAM10H_MMIO_CONF_BASE:
3733         case MSR_AMD64_BU_CFG2:
3734         case MSR_IA32_PERF_CTL:
3735         case MSR_AMD64_DC_CFG:
3736         case MSR_F15H_EX_CFG:
3737         /*
3738          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3739          * limit) MSRs. Just return 0, as we do not want to expose the host
3740          * data here. Do not conditionalize this on CPUID, as KVM does not do
3741          * so for existing CPU-specific MSRs.
3742          */
3743         case MSR_RAPL_POWER_UNIT:
3744         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3745         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3746         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3747         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3748                 msr_info->data = 0;
3749                 break;
3750         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3751                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3752                         return kvm_pmu_get_msr(vcpu, msr_info);
3753                 if (!msr_info->host_initiated)
3754                         return 1;
3755                 msr_info->data = 0;
3756                 break;
3757         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3758         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3759         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3760         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3761                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3762                         return kvm_pmu_get_msr(vcpu, msr_info);
3763                 msr_info->data = 0;
3764                 break;
3765         case MSR_IA32_UCODE_REV:
3766                 msr_info->data = vcpu->arch.microcode_version;
3767                 break;
3768         case MSR_IA32_ARCH_CAPABILITIES:
3769                 if (!msr_info->host_initiated &&
3770                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3771                         return 1;
3772                 msr_info->data = vcpu->arch.arch_capabilities;
3773                 break;
3774         case MSR_IA32_PERF_CAPABILITIES:
3775                 if (!msr_info->host_initiated &&
3776                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3777                         return 1;
3778                 msr_info->data = vcpu->arch.perf_capabilities;
3779                 break;
3780         case MSR_IA32_POWER_CTL:
3781                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3782                 break;
3783         case MSR_IA32_TSC: {
3784                 /*
3785                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3786                  * even when not intercepted. AMD manual doesn't explicitly
3787                  * state this but appears to behave the same.
3788                  *
3789                  * On userspace reads and writes, however, we unconditionally
3790                  * return L1's TSC value to ensure backwards-compatible
3791                  * behavior for migration.
3792                  */
3793                 u64 offset, ratio;
3794
3795                 if (msr_info->host_initiated) {
3796                         offset = vcpu->arch.l1_tsc_offset;
3797                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3798                 } else {
3799                         offset = vcpu->arch.tsc_offset;
3800                         ratio = vcpu->arch.tsc_scaling_ratio;
3801                 }
3802
3803                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3804                 break;
3805         }
3806         case MSR_MTRRcap:
3807         case 0x200 ... 0x2ff:
3808                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3809         case 0xcd: /* fsb frequency */
3810                 msr_info->data = 3;
3811                 break;
3812                 /*
3813                  * MSR_EBC_FREQUENCY_ID
3814                  * Conservative value valid for even the basic CPU models.
3815                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3816                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3817                  * and 266MHz for model 3, or 4. Set Core Clock
3818                  * Frequency to System Bus Frequency Ratio to 1 (bits
3819                  * 31:24) even though these are only valid for CPU
3820                  * models > 2, however guests may end up dividing or
3821                  * multiplying by zero otherwise.
3822                  */
3823         case MSR_EBC_FREQUENCY_ID:
3824                 msr_info->data = 1 << 24;
3825                 break;
3826         case MSR_IA32_APICBASE:
3827                 msr_info->data = kvm_get_apic_base(vcpu);
3828                 break;
3829         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3830                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3831         case MSR_IA32_TSC_DEADLINE:
3832                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3833                 break;
3834         case MSR_IA32_TSC_ADJUST:
3835                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3836                 break;
3837         case MSR_IA32_MISC_ENABLE:
3838                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3839                 break;
3840         case MSR_IA32_SMBASE:
3841                 if (!msr_info->host_initiated)
3842                         return 1;
3843                 msr_info->data = vcpu->arch.smbase;
3844                 break;
3845         case MSR_SMI_COUNT:
3846                 msr_info->data = vcpu->arch.smi_count;
3847                 break;
3848         case MSR_IA32_PERF_STATUS:
3849                 /* TSC increment by tick */
3850                 msr_info->data = 1000ULL;
3851                 /* CPU multiplier */
3852                 msr_info->data |= (((uint64_t)4ULL) << 40);
3853                 break;
3854         case MSR_EFER:
3855                 msr_info->data = vcpu->arch.efer;
3856                 break;
3857         case MSR_KVM_WALL_CLOCK:
3858                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3859                         return 1;
3860
3861                 msr_info->data = vcpu->kvm->arch.wall_clock;
3862                 break;
3863         case MSR_KVM_WALL_CLOCK_NEW:
3864                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3865                         return 1;
3866
3867                 msr_info->data = vcpu->kvm->arch.wall_clock;
3868                 break;
3869         case MSR_KVM_SYSTEM_TIME:
3870                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3871                         return 1;
3872
3873                 msr_info->data = vcpu->arch.time;
3874                 break;
3875         case MSR_KVM_SYSTEM_TIME_NEW:
3876                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3877                         return 1;
3878
3879                 msr_info->data = vcpu->arch.time;
3880                 break;
3881         case MSR_KVM_ASYNC_PF_EN:
3882                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3883                         return 1;
3884
3885                 msr_info->data = vcpu->arch.apf.msr_en_val;
3886                 break;
3887         case MSR_KVM_ASYNC_PF_INT:
3888                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3889                         return 1;
3890
3891                 msr_info->data = vcpu->arch.apf.msr_int_val;
3892                 break;
3893         case MSR_KVM_ASYNC_PF_ACK:
3894                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3895                         return 1;
3896
3897                 msr_info->data = 0;
3898                 break;
3899         case MSR_KVM_STEAL_TIME:
3900                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3901                         return 1;
3902
3903                 msr_info->data = vcpu->arch.st.msr_val;
3904                 break;
3905         case MSR_KVM_PV_EOI_EN:
3906                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3907                         return 1;
3908
3909                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3910                 break;
3911         case MSR_KVM_POLL_CONTROL:
3912                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3913                         return 1;
3914
3915                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3916                 break;
3917         case MSR_IA32_P5_MC_ADDR:
3918         case MSR_IA32_P5_MC_TYPE:
3919         case MSR_IA32_MCG_CAP:
3920         case MSR_IA32_MCG_CTL:
3921         case MSR_IA32_MCG_STATUS:
3922         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3923                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3924                                    msr_info->host_initiated);
3925         case MSR_IA32_XSS:
3926                 if (!msr_info->host_initiated &&
3927                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3928                         return 1;
3929                 msr_info->data = vcpu->arch.ia32_xss;
3930                 break;
3931         case MSR_K7_CLK_CTL:
3932                 /*
3933                  * Provide expected ramp-up count for K7. All other
3934                  * are set to zero, indicating minimum divisors for
3935                  * every field.
3936                  *
3937                  * This prevents guest kernels on AMD host with CPU
3938                  * type 6, model 8 and higher from exploding due to
3939                  * the rdmsr failing.
3940                  */
3941                 msr_info->data = 0x20000000;
3942                 break;
3943         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3944         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3945         case HV_X64_MSR_SYNDBG_OPTIONS:
3946         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3947         case HV_X64_MSR_CRASH_CTL:
3948         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3949         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3950         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3951         case HV_X64_MSR_TSC_EMULATION_STATUS:
3952                 return kvm_hv_get_msr_common(vcpu,
3953                                              msr_info->index, &msr_info->data,
3954                                              msr_info->host_initiated);
3955         case MSR_IA32_BBL_CR_CTL3:
3956                 /* This legacy MSR exists but isn't fully documented in current
3957                  * silicon.  It is however accessed by winxp in very narrow
3958                  * scenarios where it sets bit #19, itself documented as
3959                  * a "reserved" bit.  Best effort attempt to source coherent
3960                  * read data here should the balance of the register be
3961                  * interpreted by the guest:
3962                  *
3963                  * L2 cache control register 3: 64GB range, 256KB size,
3964                  * enabled, latency 0x1, configured
3965                  */
3966                 msr_info->data = 0xbe702111;
3967                 break;
3968         case MSR_AMD64_OSVW_ID_LENGTH:
3969                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3970                         return 1;
3971                 msr_info->data = vcpu->arch.osvw.length;
3972                 break;
3973         case MSR_AMD64_OSVW_STATUS:
3974                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3975                         return 1;
3976                 msr_info->data = vcpu->arch.osvw.status;
3977                 break;
3978         case MSR_PLATFORM_INFO:
3979                 if (!msr_info->host_initiated &&
3980                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3981                         return 1;
3982                 msr_info->data = vcpu->arch.msr_platform_info;
3983                 break;
3984         case MSR_MISC_FEATURES_ENABLES:
3985                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3986                 break;
3987         case MSR_K7_HWCR:
3988                 msr_info->data = vcpu->arch.msr_hwcr;
3989                 break;
3990         default:
3991                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3992                         return kvm_pmu_get_msr(vcpu, msr_info);
3993                 return KVM_MSR_RET_INVALID;
3994         }
3995         return 0;
3996 }
3997 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3998
3999 /*
4000  * Read or write a bunch of msrs. All parameters are kernel addresses.
4001  *
4002  * @return number of msrs set successfully.
4003  */
4004 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4005                     struct kvm_msr_entry *entries,
4006                     int (*do_msr)(struct kvm_vcpu *vcpu,
4007                                   unsigned index, u64 *data))
4008 {
4009         int i;
4010
4011         for (i = 0; i < msrs->nmsrs; ++i)
4012                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4013                         break;
4014
4015         return i;
4016 }
4017
4018 /*
4019  * Read or write a bunch of msrs. Parameters are user addresses.
4020  *
4021  * @return number of msrs set successfully.
4022  */
4023 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4024                   int (*do_msr)(struct kvm_vcpu *vcpu,
4025                                 unsigned index, u64 *data),
4026                   int writeback)
4027 {
4028         struct kvm_msrs msrs;
4029         struct kvm_msr_entry *entries;
4030         int r, n;
4031         unsigned size;
4032
4033         r = -EFAULT;
4034         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4035                 goto out;
4036
4037         r = -E2BIG;
4038         if (msrs.nmsrs >= MAX_IO_MSRS)
4039                 goto out;
4040
4041         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4042         entries = memdup_user(user_msrs->entries, size);
4043         if (IS_ERR(entries)) {
4044                 r = PTR_ERR(entries);
4045                 goto out;
4046         }
4047
4048         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4049         if (r < 0)
4050                 goto out_free;
4051
4052         r = -EFAULT;
4053         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4054                 goto out_free;
4055
4056         r = n;
4057
4058 out_free:
4059         kfree(entries);
4060 out:
4061         return r;
4062 }
4063
4064 static inline bool kvm_can_mwait_in_guest(void)
4065 {
4066         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4067                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4068                 boot_cpu_has(X86_FEATURE_ARAT);
4069 }
4070
4071 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4072                                             struct kvm_cpuid2 __user *cpuid_arg)
4073 {
4074         struct kvm_cpuid2 cpuid;
4075         int r;
4076
4077         r = -EFAULT;
4078         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4079                 return r;
4080
4081         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4082         if (r)
4083                 return r;
4084
4085         r = -EFAULT;
4086         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4087                 return r;
4088
4089         return 0;
4090 }
4091
4092 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4093 {
4094         int r = 0;
4095
4096         switch (ext) {
4097         case KVM_CAP_IRQCHIP:
4098         case KVM_CAP_HLT:
4099         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4100         case KVM_CAP_SET_TSS_ADDR:
4101         case KVM_CAP_EXT_CPUID:
4102         case KVM_CAP_EXT_EMUL_CPUID:
4103         case KVM_CAP_CLOCKSOURCE:
4104         case KVM_CAP_PIT:
4105         case KVM_CAP_NOP_IO_DELAY:
4106         case KVM_CAP_MP_STATE:
4107         case KVM_CAP_SYNC_MMU:
4108         case KVM_CAP_USER_NMI:
4109         case KVM_CAP_REINJECT_CONTROL:
4110         case KVM_CAP_IRQ_INJECT_STATUS:
4111         case KVM_CAP_IOEVENTFD:
4112         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4113         case KVM_CAP_PIT2:
4114         case KVM_CAP_PIT_STATE2:
4115         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4116         case KVM_CAP_VCPU_EVENTS:
4117         case KVM_CAP_HYPERV:
4118         case KVM_CAP_HYPERV_VAPIC:
4119         case KVM_CAP_HYPERV_SPIN:
4120         case KVM_CAP_HYPERV_SYNIC:
4121         case KVM_CAP_HYPERV_SYNIC2:
4122         case KVM_CAP_HYPERV_VP_INDEX:
4123         case KVM_CAP_HYPERV_EVENTFD:
4124         case KVM_CAP_HYPERV_TLBFLUSH:
4125         case KVM_CAP_HYPERV_SEND_IPI:
4126         case KVM_CAP_HYPERV_CPUID:
4127         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4128         case KVM_CAP_SYS_HYPERV_CPUID:
4129         case KVM_CAP_PCI_SEGMENT:
4130         case KVM_CAP_DEBUGREGS:
4131         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4132         case KVM_CAP_XSAVE:
4133         case KVM_CAP_ASYNC_PF:
4134         case KVM_CAP_ASYNC_PF_INT:
4135         case KVM_CAP_GET_TSC_KHZ:
4136         case KVM_CAP_KVMCLOCK_CTRL:
4137         case KVM_CAP_READONLY_MEM:
4138         case KVM_CAP_HYPERV_TIME:
4139         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4140         case KVM_CAP_TSC_DEADLINE_TIMER:
4141         case KVM_CAP_DISABLE_QUIRKS:
4142         case KVM_CAP_SET_BOOT_CPU_ID:
4143         case KVM_CAP_SPLIT_IRQCHIP:
4144         case KVM_CAP_IMMEDIATE_EXIT:
4145         case KVM_CAP_PMU_EVENT_FILTER:
4146         case KVM_CAP_GET_MSR_FEATURES:
4147         case KVM_CAP_MSR_PLATFORM_INFO:
4148         case KVM_CAP_EXCEPTION_PAYLOAD:
4149         case KVM_CAP_SET_GUEST_DEBUG:
4150         case KVM_CAP_LAST_CPU:
4151         case KVM_CAP_X86_USER_SPACE_MSR:
4152         case KVM_CAP_X86_MSR_FILTER:
4153         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4154 #ifdef CONFIG_X86_SGX_KVM
4155         case KVM_CAP_SGX_ATTRIBUTE:
4156 #endif
4157         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4158         case KVM_CAP_SREGS2:
4159         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4160                 r = 1;
4161                 break;
4162         case KVM_CAP_EXIT_HYPERCALL:
4163                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4164                 break;
4165         case KVM_CAP_SET_GUEST_DEBUG2:
4166                 return KVM_GUESTDBG_VALID_MASK;
4167 #ifdef CONFIG_KVM_XEN
4168         case KVM_CAP_XEN_HVM:
4169                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4170                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4171                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4172                 if (sched_info_on())
4173                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4174                 break;
4175 #endif
4176         case KVM_CAP_SYNC_REGS:
4177                 r = KVM_SYNC_X86_VALID_FIELDS;
4178                 break;
4179         case KVM_CAP_ADJUST_CLOCK:
4180                 r = KVM_CLOCK_TSC_STABLE;
4181                 break;
4182         case KVM_CAP_X86_DISABLE_EXITS:
4183                 r = KVM_X86_DISABLE_EXITS_PAUSE;
4184
4185                 if (!mitigate_smt_rsb) {
4186                         r |= KVM_X86_DISABLE_EXITS_HLT |
4187                              KVM_X86_DISABLE_EXITS_CSTATE;
4188
4189                         if (kvm_can_mwait_in_guest())
4190                                 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4191                 }
4192                 break;
4193         case KVM_CAP_X86_SMM:
4194                 /* SMBASE is usually relocated above 1M on modern chipsets,
4195                  * and SMM handlers might indeed rely on 4G segment limits,
4196                  * so do not report SMM to be available if real mode is
4197                  * emulated via vm86 mode.  Still, do not go to great lengths
4198                  * to avoid userspace's usage of the feature, because it is a
4199                  * fringe case that is not enabled except via specific settings
4200                  * of the module parameters.
4201                  */
4202                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4203                 break;
4204         case KVM_CAP_VAPIC:
4205                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4206                 break;
4207         case KVM_CAP_NR_VCPUS:
4208                 r = KVM_SOFT_MAX_VCPUS;
4209                 break;
4210         case KVM_CAP_MAX_VCPUS:
4211                 r = KVM_MAX_VCPUS;
4212                 break;
4213         case KVM_CAP_MAX_VCPU_ID:
4214                 r = KVM_MAX_VCPU_ID;
4215                 break;
4216         case KVM_CAP_PV_MMU:    /* obsolete */
4217                 r = 0;
4218                 break;
4219         case KVM_CAP_MCE:
4220                 r = KVM_MAX_MCE_BANKS;
4221                 break;
4222         case KVM_CAP_XCRS:
4223                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4224                 break;
4225         case KVM_CAP_TSC_CONTROL:
4226                 r = kvm_has_tsc_control;
4227                 break;
4228         case KVM_CAP_X2APIC_API:
4229                 r = KVM_X2APIC_API_VALID_FLAGS;
4230                 break;
4231         case KVM_CAP_NESTED_STATE:
4232                 r = kvm_x86_ops.nested_ops->get_state ?
4233                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4234                 break;
4235         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4236                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4237                 break;
4238         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4239                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4240                 break;
4241         case KVM_CAP_SMALLER_MAXPHYADDR:
4242                 r = (int) allow_smaller_maxphyaddr;
4243                 break;
4244         case KVM_CAP_STEAL_TIME:
4245                 r = sched_info_on();
4246                 break;
4247         case KVM_CAP_X86_BUS_LOCK_EXIT:
4248                 if (kvm_has_bus_lock_exit)
4249                         r = KVM_BUS_LOCK_DETECTION_OFF |
4250                             KVM_BUS_LOCK_DETECTION_EXIT;
4251                 else
4252                         r = 0;
4253                 break;
4254         default:
4255                 break;
4256         }
4257         return r;
4258
4259 }
4260
4261 long kvm_arch_dev_ioctl(struct file *filp,
4262                         unsigned int ioctl, unsigned long arg)
4263 {
4264         void __user *argp = (void __user *)arg;
4265         long r;
4266
4267         switch (ioctl) {
4268         case KVM_GET_MSR_INDEX_LIST: {
4269                 struct kvm_msr_list __user *user_msr_list = argp;
4270                 struct kvm_msr_list msr_list;
4271                 unsigned n;
4272
4273                 r = -EFAULT;
4274                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4275                         goto out;
4276                 n = msr_list.nmsrs;
4277                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4278                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4279                         goto out;
4280                 r = -E2BIG;
4281                 if (n < msr_list.nmsrs)
4282                         goto out;
4283                 r = -EFAULT;
4284                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4285                                  num_msrs_to_save * sizeof(u32)))
4286                         goto out;
4287                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4288                                  &emulated_msrs,
4289                                  num_emulated_msrs * sizeof(u32)))
4290                         goto out;
4291                 r = 0;
4292                 break;
4293         }
4294         case KVM_GET_SUPPORTED_CPUID:
4295         case KVM_GET_EMULATED_CPUID: {
4296                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4297                 struct kvm_cpuid2 cpuid;
4298
4299                 r = -EFAULT;
4300                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4301                         goto out;
4302
4303                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4304                                             ioctl);
4305                 if (r)
4306                         goto out;
4307
4308                 r = -EFAULT;
4309                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4310                         goto out;
4311                 r = 0;
4312                 break;
4313         }
4314         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4315                 r = -EFAULT;
4316                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4317                                  sizeof(kvm_mce_cap_supported)))
4318                         goto out;
4319                 r = 0;
4320                 break;
4321         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4322                 struct kvm_msr_list __user *user_msr_list = argp;
4323                 struct kvm_msr_list msr_list;
4324                 unsigned int n;
4325
4326                 r = -EFAULT;
4327                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4328                         goto out;
4329                 n = msr_list.nmsrs;
4330                 msr_list.nmsrs = num_msr_based_features;
4331                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4332                         goto out;
4333                 r = -E2BIG;
4334                 if (n < msr_list.nmsrs)
4335                         goto out;
4336                 r = -EFAULT;
4337                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4338                                  num_msr_based_features * sizeof(u32)))
4339                         goto out;
4340                 r = 0;
4341                 break;
4342         }
4343         case KVM_GET_MSRS:
4344                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4345                 break;
4346         case KVM_GET_SUPPORTED_HV_CPUID:
4347                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4348                 break;
4349         default:
4350                 r = -EINVAL;
4351                 break;
4352         }
4353 out:
4354         return r;
4355 }
4356
4357 static void wbinvd_ipi(void *garbage)
4358 {
4359         wbinvd();
4360 }
4361
4362 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4363 {
4364         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4365 }
4366
4367 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4368 {
4369         /* Address WBINVD may be executed by guest */
4370         if (need_emulate_wbinvd(vcpu)) {
4371                 if (static_call(kvm_x86_has_wbinvd_exit)())
4372                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4373                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4374                         smp_call_function_single(vcpu->cpu,
4375                                         wbinvd_ipi, NULL, 1);
4376         }
4377
4378         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4379
4380         /* Save host pkru register if supported */
4381         vcpu->arch.host_pkru = read_pkru();
4382
4383         /* Apply any externally detected TSC adjustments (due to suspend) */
4384         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4385                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4386                 vcpu->arch.tsc_offset_adjustment = 0;
4387                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4388         }
4389
4390         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4391                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4392                                 rdtsc() - vcpu->arch.last_host_tsc;
4393                 if (tsc_delta < 0)
4394                         mark_tsc_unstable("KVM discovered backwards TSC");
4395
4396                 if (kvm_check_tsc_unstable()) {
4397                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4398                                                 vcpu->arch.last_guest_tsc);
4399                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4400                         vcpu->arch.tsc_catchup = 1;
4401                 }
4402
4403                 if (kvm_lapic_hv_timer_in_use(vcpu))
4404                         kvm_lapic_restart_hv_timer(vcpu);
4405
4406                 /*
4407                  * On a host with synchronized TSC, there is no need to update
4408                  * kvmclock on vcpu->cpu migration
4409                  */
4410                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4411                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4412                 if (vcpu->cpu != cpu)
4413                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4414                 vcpu->cpu = cpu;
4415         }
4416
4417         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4418 }
4419
4420 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4421 {
4422         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4423         struct kvm_steal_time __user *st;
4424         struct kvm_memslots *slots;
4425         static const u8 preempted = KVM_VCPU_PREEMPTED;
4426         gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
4427
4428         /*
4429          * The vCPU can be marked preempted if and only if the VM-Exit was on
4430          * an instruction boundary and will not trigger guest emulation of any
4431          * kind (see vcpu_run).  Vendor specific code controls (conservatively)
4432          * when this is true, for example allowing the vCPU to be marked
4433          * preempted if and only if the VM-Exit was due to a host interrupt.
4434          */
4435         if (!vcpu->arch.at_instruction_boundary) {
4436                 vcpu->stat.preemption_other++;
4437                 return;
4438         }
4439
4440         vcpu->stat.preemption_reported++;
4441         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4442                 return;
4443
4444         if (vcpu->arch.st.preempted)
4445                 return;
4446
4447         /* This happens on process exit */
4448         if (unlikely(current->mm != vcpu->kvm->mm))
4449                 return;
4450
4451         slots = kvm_memslots(vcpu->kvm);
4452
4453         if (unlikely(slots->generation != ghc->generation ||
4454                      gpa != ghc->gpa ||
4455                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4456                 return;
4457
4458         st = (struct kvm_steal_time __user *)ghc->hva;
4459         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4460
4461         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4462                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4463
4464         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4465 }
4466
4467 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4468 {
4469         int idx;
4470
4471         if (vcpu->preempted) {
4472                 if (!vcpu->arch.guest_state_protected)
4473                         vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4474
4475                 /*
4476                  * Take the srcu lock as memslots will be accessed to check the gfn
4477                  * cache generation against the memslots generation.
4478                  */
4479                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4480                 if (kvm_xen_msr_enabled(vcpu->kvm))
4481                         kvm_xen_runstate_set_preempted(vcpu);
4482                 else
4483                         kvm_steal_time_set_preempted(vcpu);
4484                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4485         }
4486
4487         static_call(kvm_x86_vcpu_put)(vcpu);
4488         vcpu->arch.last_host_tsc = rdtsc();
4489 }
4490
4491 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4492                                     struct kvm_lapic_state *s)
4493 {
4494         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4495
4496         return kvm_apic_get_state(vcpu, s);
4497 }
4498
4499 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4500                                     struct kvm_lapic_state *s)
4501 {
4502         int r;
4503
4504         r = kvm_apic_set_state(vcpu, s);
4505         if (r)
4506                 return r;
4507         update_cr8_intercept(vcpu);
4508
4509         return 0;
4510 }
4511
4512 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4513 {
4514         /*
4515          * We can accept userspace's request for interrupt injection
4516          * as long as we have a place to store the interrupt number.
4517          * The actual injection will happen when the CPU is able to
4518          * deliver the interrupt.
4519          */
4520         if (kvm_cpu_has_extint(vcpu))
4521                 return false;
4522
4523         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4524         return (!lapic_in_kernel(vcpu) ||
4525                 kvm_apic_accept_pic_intr(vcpu));
4526 }
4527
4528 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4529 {
4530         /*
4531          * Do not cause an interrupt window exit if an exception
4532          * is pending or an event needs reinjection; userspace
4533          * might want to inject the interrupt manually using KVM_SET_REGS
4534          * or KVM_SET_SREGS.  For that to work, we must be at an
4535          * instruction boundary and with no events half-injected.
4536          */
4537         return (kvm_arch_interrupt_allowed(vcpu) &&
4538                 kvm_cpu_accept_dm_intr(vcpu) &&
4539                 !kvm_event_needs_reinjection(vcpu) &&
4540                 !vcpu->arch.exception.pending);
4541 }
4542
4543 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4544                                     struct kvm_interrupt *irq)
4545 {
4546         if (irq->irq >= KVM_NR_INTERRUPTS)
4547                 return -EINVAL;
4548
4549         if (!irqchip_in_kernel(vcpu->kvm)) {
4550                 kvm_queue_interrupt(vcpu, irq->irq, false);
4551                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4552                 return 0;
4553         }
4554
4555         /*
4556          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4557          * fail for in-kernel 8259.
4558          */
4559         if (pic_in_kernel(vcpu->kvm))
4560                 return -ENXIO;
4561
4562         if (vcpu->arch.pending_external_vector != -1)
4563                 return -EEXIST;
4564
4565         vcpu->arch.pending_external_vector = irq->irq;
4566         kvm_make_request(KVM_REQ_EVENT, vcpu);
4567         return 0;
4568 }
4569
4570 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4571 {
4572         kvm_inject_nmi(vcpu);
4573
4574         return 0;
4575 }
4576
4577 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4578 {
4579         kvm_make_request(KVM_REQ_SMI, vcpu);
4580
4581         return 0;
4582 }
4583
4584 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4585                                            struct kvm_tpr_access_ctl *tac)
4586 {
4587         if (tac->flags)
4588                 return -EINVAL;
4589         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4590         return 0;
4591 }
4592
4593 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4594                                         u64 mcg_cap)
4595 {
4596         int r;
4597         unsigned bank_num = mcg_cap & 0xff, bank;
4598
4599         r = -EINVAL;
4600         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4601                 goto out;
4602         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4603                 goto out;
4604         r = 0;
4605         vcpu->arch.mcg_cap = mcg_cap;
4606         /* Init IA32_MCG_CTL to all 1s */
4607         if (mcg_cap & MCG_CTL_P)
4608                 vcpu->arch.mcg_ctl = ~(u64)0;
4609         /* Init IA32_MCi_CTL to all 1s */
4610         for (bank = 0; bank < bank_num; bank++)
4611                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4612
4613         static_call(kvm_x86_setup_mce)(vcpu);
4614 out:
4615         return r;
4616 }
4617
4618 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4619                                       struct kvm_x86_mce *mce)
4620 {
4621         u64 mcg_cap = vcpu->arch.mcg_cap;
4622         unsigned bank_num = mcg_cap & 0xff;
4623         u64 *banks = vcpu->arch.mce_banks;
4624
4625         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4626                 return -EINVAL;
4627         /*
4628          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4629          * reporting is disabled
4630          */
4631         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4632             vcpu->arch.mcg_ctl != ~(u64)0)
4633                 return 0;
4634         banks += 4 * mce->bank;
4635         /*
4636          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4637          * reporting is disabled for the bank
4638          */
4639         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4640                 return 0;
4641         if (mce->status & MCI_STATUS_UC) {
4642                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4643                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4644                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4645                         return 0;
4646                 }
4647                 if (banks[1] & MCI_STATUS_VAL)
4648                         mce->status |= MCI_STATUS_OVER;
4649                 banks[2] = mce->addr;
4650                 banks[3] = mce->misc;
4651                 vcpu->arch.mcg_status = mce->mcg_status;
4652                 banks[1] = mce->status;
4653                 kvm_queue_exception(vcpu, MC_VECTOR);
4654         } else if (!(banks[1] & MCI_STATUS_VAL)
4655                    || !(banks[1] & MCI_STATUS_UC)) {
4656                 if (banks[1] & MCI_STATUS_VAL)
4657                         mce->status |= MCI_STATUS_OVER;
4658                 banks[2] = mce->addr;
4659                 banks[3] = mce->misc;
4660                 banks[1] = mce->status;
4661         } else
4662                 banks[1] |= MCI_STATUS_OVER;
4663         return 0;
4664 }
4665
4666 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4667                                                struct kvm_vcpu_events *events)
4668 {
4669         process_nmi(vcpu);
4670
4671         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4672                 process_smi(vcpu);
4673
4674         /*
4675          * In guest mode, payload delivery should be deferred,
4676          * so that the L1 hypervisor can intercept #PF before
4677          * CR2 is modified (or intercept #DB before DR6 is
4678          * modified under nVMX). Unless the per-VM capability,
4679          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4680          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4681          * opportunistically defer the exception payload, deliver it if the
4682          * capability hasn't been requested before processing a
4683          * KVM_GET_VCPU_EVENTS.
4684          */
4685         if (!vcpu->kvm->arch.exception_payload_enabled &&
4686             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4687                 kvm_deliver_exception_payload(vcpu);
4688
4689         /*
4690          * The API doesn't provide the instruction length for software
4691          * exceptions, so don't report them. As long as the guest RIP
4692          * isn't advanced, we should expect to encounter the exception
4693          * again.
4694          */
4695         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4696                 events->exception.injected = 0;
4697                 events->exception.pending = 0;
4698         } else {
4699                 events->exception.injected = vcpu->arch.exception.injected;
4700                 events->exception.pending = vcpu->arch.exception.pending;
4701                 /*
4702                  * For ABI compatibility, deliberately conflate
4703                  * pending and injected exceptions when
4704                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4705                  */
4706                 if (!vcpu->kvm->arch.exception_payload_enabled)
4707                         events->exception.injected |=
4708                                 vcpu->arch.exception.pending;
4709         }
4710         events->exception.nr = vcpu->arch.exception.nr;
4711         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4712         events->exception.error_code = vcpu->arch.exception.error_code;
4713         events->exception_has_payload = vcpu->arch.exception.has_payload;
4714         events->exception_payload = vcpu->arch.exception.payload;
4715
4716         events->interrupt.injected =
4717                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4718         events->interrupt.nr = vcpu->arch.interrupt.nr;
4719         events->interrupt.soft = 0;
4720         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4721
4722         events->nmi.injected = vcpu->arch.nmi_injected;
4723         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4724         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4725         events->nmi.pad = 0;
4726
4727         events->sipi_vector = 0; /* never valid when reporting to user space */
4728
4729         events->smi.smm = is_smm(vcpu);
4730         events->smi.pending = vcpu->arch.smi_pending;
4731         events->smi.smm_inside_nmi =
4732                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4733         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4734
4735         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4736                          | KVM_VCPUEVENT_VALID_SHADOW
4737                          | KVM_VCPUEVENT_VALID_SMM);
4738         if (vcpu->kvm->arch.exception_payload_enabled)
4739                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4740
4741         memset(&events->reserved, 0, sizeof(events->reserved));
4742 }
4743
4744 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4745
4746 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4747                                               struct kvm_vcpu_events *events)
4748 {
4749         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4750                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4751                               | KVM_VCPUEVENT_VALID_SHADOW
4752                               | KVM_VCPUEVENT_VALID_SMM
4753                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4754                 return -EINVAL;
4755
4756         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4757                 if (!vcpu->kvm->arch.exception_payload_enabled)
4758                         return -EINVAL;
4759                 if (events->exception.pending)
4760                         events->exception.injected = 0;
4761                 else
4762                         events->exception_has_payload = 0;
4763         } else {
4764                 events->exception.pending = 0;
4765                 events->exception_has_payload = 0;
4766         }
4767
4768         if ((events->exception.injected || events->exception.pending) &&
4769             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4770                 return -EINVAL;
4771
4772         /* INITs are latched while in SMM */
4773         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4774             (events->smi.smm || events->smi.pending) &&
4775             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4776                 return -EINVAL;
4777
4778         process_nmi(vcpu);
4779         vcpu->arch.exception.injected = events->exception.injected;
4780         vcpu->arch.exception.pending = events->exception.pending;
4781         vcpu->arch.exception.nr = events->exception.nr;
4782         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4783         vcpu->arch.exception.error_code = events->exception.error_code;
4784         vcpu->arch.exception.has_payload = events->exception_has_payload;
4785         vcpu->arch.exception.payload = events->exception_payload;
4786
4787         vcpu->arch.interrupt.injected = events->interrupt.injected;
4788         vcpu->arch.interrupt.nr = events->interrupt.nr;
4789         vcpu->arch.interrupt.soft = events->interrupt.soft;
4790         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4791                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4792                                                 events->interrupt.shadow);
4793
4794         vcpu->arch.nmi_injected = events->nmi.injected;
4795         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4796                 vcpu->arch.nmi_pending = events->nmi.pending;
4797         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4798
4799         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4800             lapic_in_kernel(vcpu))
4801                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4802
4803         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4804                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4805                         kvm_leave_nested(vcpu);
4806                         kvm_smm_changed(vcpu, events->smi.smm);
4807                 }
4808
4809                 vcpu->arch.smi_pending = events->smi.pending;
4810
4811                 if (events->smi.smm) {
4812                         if (events->smi.smm_inside_nmi)
4813                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4814                         else
4815                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4816                 }
4817
4818                 if (lapic_in_kernel(vcpu)) {
4819                         if (events->smi.latched_init)
4820                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4821                         else
4822                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4823                 }
4824         }
4825
4826         kvm_make_request(KVM_REQ_EVENT, vcpu);
4827
4828         return 0;
4829 }
4830
4831 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4832                                              struct kvm_debugregs *dbgregs)
4833 {
4834         unsigned long val;
4835
4836         memset(dbgregs, 0, sizeof(*dbgregs));
4837         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4838         kvm_get_dr(vcpu, 6, &val);
4839         dbgregs->dr6 = val;
4840         dbgregs->dr7 = vcpu->arch.dr7;
4841 }
4842
4843 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4844                                             struct kvm_debugregs *dbgregs)
4845 {
4846         if (dbgregs->flags)
4847                 return -EINVAL;
4848
4849         if (!kvm_dr6_valid(dbgregs->dr6))
4850                 return -EINVAL;
4851         if (!kvm_dr7_valid(dbgregs->dr7))
4852                 return -EINVAL;
4853
4854         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4855         kvm_update_dr0123(vcpu);
4856         vcpu->arch.dr6 = dbgregs->dr6;
4857         vcpu->arch.dr7 = dbgregs->dr7;
4858         kvm_update_dr7(vcpu);
4859
4860         return 0;
4861 }
4862
4863 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4864
4865 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4866 {
4867         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4868         u64 xstate_bv = xsave->header.xfeatures;
4869         u64 valid;
4870
4871         /*
4872          * Copy legacy XSAVE area, to avoid complications with CPUID
4873          * leaves 0 and 1 in the loop below.
4874          */
4875         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4876
4877         /* Set XSTATE_BV */
4878         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4879         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4880
4881         /*
4882          * Copy each region from the possibly compacted offset to the
4883          * non-compacted offset.
4884          */
4885         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4886         while (valid) {
4887                 u32 size, offset, ecx, edx;
4888                 u64 xfeature_mask = valid & -valid;
4889                 int xfeature_nr = fls64(xfeature_mask) - 1;
4890                 void *src;
4891
4892                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4893                             &size, &offset, &ecx, &edx);
4894
4895                 if (xfeature_nr == XFEATURE_PKRU) {
4896                         memcpy(dest + offset, &vcpu->arch.pkru,
4897                                sizeof(vcpu->arch.pkru));
4898                 } else {
4899                         src = get_xsave_addr(xsave, xfeature_nr);
4900                         if (src)
4901                                 memcpy(dest + offset, src, size);
4902                 }
4903
4904                 valid -= xfeature_mask;
4905         }
4906 }
4907
4908 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4909 {
4910         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4911         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4912         u64 valid;
4913
4914         /*
4915          * Copy legacy XSAVE area, to avoid complications with CPUID
4916          * leaves 0 and 1 in the loop below.
4917          */
4918         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4919
4920         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4921         xsave->header.xfeatures = xstate_bv;
4922         if (boot_cpu_has(X86_FEATURE_XSAVES))
4923                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4924
4925         /*
4926          * Copy each region from the non-compacted offset to the
4927          * possibly compacted offset.
4928          */
4929         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4930         while (valid) {
4931                 u32 size, offset, ecx, edx;
4932                 u64 xfeature_mask = valid & -valid;
4933                 int xfeature_nr = fls64(xfeature_mask) - 1;
4934
4935                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4936                             &size, &offset, &ecx, &edx);
4937
4938                 if (xfeature_nr == XFEATURE_PKRU) {
4939                         memcpy(&vcpu->arch.pkru, src + offset,
4940                                sizeof(vcpu->arch.pkru));
4941                 } else {
4942                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4943
4944                         if (dest)
4945                                 memcpy(dest, src + offset, size);
4946                 }
4947
4948                 valid -= xfeature_mask;
4949         }
4950 }
4951
4952 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4953                                          struct kvm_xsave *guest_xsave)
4954 {
4955         if (!vcpu->arch.guest_fpu)
4956                 return;
4957
4958         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4959                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4960                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4961         } else {
4962                 memcpy(guest_xsave->region,
4963                         &vcpu->arch.guest_fpu->state.fxsave,
4964                         sizeof(struct fxregs_state));
4965                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4966                         XFEATURE_MASK_FPSSE;
4967         }
4968 }
4969
4970 #define XSAVE_MXCSR_OFFSET 24
4971
4972 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4973                                         struct kvm_xsave *guest_xsave)
4974 {
4975         u64 xstate_bv;
4976         u32 mxcsr;
4977
4978         if (!vcpu->arch.guest_fpu)
4979                 return 0;
4980
4981         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4982         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4983
4984         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4985                 /*
4986                  * Here we allow setting states that are not present in
4987                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4988                  * with old userspace.
4989                  */
4990                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4991                         return -EINVAL;
4992                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4993         } else {
4994                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4995                         mxcsr & ~mxcsr_feature_mask)
4996                         return -EINVAL;
4997                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4998                         guest_xsave->region, sizeof(struct fxregs_state));
4999         }
5000         return 0;
5001 }
5002
5003 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5004                                         struct kvm_xcrs *guest_xcrs)
5005 {
5006         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5007                 guest_xcrs->nr_xcrs = 0;
5008                 return;
5009         }
5010
5011         guest_xcrs->nr_xcrs = 1;
5012         guest_xcrs->flags = 0;
5013         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5014         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5015 }
5016
5017 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5018                                        struct kvm_xcrs *guest_xcrs)
5019 {
5020         int i, r = 0;
5021
5022         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5023                 return -EINVAL;
5024
5025         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5026                 return -EINVAL;
5027
5028         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5029                 /* Only support XCR0 currently */
5030                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5031                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5032                                 guest_xcrs->xcrs[i].value);
5033                         break;
5034                 }
5035         if (r)
5036                 r = -EINVAL;
5037         return r;
5038 }
5039
5040 /*
5041  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5042  * stopped by the hypervisor.  This function will be called from the host only.
5043  * EINVAL is returned when the host attempts to set the flag for a guest that
5044  * does not support pv clocks.
5045  */
5046 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5047 {
5048         if (!vcpu->arch.pv_time_enabled)
5049                 return -EINVAL;
5050         vcpu->arch.pvclock_set_guest_stopped_request = true;
5051         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5052         return 0;
5053 }
5054
5055 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5056                                      struct kvm_enable_cap *cap)
5057 {
5058         int r;
5059         uint16_t vmcs_version;
5060         void __user *user_ptr;
5061
5062         if (cap->flags)
5063                 return -EINVAL;
5064
5065         switch (cap->cap) {
5066         case KVM_CAP_HYPERV_SYNIC2:
5067                 if (cap->args[0])
5068                         return -EINVAL;
5069                 fallthrough;
5070
5071         case KVM_CAP_HYPERV_SYNIC:
5072                 if (!irqchip_in_kernel(vcpu->kvm))
5073                         return -EINVAL;
5074                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5075                                              KVM_CAP_HYPERV_SYNIC2);
5076         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5077                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5078                         return -ENOTTY;
5079                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5080                 if (!r) {
5081                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5082                         if (copy_to_user(user_ptr, &vmcs_version,
5083                                          sizeof(vmcs_version)))
5084                                 r = -EFAULT;
5085                 }
5086                 return r;
5087         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5088                 if (!kvm_x86_ops.enable_direct_tlbflush)
5089                         return -ENOTTY;
5090
5091                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5092
5093         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5094                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5095
5096         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5097                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5098                 if (vcpu->arch.pv_cpuid.enforce)
5099                         kvm_update_pv_runtime(vcpu);
5100
5101                 return 0;
5102         default:
5103                 return -EINVAL;
5104         }
5105 }
5106
5107 long kvm_arch_vcpu_ioctl(struct file *filp,
5108                          unsigned int ioctl, unsigned long arg)
5109 {
5110         struct kvm_vcpu *vcpu = filp->private_data;
5111         void __user *argp = (void __user *)arg;
5112         int r;
5113         union {
5114                 struct kvm_sregs2 *sregs2;
5115                 struct kvm_lapic_state *lapic;
5116                 struct kvm_xsave *xsave;
5117                 struct kvm_xcrs *xcrs;
5118                 void *buffer;
5119         } u;
5120
5121         vcpu_load(vcpu);
5122
5123         u.buffer = NULL;
5124         switch (ioctl) {
5125         case KVM_GET_LAPIC: {
5126                 r = -EINVAL;
5127                 if (!lapic_in_kernel(vcpu))
5128                         goto out;
5129                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5130                                 GFP_KERNEL_ACCOUNT);
5131
5132                 r = -ENOMEM;
5133                 if (!u.lapic)
5134                         goto out;
5135                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5136                 if (r)
5137                         goto out;
5138                 r = -EFAULT;
5139                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5140                         goto out;
5141                 r = 0;
5142                 break;
5143         }
5144         case KVM_SET_LAPIC: {
5145                 r = -EINVAL;
5146                 if (!lapic_in_kernel(vcpu))
5147                         goto out;
5148                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5149                 if (IS_ERR(u.lapic)) {
5150                         r = PTR_ERR(u.lapic);
5151                         goto out_nofree;
5152                 }
5153
5154                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5155                 break;
5156         }
5157         case KVM_INTERRUPT: {
5158                 struct kvm_interrupt irq;
5159
5160                 r = -EFAULT;
5161                 if (copy_from_user(&irq, argp, sizeof(irq)))
5162                         goto out;
5163                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5164                 break;
5165         }
5166         case KVM_NMI: {
5167                 r = kvm_vcpu_ioctl_nmi(vcpu);
5168                 break;
5169         }
5170         case KVM_SMI: {
5171                 r = kvm_vcpu_ioctl_smi(vcpu);
5172                 break;
5173         }
5174         case KVM_SET_CPUID: {
5175                 struct kvm_cpuid __user *cpuid_arg = argp;
5176                 struct kvm_cpuid cpuid;
5177
5178                 r = -EFAULT;
5179                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5180                         goto out;
5181                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5182                 break;
5183         }
5184         case KVM_SET_CPUID2: {
5185                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5186                 struct kvm_cpuid2 cpuid;
5187
5188                 r = -EFAULT;
5189                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5190                         goto out;
5191                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5192                                               cpuid_arg->entries);
5193                 break;
5194         }
5195         case KVM_GET_CPUID2: {
5196                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5197                 struct kvm_cpuid2 cpuid;
5198
5199                 r = -EFAULT;
5200                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5201                         goto out;
5202                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5203                                               cpuid_arg->entries);
5204                 if (r)
5205                         goto out;
5206                 r = -EFAULT;
5207                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5208                         goto out;
5209                 r = 0;
5210                 break;
5211         }
5212         case KVM_GET_MSRS: {
5213                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5214                 r = msr_io(vcpu, argp, do_get_msr, 1);
5215                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5216                 break;
5217         }
5218         case KVM_SET_MSRS: {
5219                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5220                 r = msr_io(vcpu, argp, do_set_msr, 0);
5221                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5222                 break;
5223         }
5224         case KVM_TPR_ACCESS_REPORTING: {
5225                 struct kvm_tpr_access_ctl tac;
5226
5227                 r = -EFAULT;
5228                 if (copy_from_user(&tac, argp, sizeof(tac)))
5229                         goto out;
5230                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5231                 if (r)
5232                         goto out;
5233                 r = -EFAULT;
5234                 if (copy_to_user(argp, &tac, sizeof(tac)))
5235                         goto out;
5236                 r = 0;
5237                 break;
5238         };
5239         case KVM_SET_VAPIC_ADDR: {
5240                 struct kvm_vapic_addr va;
5241                 int idx;
5242
5243                 r = -EINVAL;
5244                 if (!lapic_in_kernel(vcpu))
5245                         goto out;
5246                 r = -EFAULT;
5247                 if (copy_from_user(&va, argp, sizeof(va)))
5248                         goto out;
5249                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5250                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5251                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5252                 break;
5253         }
5254         case KVM_X86_SETUP_MCE: {
5255                 u64 mcg_cap;
5256
5257                 r = -EFAULT;
5258                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5259                         goto out;
5260                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5261                 break;
5262         }
5263         case KVM_X86_SET_MCE: {
5264                 struct kvm_x86_mce mce;
5265
5266                 r = -EFAULT;
5267                 if (copy_from_user(&mce, argp, sizeof(mce)))
5268                         goto out;
5269                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5270                 break;
5271         }
5272         case KVM_GET_VCPU_EVENTS: {
5273                 struct kvm_vcpu_events events;
5274
5275                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5276
5277                 r = -EFAULT;
5278                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5279                         break;
5280                 r = 0;
5281                 break;
5282         }
5283         case KVM_SET_VCPU_EVENTS: {
5284                 struct kvm_vcpu_events events;
5285
5286                 r = -EFAULT;
5287                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5288                         break;
5289
5290                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5291                 break;
5292         }
5293         case KVM_GET_DEBUGREGS: {
5294                 struct kvm_debugregs dbgregs;
5295
5296                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5297
5298                 r = -EFAULT;
5299                 if (copy_to_user(argp, &dbgregs,
5300                                  sizeof(struct kvm_debugregs)))
5301                         break;
5302                 r = 0;
5303                 break;
5304         }
5305         case KVM_SET_DEBUGREGS: {
5306                 struct kvm_debugregs dbgregs;
5307
5308                 r = -EFAULT;
5309                 if (copy_from_user(&dbgregs, argp,
5310                                    sizeof(struct kvm_debugregs)))
5311                         break;
5312
5313                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5314                 break;
5315         }
5316         case KVM_GET_XSAVE: {
5317                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5318                 r = -ENOMEM;
5319                 if (!u.xsave)
5320                         break;
5321
5322                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5323
5324                 r = -EFAULT;
5325                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5326                         break;
5327                 r = 0;
5328                 break;
5329         }
5330         case KVM_SET_XSAVE: {
5331                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5332                 if (IS_ERR(u.xsave)) {
5333                         r = PTR_ERR(u.xsave);
5334                         goto out_nofree;
5335                 }
5336
5337                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5338                 break;
5339         }
5340         case KVM_GET_XCRS: {
5341                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5342                 r = -ENOMEM;
5343                 if (!u.xcrs)
5344                         break;
5345
5346                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5347
5348                 r = -EFAULT;
5349                 if (copy_to_user(argp, u.xcrs,
5350                                  sizeof(struct kvm_xcrs)))
5351                         break;
5352                 r = 0;
5353                 break;
5354         }
5355         case KVM_SET_XCRS: {
5356                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5357                 if (IS_ERR(u.xcrs)) {
5358                         r = PTR_ERR(u.xcrs);
5359                         goto out_nofree;
5360                 }
5361
5362                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5363                 break;
5364         }
5365         case KVM_SET_TSC_KHZ: {
5366                 u32 user_tsc_khz;
5367
5368                 r = -EINVAL;
5369                 user_tsc_khz = (u32)arg;
5370
5371                 if (kvm_has_tsc_control &&
5372                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5373                         goto out;
5374
5375                 if (user_tsc_khz == 0)
5376                         user_tsc_khz = tsc_khz;
5377
5378                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5379                         r = 0;
5380
5381                 goto out;
5382         }
5383         case KVM_GET_TSC_KHZ: {
5384                 r = vcpu->arch.virtual_tsc_khz;
5385                 goto out;
5386         }
5387         case KVM_KVMCLOCK_CTRL: {
5388                 r = kvm_set_guest_paused(vcpu);
5389                 goto out;
5390         }
5391         case KVM_ENABLE_CAP: {
5392                 struct kvm_enable_cap cap;
5393
5394                 r = -EFAULT;
5395                 if (copy_from_user(&cap, argp, sizeof(cap)))
5396                         goto out;
5397                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5398                 break;
5399         }
5400         case KVM_GET_NESTED_STATE: {
5401                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5402                 u32 user_data_size;
5403
5404                 r = -EINVAL;
5405                 if (!kvm_x86_ops.nested_ops->get_state)
5406                         break;
5407
5408                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5409                 r = -EFAULT;
5410                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5411                         break;
5412
5413                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5414                                                      user_data_size);
5415                 if (r < 0)
5416                         break;
5417
5418                 if (r > user_data_size) {
5419                         if (put_user(r, &user_kvm_nested_state->size))
5420                                 r = -EFAULT;
5421                         else
5422                                 r = -E2BIG;
5423                         break;
5424                 }
5425
5426                 r = 0;
5427                 break;
5428         }
5429         case KVM_SET_NESTED_STATE: {
5430                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5431                 struct kvm_nested_state kvm_state;
5432                 int idx;
5433
5434                 r = -EINVAL;
5435                 if (!kvm_x86_ops.nested_ops->set_state)
5436                         break;
5437
5438                 r = -EFAULT;
5439                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5440                         break;
5441
5442                 r = -EINVAL;
5443                 if (kvm_state.size < sizeof(kvm_state))
5444                         break;
5445
5446                 if (kvm_state.flags &
5447                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5448                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5449                       | KVM_STATE_NESTED_GIF_SET))
5450                         break;
5451
5452                 /* nested_run_pending implies guest_mode.  */
5453                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5454                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5455                         break;
5456
5457                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5458                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5459                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5460                 break;
5461         }
5462         case KVM_GET_SUPPORTED_HV_CPUID:
5463                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5464                 break;
5465 #ifdef CONFIG_KVM_XEN
5466         case KVM_XEN_VCPU_GET_ATTR: {
5467                 struct kvm_xen_vcpu_attr xva;
5468
5469                 r = -EFAULT;
5470                 if (copy_from_user(&xva, argp, sizeof(xva)))
5471                         goto out;
5472                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5473                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5474                         r = -EFAULT;
5475                 break;
5476         }
5477         case KVM_XEN_VCPU_SET_ATTR: {
5478                 struct kvm_xen_vcpu_attr xva;
5479
5480                 r = -EFAULT;
5481                 if (copy_from_user(&xva, argp, sizeof(xva)))
5482                         goto out;
5483                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5484                 break;
5485         }
5486 #endif
5487         case KVM_GET_SREGS2: {
5488                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5489                 r = -ENOMEM;
5490                 if (!u.sregs2)
5491                         goto out;
5492                 __get_sregs2(vcpu, u.sregs2);
5493                 r = -EFAULT;
5494                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5495                         goto out;
5496                 r = 0;
5497                 break;
5498         }
5499         case KVM_SET_SREGS2: {
5500                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5501                 if (IS_ERR(u.sregs2)) {
5502                         r = PTR_ERR(u.sregs2);
5503                         u.sregs2 = NULL;
5504                         goto out;
5505                 }
5506                 r = __set_sregs2(vcpu, u.sregs2);
5507                 break;
5508         }
5509         default:
5510                 r = -EINVAL;
5511         }
5512 out:
5513         kfree(u.buffer);
5514 out_nofree:
5515         vcpu_put(vcpu);
5516         return r;
5517 }
5518
5519 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5520 {
5521         return VM_FAULT_SIGBUS;
5522 }
5523
5524 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5525 {
5526         int ret;
5527
5528         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5529                 return -EINVAL;
5530         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5531         return ret;
5532 }
5533
5534 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5535                                               u64 ident_addr)
5536 {
5537         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5538 }
5539
5540 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5541                                          unsigned long kvm_nr_mmu_pages)
5542 {
5543         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5544                 return -EINVAL;
5545
5546         mutex_lock(&kvm->slots_lock);
5547
5548         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5549         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5550
5551         mutex_unlock(&kvm->slots_lock);
5552         return 0;
5553 }
5554
5555 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5556 {
5557         return kvm->arch.n_max_mmu_pages;
5558 }
5559
5560 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5561 {
5562         struct kvm_pic *pic = kvm->arch.vpic;
5563         int r;
5564
5565         r = 0;
5566         switch (chip->chip_id) {
5567         case KVM_IRQCHIP_PIC_MASTER:
5568                 memcpy(&chip->chip.pic, &pic->pics[0],
5569                         sizeof(struct kvm_pic_state));
5570                 break;
5571         case KVM_IRQCHIP_PIC_SLAVE:
5572                 memcpy(&chip->chip.pic, &pic->pics[1],
5573                         sizeof(struct kvm_pic_state));
5574                 break;
5575         case KVM_IRQCHIP_IOAPIC:
5576                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5577                 break;
5578         default:
5579                 r = -EINVAL;
5580                 break;
5581         }
5582         return r;
5583 }
5584
5585 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5586 {
5587         struct kvm_pic *pic = kvm->arch.vpic;
5588         int r;
5589
5590         r = 0;
5591         switch (chip->chip_id) {
5592         case KVM_IRQCHIP_PIC_MASTER:
5593                 spin_lock(&pic->lock);
5594                 memcpy(&pic->pics[0], &chip->chip.pic,
5595                         sizeof(struct kvm_pic_state));
5596                 spin_unlock(&pic->lock);
5597                 break;
5598         case KVM_IRQCHIP_PIC_SLAVE:
5599                 spin_lock(&pic->lock);
5600                 memcpy(&pic->pics[1], &chip->chip.pic,
5601                         sizeof(struct kvm_pic_state));
5602                 spin_unlock(&pic->lock);
5603                 break;
5604         case KVM_IRQCHIP_IOAPIC:
5605                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5606                 break;
5607         default:
5608                 r = -EINVAL;
5609                 break;
5610         }
5611         kvm_pic_update_irq(pic);
5612         return r;
5613 }
5614
5615 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5616 {
5617         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5618
5619         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5620
5621         mutex_lock(&kps->lock);
5622         memcpy(ps, &kps->channels, sizeof(*ps));
5623         mutex_unlock(&kps->lock);
5624         return 0;
5625 }
5626
5627 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5628 {
5629         int i;
5630         struct kvm_pit *pit = kvm->arch.vpit;
5631
5632         mutex_lock(&pit->pit_state.lock);
5633         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5634         for (i = 0; i < 3; i++)
5635                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5636         mutex_unlock(&pit->pit_state.lock);
5637         return 0;
5638 }
5639
5640 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5641 {
5642         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5643         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5644                 sizeof(ps->channels));
5645         ps->flags = kvm->arch.vpit->pit_state.flags;
5646         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5647         memset(&ps->reserved, 0, sizeof(ps->reserved));
5648         return 0;
5649 }
5650
5651 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5652 {
5653         int start = 0;
5654         int i;
5655         u32 prev_legacy, cur_legacy;
5656         struct kvm_pit *pit = kvm->arch.vpit;
5657
5658         mutex_lock(&pit->pit_state.lock);
5659         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5660         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5661         if (!prev_legacy && cur_legacy)
5662                 start = 1;
5663         memcpy(&pit->pit_state.channels, &ps->channels,
5664                sizeof(pit->pit_state.channels));
5665         pit->pit_state.flags = ps->flags;
5666         for (i = 0; i < 3; i++)
5667                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5668                                    start && i == 0);
5669         mutex_unlock(&pit->pit_state.lock);
5670         return 0;
5671 }
5672
5673 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5674                                  struct kvm_reinject_control *control)
5675 {
5676         struct kvm_pit *pit = kvm->arch.vpit;
5677
5678         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5679          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5680          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5681          */
5682         mutex_lock(&pit->pit_state.lock);
5683         kvm_pit_set_reinject(pit, control->pit_reinject);
5684         mutex_unlock(&pit->pit_state.lock);
5685
5686         return 0;
5687 }
5688
5689 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5690 {
5691
5692         /*
5693          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5694          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5695          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5696          * VM-Exit.
5697          */
5698         struct kvm_vcpu *vcpu;
5699         int i;
5700
5701         kvm_for_each_vcpu(i, vcpu, kvm)
5702                 kvm_vcpu_kick(vcpu);
5703 }
5704
5705 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5706                         bool line_status)
5707 {
5708         if (!irqchip_in_kernel(kvm))
5709                 return -ENXIO;
5710
5711         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5712                                         irq_event->irq, irq_event->level,
5713                                         line_status);
5714         return 0;
5715 }
5716
5717 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5718                             struct kvm_enable_cap *cap)
5719 {
5720         int r;
5721
5722         if (cap->flags)
5723                 return -EINVAL;
5724
5725         switch (cap->cap) {
5726         case KVM_CAP_DISABLE_QUIRKS:
5727                 kvm->arch.disabled_quirks = cap->args[0];
5728                 r = 0;
5729                 break;
5730         case KVM_CAP_SPLIT_IRQCHIP: {
5731                 mutex_lock(&kvm->lock);
5732                 r = -EINVAL;
5733                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5734                         goto split_irqchip_unlock;
5735                 r = -EEXIST;
5736                 if (irqchip_in_kernel(kvm))
5737                         goto split_irqchip_unlock;
5738                 if (kvm->created_vcpus)
5739                         goto split_irqchip_unlock;
5740                 r = kvm_setup_empty_irq_routing(kvm);
5741                 if (r)
5742                         goto split_irqchip_unlock;
5743                 /* Pairs with irqchip_in_kernel. */
5744                 smp_wmb();
5745                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5746                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5747                 r = 0;
5748 split_irqchip_unlock:
5749                 mutex_unlock(&kvm->lock);
5750                 break;
5751         }
5752         case KVM_CAP_X2APIC_API:
5753                 r = -EINVAL;
5754                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5755                         break;
5756
5757                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5758                         kvm->arch.x2apic_format = true;
5759                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5760                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5761
5762                 r = 0;
5763                 break;
5764         case KVM_CAP_X86_DISABLE_EXITS:
5765                 r = -EINVAL;
5766                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5767                         break;
5768
5769                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5770                         kvm->arch.pause_in_guest = true;
5771
5772 #define SMT_RSB_MSG "This processor is affected by the Cross-Thread Return Predictions vulnerability. " \
5773                     "KVM_CAP_X86_DISABLE_EXITS should only be used with SMT disabled or trusted guests."
5774
5775                 if (!mitigate_smt_rsb) {
5776                         if (boot_cpu_has_bug(X86_BUG_SMT_RSB) && cpu_smt_possible() &&
5777                             (cap->args[0] & ~KVM_X86_DISABLE_EXITS_PAUSE))
5778                                 pr_warn_once(SMT_RSB_MSG);
5779
5780                         if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5781                             kvm_can_mwait_in_guest())
5782                                 kvm->arch.mwait_in_guest = true;
5783                         if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5784                                 kvm->arch.hlt_in_guest = true;
5785                         if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5786                                 kvm->arch.cstate_in_guest = true;
5787                 }
5788
5789                 r = 0;
5790                 break;
5791         case KVM_CAP_MSR_PLATFORM_INFO:
5792                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5793                 r = 0;
5794                 break;
5795         case KVM_CAP_EXCEPTION_PAYLOAD:
5796                 kvm->arch.exception_payload_enabled = cap->args[0];
5797                 r = 0;
5798                 break;
5799         case KVM_CAP_X86_USER_SPACE_MSR:
5800                 r = -EINVAL;
5801                 if (cap->args[0] & ~(KVM_MSR_EXIT_REASON_INVAL |
5802                                      KVM_MSR_EXIT_REASON_UNKNOWN |
5803                                      KVM_MSR_EXIT_REASON_FILTER))
5804                         break;
5805                 kvm->arch.user_space_msr_mask = cap->args[0];
5806                 r = 0;
5807                 break;
5808         case KVM_CAP_X86_BUS_LOCK_EXIT:
5809                 r = -EINVAL;
5810                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5811                         break;
5812
5813                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5814                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5815                         break;
5816
5817                 if (kvm_has_bus_lock_exit &&
5818                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5819                         kvm->arch.bus_lock_detection_enabled = true;
5820                 r = 0;
5821                 break;
5822 #ifdef CONFIG_X86_SGX_KVM
5823         case KVM_CAP_SGX_ATTRIBUTE: {
5824                 unsigned long allowed_attributes = 0;
5825
5826                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5827                 if (r)
5828                         break;
5829
5830                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5831                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5832                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5833                         kvm->arch.sgx_provisioning_allowed = true;
5834                 else
5835                         r = -EINVAL;
5836                 break;
5837         }
5838 #endif
5839         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5840                 r = -EINVAL;
5841                 if (kvm_x86_ops.vm_copy_enc_context_from)
5842                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5843                 return r;
5844         case KVM_CAP_EXIT_HYPERCALL:
5845                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5846                         r = -EINVAL;
5847                         break;
5848                 }
5849                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5850                 r = 0;
5851                 break;
5852         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5853                 r = -EINVAL;
5854                 if (cap->args[0] & ~1)
5855                         break;
5856                 kvm->arch.exit_on_emulation_error = cap->args[0];
5857                 r = 0;
5858                 break;
5859         default:
5860                 r = -EINVAL;
5861                 break;
5862         }
5863         return r;
5864 }
5865
5866 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5867 {
5868         struct kvm_x86_msr_filter *msr_filter;
5869
5870         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5871         if (!msr_filter)
5872                 return NULL;
5873
5874         msr_filter->default_allow = default_allow;
5875         return msr_filter;
5876 }
5877
5878 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5879 {
5880         u32 i;
5881
5882         if (!msr_filter)
5883                 return;
5884
5885         for (i = 0; i < msr_filter->count; i++)
5886                 kfree(msr_filter->ranges[i].bitmap);
5887
5888         kfree(msr_filter);
5889 }
5890
5891 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5892                               struct kvm_msr_filter_range *user_range)
5893 {
5894         unsigned long *bitmap = NULL;
5895         size_t bitmap_size;
5896
5897         if (!user_range->nmsrs)
5898                 return 0;
5899
5900         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5901                 return -EINVAL;
5902
5903         if (!user_range->flags)
5904                 return -EINVAL;
5905
5906         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5907         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5908                 return -EINVAL;
5909
5910         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5911         if (IS_ERR(bitmap))
5912                 return PTR_ERR(bitmap);
5913
5914         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5915                 .flags = user_range->flags,
5916                 .base = user_range->base,
5917                 .nmsrs = user_range->nmsrs,
5918                 .bitmap = bitmap,
5919         };
5920
5921         msr_filter->count++;
5922         return 0;
5923 }
5924
5925 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm,
5926                                        struct kvm_msr_filter *filter)
5927 {
5928         struct kvm_x86_msr_filter *new_filter, *old_filter;
5929         bool default_allow;
5930         bool empty = true;
5931         int r = 0;
5932         u32 i;
5933
5934         if (filter->flags & ~KVM_MSR_FILTER_DEFAULT_DENY)
5935                 return -EINVAL;
5936
5937         for (i = 0; i < ARRAY_SIZE(filter->ranges); i++)
5938                 empty &= !filter->ranges[i].nmsrs;
5939
5940         default_allow = !(filter->flags & KVM_MSR_FILTER_DEFAULT_DENY);
5941         if (empty && !default_allow)
5942                 return -EINVAL;
5943
5944         new_filter = kvm_alloc_msr_filter(default_allow);
5945         if (!new_filter)
5946                 return -ENOMEM;
5947
5948         for (i = 0; i < ARRAY_SIZE(filter->ranges); i++) {
5949                 r = kvm_add_msr_filter(new_filter, &filter->ranges[i]);
5950                 if (r) {
5951                         kvm_free_msr_filter(new_filter);
5952                         return r;
5953                 }
5954         }
5955
5956         mutex_lock(&kvm->lock);
5957
5958         /* The per-VM filter is protected by kvm->lock... */
5959         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5960
5961         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5962         synchronize_srcu(&kvm->srcu);
5963
5964         kvm_free_msr_filter(old_filter);
5965
5966         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5967         mutex_unlock(&kvm->lock);
5968
5969         return 0;
5970 }
5971
5972 #ifdef CONFIG_KVM_COMPAT
5973 /* for KVM_X86_SET_MSR_FILTER */
5974 struct kvm_msr_filter_range_compat {
5975         __u32 flags;
5976         __u32 nmsrs;
5977         __u32 base;
5978         __u32 bitmap;
5979 };
5980
5981 struct kvm_msr_filter_compat {
5982         __u32 flags;
5983         struct kvm_msr_filter_range_compat ranges[KVM_MSR_FILTER_MAX_RANGES];
5984 };
5985
5986 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
5987
5988 long kvm_arch_vm_compat_ioctl(struct file *filp, unsigned int ioctl,
5989                               unsigned long arg)
5990 {
5991         void __user *argp = (void __user *)arg;
5992         struct kvm *kvm = filp->private_data;
5993         long r = -ENOTTY;
5994
5995         switch (ioctl) {
5996         case KVM_X86_SET_MSR_FILTER_COMPAT: {
5997                 struct kvm_msr_filter __user *user_msr_filter = argp;
5998                 struct kvm_msr_filter_compat filter_compat;
5999                 struct kvm_msr_filter filter;
6000                 int i;
6001
6002                 if (copy_from_user(&filter_compat, user_msr_filter,
6003                                    sizeof(filter_compat)))
6004                         return -EFAULT;
6005
6006                 filter.flags = filter_compat.flags;
6007                 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6008                         struct kvm_msr_filter_range_compat *cr;
6009
6010                         cr = &filter_compat.ranges[i];
6011                         filter.ranges[i] = (struct kvm_msr_filter_range) {
6012                                 .flags = cr->flags,
6013                                 .nmsrs = cr->nmsrs,
6014                                 .base = cr->base,
6015                                 .bitmap = (__u8 *)(ulong)cr->bitmap,
6016                         };
6017                 }
6018
6019                 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6020                 break;
6021         }
6022         }
6023
6024         return r;
6025 }
6026 #endif
6027
6028 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6029 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6030 {
6031         struct kvm_vcpu *vcpu;
6032         int i, ret = 0;
6033
6034         mutex_lock(&kvm->lock);
6035         kvm_for_each_vcpu(i, vcpu, kvm) {
6036                 if (!vcpu->arch.pv_time_enabled)
6037                         continue;
6038
6039                 ret = kvm_set_guest_paused(vcpu);
6040                 if (ret) {
6041                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6042                                 vcpu->vcpu_id, ret);
6043                         break;
6044                 }
6045         }
6046         mutex_unlock(&kvm->lock);
6047
6048         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6049 }
6050
6051 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6052 {
6053         switch (state) {
6054         case PM_HIBERNATION_PREPARE:
6055         case PM_SUSPEND_PREPARE:
6056                 return kvm_arch_suspend_notifier(kvm);
6057         }
6058
6059         return NOTIFY_DONE;
6060 }
6061 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6062
6063 long kvm_arch_vm_ioctl(struct file *filp,
6064                        unsigned int ioctl, unsigned long arg)
6065 {
6066         struct kvm *kvm = filp->private_data;
6067         void __user *argp = (void __user *)arg;
6068         int r = -ENOTTY;
6069         /*
6070          * This union makes it completely explicit to gcc-3.x
6071          * that these two variables' stack usage should be
6072          * combined, not added together.
6073          */
6074         union {
6075                 struct kvm_pit_state ps;
6076                 struct kvm_pit_state2 ps2;
6077                 struct kvm_pit_config pit_config;
6078         } u;
6079
6080         switch (ioctl) {
6081         case KVM_SET_TSS_ADDR:
6082                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6083                 break;
6084         case KVM_SET_IDENTITY_MAP_ADDR: {
6085                 u64 ident_addr;
6086
6087                 mutex_lock(&kvm->lock);
6088                 r = -EINVAL;
6089                 if (kvm->created_vcpus)
6090                         goto set_identity_unlock;
6091                 r = -EFAULT;
6092                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6093                         goto set_identity_unlock;
6094                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6095 set_identity_unlock:
6096                 mutex_unlock(&kvm->lock);
6097                 break;
6098         }
6099         case KVM_SET_NR_MMU_PAGES:
6100                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6101                 break;
6102         case KVM_GET_NR_MMU_PAGES:
6103                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6104                 break;
6105         case KVM_CREATE_IRQCHIP: {
6106                 mutex_lock(&kvm->lock);
6107
6108                 r = -EEXIST;
6109                 if (irqchip_in_kernel(kvm))
6110                         goto create_irqchip_unlock;
6111
6112                 r = -EINVAL;
6113                 if (kvm->created_vcpus)
6114                         goto create_irqchip_unlock;
6115
6116                 r = kvm_pic_init(kvm);
6117                 if (r)
6118                         goto create_irqchip_unlock;
6119
6120                 r = kvm_ioapic_init(kvm);
6121                 if (r) {
6122                         kvm_pic_destroy(kvm);
6123                         goto create_irqchip_unlock;
6124                 }
6125
6126                 r = kvm_setup_default_irq_routing(kvm);
6127                 if (r) {
6128                         kvm_ioapic_destroy(kvm);
6129                         kvm_pic_destroy(kvm);
6130                         goto create_irqchip_unlock;
6131                 }
6132                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6133                 smp_wmb();
6134                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6135         create_irqchip_unlock:
6136                 mutex_unlock(&kvm->lock);
6137                 break;
6138         }
6139         case KVM_CREATE_PIT:
6140                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6141                 goto create_pit;
6142         case KVM_CREATE_PIT2:
6143                 r = -EFAULT;
6144                 if (copy_from_user(&u.pit_config, argp,
6145                                    sizeof(struct kvm_pit_config)))
6146                         goto out;
6147         create_pit:
6148                 mutex_lock(&kvm->lock);
6149                 r = -EEXIST;
6150                 if (kvm->arch.vpit)
6151                         goto create_pit_unlock;
6152                 r = -ENOMEM;
6153                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6154                 if (kvm->arch.vpit)
6155                         r = 0;
6156         create_pit_unlock:
6157                 mutex_unlock(&kvm->lock);
6158                 break;
6159         case KVM_GET_IRQCHIP: {
6160                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6161                 struct kvm_irqchip *chip;
6162
6163                 chip = memdup_user(argp, sizeof(*chip));
6164                 if (IS_ERR(chip)) {
6165                         r = PTR_ERR(chip);
6166                         goto out;
6167                 }
6168
6169                 r = -ENXIO;
6170                 if (!irqchip_kernel(kvm))
6171                         goto get_irqchip_out;
6172                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6173                 if (r)
6174                         goto get_irqchip_out;
6175                 r = -EFAULT;
6176                 if (copy_to_user(argp, chip, sizeof(*chip)))
6177                         goto get_irqchip_out;
6178                 r = 0;
6179         get_irqchip_out:
6180                 kfree(chip);
6181                 break;
6182         }
6183         case KVM_SET_IRQCHIP: {
6184                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6185                 struct kvm_irqchip *chip;
6186
6187                 chip = memdup_user(argp, sizeof(*chip));
6188                 if (IS_ERR(chip)) {
6189                         r = PTR_ERR(chip);
6190                         goto out;
6191                 }
6192
6193                 r = -ENXIO;
6194                 if (!irqchip_kernel(kvm))
6195                         goto set_irqchip_out;
6196                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6197         set_irqchip_out:
6198                 kfree(chip);
6199                 break;
6200         }
6201         case KVM_GET_PIT: {
6202                 r = -EFAULT;
6203                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6204                         goto out;
6205                 r = -ENXIO;
6206                 if (!kvm->arch.vpit)
6207                         goto out;
6208                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6209                 if (r)
6210                         goto out;
6211                 r = -EFAULT;
6212                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6213                         goto out;
6214                 r = 0;
6215                 break;
6216         }
6217         case KVM_SET_PIT: {
6218                 r = -EFAULT;
6219                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6220                         goto out;
6221                 mutex_lock(&kvm->lock);
6222                 r = -ENXIO;
6223                 if (!kvm->arch.vpit)
6224                         goto set_pit_out;
6225                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6226 set_pit_out:
6227                 mutex_unlock(&kvm->lock);
6228                 break;
6229         }
6230         case KVM_GET_PIT2: {
6231                 r = -ENXIO;
6232                 if (!kvm->arch.vpit)
6233                         goto out;
6234                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6235                 if (r)
6236                         goto out;
6237                 r = -EFAULT;
6238                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6239                         goto out;
6240                 r = 0;
6241                 break;
6242         }
6243         case KVM_SET_PIT2: {
6244                 r = -EFAULT;
6245                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6246                         goto out;
6247                 mutex_lock(&kvm->lock);
6248                 r = -ENXIO;
6249                 if (!kvm->arch.vpit)
6250                         goto set_pit2_out;
6251                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6252 set_pit2_out:
6253                 mutex_unlock(&kvm->lock);
6254                 break;
6255         }
6256         case KVM_REINJECT_CONTROL: {
6257                 struct kvm_reinject_control control;
6258                 r =  -EFAULT;
6259                 if (copy_from_user(&control, argp, sizeof(control)))
6260                         goto out;
6261                 r = -ENXIO;
6262                 if (!kvm->arch.vpit)
6263                         goto out;
6264                 r = kvm_vm_ioctl_reinject(kvm, &control);
6265                 break;
6266         }
6267         case KVM_SET_BOOT_CPU_ID:
6268                 r = 0;
6269                 mutex_lock(&kvm->lock);
6270                 if (kvm->created_vcpus)
6271                         r = -EBUSY;
6272                 else
6273                         kvm->arch.bsp_vcpu_id = arg;
6274                 mutex_unlock(&kvm->lock);
6275                 break;
6276 #ifdef CONFIG_KVM_XEN
6277         case KVM_XEN_HVM_CONFIG: {
6278                 struct kvm_xen_hvm_config xhc;
6279                 r = -EFAULT;
6280                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6281                         goto out;
6282                 r = kvm_xen_hvm_config(kvm, &xhc);
6283                 break;
6284         }
6285         case KVM_XEN_HVM_GET_ATTR: {
6286                 struct kvm_xen_hvm_attr xha;
6287
6288                 r = -EFAULT;
6289                 if (copy_from_user(&xha, argp, sizeof(xha)))
6290                         goto out;
6291                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6292                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6293                         r = -EFAULT;
6294                 break;
6295         }
6296         case KVM_XEN_HVM_SET_ATTR: {
6297                 struct kvm_xen_hvm_attr xha;
6298
6299                 r = -EFAULT;
6300                 if (copy_from_user(&xha, argp, sizeof(xha)))
6301                         goto out;
6302                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6303                 break;
6304         }
6305 #endif
6306         case KVM_SET_CLOCK: {
6307                 struct kvm_arch *ka = &kvm->arch;
6308                 struct kvm_clock_data user_ns;
6309                 u64 now_ns;
6310
6311                 r = -EFAULT;
6312                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6313                         goto out;
6314
6315                 r = -EINVAL;
6316                 if (user_ns.flags)
6317                         goto out;
6318
6319                 r = 0;
6320                 /*
6321                  * TODO: userspace has to take care of races with VCPU_RUN, so
6322                  * kvm_gen_update_masterclock() can be cut down to locked
6323                  * pvclock_update_vm_gtod_copy().
6324                  */
6325                 kvm_gen_update_masterclock(kvm);
6326
6327                 /*
6328                  * This pairs with kvm_guest_time_update(): when masterclock is
6329                  * in use, we use master_kernel_ns + kvmclock_offset to set
6330                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6331                  * is slightly ahead) here we risk going negative on unsigned
6332                  * 'system_time' when 'user_ns.clock' is very small.
6333                  */
6334                 raw_spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6335                 if (kvm->arch.use_master_clock)
6336                         now_ns = ka->master_kernel_ns;
6337                 else
6338                         now_ns = get_kvmclock_base_ns();
6339                 ka->kvmclock_offset = user_ns.clock - now_ns;
6340                 raw_spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6341
6342                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6343                 break;
6344         }
6345         case KVM_GET_CLOCK: {
6346                 struct kvm_clock_data user_ns;
6347                 u64 now_ns;
6348
6349                 now_ns = get_kvmclock_ns(kvm);
6350                 user_ns.clock = now_ns;
6351                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6352                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6353
6354                 r = -EFAULT;
6355                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6356                         goto out;
6357                 r = 0;
6358                 break;
6359         }
6360         case KVM_MEMORY_ENCRYPT_OP: {
6361                 r = -ENOTTY;
6362                 if (kvm_x86_ops.mem_enc_op)
6363                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6364                 break;
6365         }
6366         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6367                 struct kvm_enc_region region;
6368
6369                 r = -EFAULT;
6370                 if (copy_from_user(&region, argp, sizeof(region)))
6371                         goto out;
6372
6373                 r = -ENOTTY;
6374                 if (kvm_x86_ops.mem_enc_reg_region)
6375                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6376                 break;
6377         }
6378         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6379                 struct kvm_enc_region region;
6380
6381                 r = -EFAULT;
6382                 if (copy_from_user(&region, argp, sizeof(region)))
6383                         goto out;
6384
6385                 r = -ENOTTY;
6386                 if (kvm_x86_ops.mem_enc_unreg_region)
6387                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6388                 break;
6389         }
6390         case KVM_HYPERV_EVENTFD: {
6391                 struct kvm_hyperv_eventfd hvevfd;
6392
6393                 r = -EFAULT;
6394                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6395                         goto out;
6396                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6397                 break;
6398         }
6399         case KVM_SET_PMU_EVENT_FILTER:
6400                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6401                 break;
6402         case KVM_X86_SET_MSR_FILTER: {
6403                 struct kvm_msr_filter __user *user_msr_filter = argp;
6404                 struct kvm_msr_filter filter;
6405
6406                 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6407                         return -EFAULT;
6408
6409                 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6410                 break;
6411         }
6412         default:
6413                 r = -ENOTTY;
6414         }
6415 out:
6416         return r;
6417 }
6418
6419 static void kvm_init_msr_list(void)
6420 {
6421         struct x86_pmu_capability x86_pmu;
6422         u32 dummy[2];
6423         unsigned i;
6424
6425         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6426                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6427
6428         perf_get_x86_pmu_capability(&x86_pmu);
6429
6430         num_msrs_to_save = 0;
6431         num_emulated_msrs = 0;
6432         num_msr_based_features = 0;
6433
6434         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6435                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6436                         continue;
6437
6438                 /*
6439                  * Even MSRs that are valid in the host may not be exposed
6440                  * to the guests in some cases.
6441                  */
6442                 switch (msrs_to_save_all[i]) {
6443                 case MSR_IA32_BNDCFGS:
6444                         if (!kvm_mpx_supported())
6445                                 continue;
6446                         break;
6447                 case MSR_TSC_AUX:
6448                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6449                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6450                                 continue;
6451                         break;
6452                 case MSR_IA32_UMWAIT_CONTROL:
6453                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6454                                 continue;
6455                         break;
6456                 case MSR_IA32_RTIT_CTL:
6457                 case MSR_IA32_RTIT_STATUS:
6458                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6459                                 continue;
6460                         break;
6461                 case MSR_IA32_RTIT_CR3_MATCH:
6462                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6463                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6464                                 continue;
6465                         break;
6466                 case MSR_IA32_RTIT_OUTPUT_BASE:
6467                 case MSR_IA32_RTIT_OUTPUT_MASK:
6468                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6469                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6470                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6471                                 continue;
6472                         break;
6473                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6474                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6475                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6476                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6477                                 continue;
6478                         break;
6479                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 7:
6480                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6481                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6482                                 continue;
6483                         break;
6484                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 7:
6485                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6486                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6487                                 continue;
6488                         break;
6489                 default:
6490                         break;
6491                 }
6492
6493                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6494         }
6495
6496         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6497                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6498                         continue;
6499
6500                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6501         }
6502
6503         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6504                 struct kvm_msr_entry msr;
6505
6506                 msr.index = msr_based_features_all[i];
6507                 if (kvm_get_msr_feature(&msr))
6508                         continue;
6509
6510                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6511         }
6512 }
6513
6514 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6515                            const void *v)
6516 {
6517         int handled = 0;
6518         int n;
6519
6520         do {
6521                 n = min(len, 8);
6522                 if (!(lapic_in_kernel(vcpu) &&
6523                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6524                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6525                         break;
6526                 handled += n;
6527                 addr += n;
6528                 len -= n;
6529                 v += n;
6530         } while (len);
6531
6532         return handled;
6533 }
6534
6535 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6536 {
6537         int handled = 0;
6538         int n;
6539
6540         do {
6541                 n = min(len, 8);
6542                 if (!(lapic_in_kernel(vcpu) &&
6543                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6544                                          addr, n, v))
6545                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6546                         break;
6547                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6548                 handled += n;
6549                 addr += n;
6550                 len -= n;
6551                 v += n;
6552         } while (len);
6553
6554         return handled;
6555 }
6556
6557 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6558                         struct kvm_segment *var, int seg)
6559 {
6560         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6561 }
6562
6563 void kvm_get_segment(struct kvm_vcpu *vcpu,
6564                      struct kvm_segment *var, int seg)
6565 {
6566         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6567 }
6568
6569 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6570                            struct x86_exception *exception)
6571 {
6572         gpa_t t_gpa;
6573
6574         BUG_ON(!mmu_is_nested(vcpu));
6575
6576         /* NPT walks are always user-walks */
6577         access |= PFERR_USER_MASK;
6578         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6579
6580         return t_gpa;
6581 }
6582
6583 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6584                               struct x86_exception *exception)
6585 {
6586         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6587         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6588 }
6589 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6590
6591  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6592                                 struct x86_exception *exception)
6593 {
6594         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6595         access |= PFERR_FETCH_MASK;
6596         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6597 }
6598
6599 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6600                                struct x86_exception *exception)
6601 {
6602         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6603         access |= PFERR_WRITE_MASK;
6604         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6605 }
6606 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6607
6608 /* uses this to access any guest's mapped memory without checking CPL */
6609 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6610                                 struct x86_exception *exception)
6611 {
6612         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6613 }
6614
6615 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6616                                       struct kvm_vcpu *vcpu, u32 access,
6617                                       struct x86_exception *exception)
6618 {
6619         void *data = val;
6620         int r = X86EMUL_CONTINUE;
6621
6622         while (bytes) {
6623                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6624                                                             exception);
6625                 unsigned offset = addr & (PAGE_SIZE-1);
6626                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6627                 int ret;
6628
6629                 if (gpa == UNMAPPED_GVA)
6630                         return X86EMUL_PROPAGATE_FAULT;
6631                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6632                                                offset, toread);
6633                 if (ret < 0) {
6634                         r = X86EMUL_IO_NEEDED;
6635                         goto out;
6636                 }
6637
6638                 bytes -= toread;
6639                 data += toread;
6640                 addr += toread;
6641         }
6642 out:
6643         return r;
6644 }
6645
6646 /* used for instruction fetching */
6647 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6648                                 gva_t addr, void *val, unsigned int bytes,
6649                                 struct x86_exception *exception)
6650 {
6651         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6652         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6653         unsigned offset;
6654         int ret;
6655
6656         /* Inline kvm_read_guest_virt_helper for speed.  */
6657         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6658                                                     exception);
6659         if (unlikely(gpa == UNMAPPED_GVA))
6660                 return X86EMUL_PROPAGATE_FAULT;
6661
6662         offset = addr & (PAGE_SIZE-1);
6663         if (WARN_ON(offset + bytes > PAGE_SIZE))
6664                 bytes = (unsigned)PAGE_SIZE - offset;
6665         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6666                                        offset, bytes);
6667         if (unlikely(ret < 0))
6668                 return X86EMUL_IO_NEEDED;
6669
6670         return X86EMUL_CONTINUE;
6671 }
6672
6673 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6674                                gva_t addr, void *val, unsigned int bytes,
6675                                struct x86_exception *exception)
6676 {
6677         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6678
6679         /*
6680          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6681          * is returned, but our callers are not ready for that and they blindly
6682          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6683          * uninitialized kernel stack memory into cr2 and error code.
6684          */
6685         memset(exception, 0, sizeof(*exception));
6686         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6687                                           exception);
6688 }
6689 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6690
6691 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6692                              gva_t addr, void *val, unsigned int bytes,
6693                              struct x86_exception *exception, bool system)
6694 {
6695         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6696         u32 access = 0;
6697
6698         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6699                 access |= PFERR_USER_MASK;
6700
6701         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6702 }
6703
6704 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6705                 unsigned long addr, void *val, unsigned int bytes)
6706 {
6707         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6708         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6709
6710         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6711 }
6712
6713 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6714                                       struct kvm_vcpu *vcpu, u32 access,
6715                                       struct x86_exception *exception)
6716 {
6717         void *data = val;
6718         int r = X86EMUL_CONTINUE;
6719
6720         while (bytes) {
6721                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6722                                                              access,
6723                                                              exception);
6724                 unsigned offset = addr & (PAGE_SIZE-1);
6725                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6726                 int ret;
6727
6728                 if (gpa == UNMAPPED_GVA)
6729                         return X86EMUL_PROPAGATE_FAULT;
6730                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6731                 if (ret < 0) {
6732                         r = X86EMUL_IO_NEEDED;
6733                         goto out;
6734                 }
6735
6736                 bytes -= towrite;
6737                 data += towrite;
6738                 addr += towrite;
6739         }
6740 out:
6741         return r;
6742 }
6743
6744 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6745                               unsigned int bytes, struct x86_exception *exception,
6746                               bool system)
6747 {
6748         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6749         u32 access = PFERR_WRITE_MASK;
6750
6751         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6752                 access |= PFERR_USER_MASK;
6753
6754         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6755                                            access, exception);
6756 }
6757
6758 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6759                                 unsigned int bytes, struct x86_exception *exception)
6760 {
6761         /* kvm_write_guest_virt_system can pull in tons of pages. */
6762         vcpu->arch.l1tf_flush_l1d = true;
6763
6764         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6765                                            PFERR_WRITE_MASK, exception);
6766 }
6767 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6768
6769 int handle_ud(struct kvm_vcpu *vcpu)
6770 {
6771         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6772         int emul_type = EMULTYPE_TRAP_UD;
6773         char sig[5]; /* ud2; .ascii "kvm" */
6774         struct x86_exception e;
6775
6776         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6777                 return 1;
6778
6779         if (force_emulation_prefix &&
6780             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6781                                 sig, sizeof(sig), &e) == 0 &&
6782             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6783                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6784                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6785         }
6786
6787         return kvm_emulate_instruction(vcpu, emul_type);
6788 }
6789 EXPORT_SYMBOL_GPL(handle_ud);
6790
6791 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6792                             gpa_t gpa, bool write)
6793 {
6794         /* For APIC access vmexit */
6795         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6796                 return 1;
6797
6798         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6799                 trace_vcpu_match_mmio(gva, gpa, write, true);
6800                 return 1;
6801         }
6802
6803         return 0;
6804 }
6805
6806 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6807                                 gpa_t *gpa, struct x86_exception *exception,
6808                                 bool write)
6809 {
6810         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6811                 | (write ? PFERR_WRITE_MASK : 0);
6812
6813         /*
6814          * currently PKRU is only applied to ept enabled guest so
6815          * there is no pkey in EPT page table for L1 guest or EPT
6816          * shadow page table for L2 guest.
6817          */
6818         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6819             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6820                               vcpu->arch.mmio_access, 0, access))) {
6821                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6822                                         (gva & (PAGE_SIZE - 1));
6823                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6824                 return 1;
6825         }
6826
6827         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6828
6829         if (*gpa == UNMAPPED_GVA)
6830                 return -1;
6831
6832         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6833 }
6834
6835 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6836                         const void *val, int bytes)
6837 {
6838         int ret;
6839
6840         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6841         if (ret < 0)
6842                 return 0;
6843         kvm_page_track_write(vcpu, gpa, val, bytes);
6844         return 1;
6845 }
6846
6847 struct read_write_emulator_ops {
6848         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6849                                   int bytes);
6850         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6851                                   void *val, int bytes);
6852         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6853                                int bytes, void *val);
6854         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6855                                     void *val, int bytes);
6856         bool write;
6857 };
6858
6859 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6860 {
6861         if (vcpu->mmio_read_completed) {
6862                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6863                                vcpu->mmio_fragments[0].gpa, val);
6864                 vcpu->mmio_read_completed = 0;
6865                 return 1;
6866         }
6867
6868         return 0;
6869 }
6870
6871 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6872                         void *val, int bytes)
6873 {
6874         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6875 }
6876
6877 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6878                          void *val, int bytes)
6879 {
6880         return emulator_write_phys(vcpu, gpa, val, bytes);
6881 }
6882
6883 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6884 {
6885         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6886         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6887 }
6888
6889 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6890                           void *val, int bytes)
6891 {
6892         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6893         return X86EMUL_IO_NEEDED;
6894 }
6895
6896 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6897                            void *val, int bytes)
6898 {
6899         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6900
6901         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6902         return X86EMUL_CONTINUE;
6903 }
6904
6905 static const struct read_write_emulator_ops read_emultor = {
6906         .read_write_prepare = read_prepare,
6907         .read_write_emulate = read_emulate,
6908         .read_write_mmio = vcpu_mmio_read,
6909         .read_write_exit_mmio = read_exit_mmio,
6910 };
6911
6912 static const struct read_write_emulator_ops write_emultor = {
6913         .read_write_emulate = write_emulate,
6914         .read_write_mmio = write_mmio,
6915         .read_write_exit_mmio = write_exit_mmio,
6916         .write = true,
6917 };
6918
6919 static int emulator_read_write_onepage(unsigned long addr, void *val,
6920                                        unsigned int bytes,
6921                                        struct x86_exception *exception,
6922                                        struct kvm_vcpu *vcpu,
6923                                        const struct read_write_emulator_ops *ops)
6924 {
6925         gpa_t gpa;
6926         int handled, ret;
6927         bool write = ops->write;
6928         struct kvm_mmio_fragment *frag;
6929         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6930
6931         /*
6932          * If the exit was due to a NPF we may already have a GPA.
6933          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6934          * Note, this cannot be used on string operations since string
6935          * operation using rep will only have the initial GPA from the NPF
6936          * occurred.
6937          */
6938         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6939             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6940                 gpa = ctxt->gpa_val;
6941                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6942         } else {
6943                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6944                 if (ret < 0)
6945                         return X86EMUL_PROPAGATE_FAULT;
6946         }
6947
6948         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6949                 return X86EMUL_CONTINUE;
6950
6951         /*
6952          * Is this MMIO handled locally?
6953          */
6954         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6955         if (handled == bytes)
6956                 return X86EMUL_CONTINUE;
6957
6958         gpa += handled;
6959         bytes -= handled;
6960         val += handled;
6961
6962         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6963         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6964         frag->gpa = gpa;
6965         frag->data = val;
6966         frag->len = bytes;
6967         return X86EMUL_CONTINUE;
6968 }
6969
6970 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6971                         unsigned long addr,
6972                         void *val, unsigned int bytes,
6973                         struct x86_exception *exception,
6974                         const struct read_write_emulator_ops *ops)
6975 {
6976         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6977         gpa_t gpa;
6978         int rc;
6979
6980         if (ops->read_write_prepare &&
6981                   ops->read_write_prepare(vcpu, val, bytes))
6982                 return X86EMUL_CONTINUE;
6983
6984         vcpu->mmio_nr_fragments = 0;
6985
6986         /* Crossing a page boundary? */
6987         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6988                 int now;
6989
6990                 now = -addr & ~PAGE_MASK;
6991                 rc = emulator_read_write_onepage(addr, val, now, exception,
6992                                                  vcpu, ops);
6993
6994                 if (rc != X86EMUL_CONTINUE)
6995                         return rc;
6996                 addr += now;
6997                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6998                         addr = (u32)addr;
6999                 val += now;
7000                 bytes -= now;
7001         }
7002
7003         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7004                                          vcpu, ops);
7005         if (rc != X86EMUL_CONTINUE)
7006                 return rc;
7007
7008         if (!vcpu->mmio_nr_fragments)
7009                 return rc;
7010
7011         gpa = vcpu->mmio_fragments[0].gpa;
7012
7013         vcpu->mmio_needed = 1;
7014         vcpu->mmio_cur_fragment = 0;
7015
7016         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7017         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7018         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7019         vcpu->run->mmio.phys_addr = gpa;
7020
7021         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7022 }
7023
7024 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7025                                   unsigned long addr,
7026                                   void *val,
7027                                   unsigned int bytes,
7028                                   struct x86_exception *exception)
7029 {
7030         return emulator_read_write(ctxt, addr, val, bytes,
7031                                    exception, &read_emultor);
7032 }
7033
7034 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7035                             unsigned long addr,
7036                             const void *val,
7037                             unsigned int bytes,
7038                             struct x86_exception *exception)
7039 {
7040         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7041                                    exception, &write_emultor);
7042 }
7043
7044 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7045         (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7046
7047 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7048                                      unsigned long addr,
7049                                      const void *old,
7050                                      const void *new,
7051                                      unsigned int bytes,
7052                                      struct x86_exception *exception)
7053 {
7054         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7055         u64 page_line_mask;
7056         unsigned long hva;
7057         gpa_t gpa;
7058         int r;
7059
7060         /* guests cmpxchg8b have to be emulated atomically */
7061         if (bytes > 8 || (bytes & (bytes - 1)))
7062                 goto emul_write;
7063
7064         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7065
7066         if (gpa == UNMAPPED_GVA ||
7067             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7068                 goto emul_write;
7069
7070         /*
7071          * Emulate the atomic as a straight write to avoid #AC if SLD is
7072          * enabled in the host and the access splits a cache line.
7073          */
7074         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7075                 page_line_mask = ~(cache_line_size() - 1);
7076         else
7077                 page_line_mask = PAGE_MASK;
7078
7079         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7080                 goto emul_write;
7081
7082         hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7083         if (kvm_is_error_hva(hva))
7084                 goto emul_write;
7085
7086         hva += offset_in_page(gpa);
7087
7088         switch (bytes) {
7089         case 1:
7090                 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7091                 break;
7092         case 2:
7093                 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7094                 break;
7095         case 4:
7096                 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7097                 break;
7098         case 8:
7099                 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7100                 break;
7101         default:
7102                 BUG();
7103         }
7104
7105         if (r < 0)
7106                 goto emul_write;
7107         if (r)
7108                 return X86EMUL_CMPXCHG_FAILED;
7109
7110         kvm_page_track_write(vcpu, gpa, new, bytes);
7111
7112         return X86EMUL_CONTINUE;
7113
7114 emul_write:
7115         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7116
7117         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7118 }
7119
7120 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7121 {
7122         int r = 0, i;
7123
7124         for (i = 0; i < vcpu->arch.pio.count; i++) {
7125                 if (vcpu->arch.pio.in)
7126                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7127                                             vcpu->arch.pio.size, pd);
7128                 else
7129                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7130                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7131                                              pd);
7132                 if (r)
7133                         break;
7134                 pd += vcpu->arch.pio.size;
7135         }
7136         return r;
7137 }
7138
7139 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7140                                unsigned short port,
7141                                unsigned int count, bool in)
7142 {
7143         vcpu->arch.pio.port = port;
7144         vcpu->arch.pio.in = in;
7145         vcpu->arch.pio.count  = count;
7146         vcpu->arch.pio.size = size;
7147
7148         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7149                 return 1;
7150
7151         vcpu->run->exit_reason = KVM_EXIT_IO;
7152         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7153         vcpu->run->io.size = size;
7154         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7155         vcpu->run->io.count = count;
7156         vcpu->run->io.port = port;
7157
7158         return 0;
7159 }
7160
7161 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7162                              unsigned short port, unsigned int count)
7163 {
7164         WARN_ON(vcpu->arch.pio.count);
7165         memset(vcpu->arch.pio_data, 0, size * count);
7166         return emulator_pio_in_out(vcpu, size, port, count, true);
7167 }
7168
7169 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7170 {
7171         int size = vcpu->arch.pio.size;
7172         unsigned count = vcpu->arch.pio.count;
7173         memcpy(val, vcpu->arch.pio_data, size * count);
7174         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7175         vcpu->arch.pio.count = 0;
7176 }
7177
7178 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7179                            unsigned short port, void *val, unsigned int count)
7180 {
7181         if (vcpu->arch.pio.count) {
7182                 /*
7183                  * Complete a previous iteration that required userspace I/O.
7184                  * Note, @count isn't guaranteed to match pio.count as userspace
7185                  * can modify ECX before rerunning the vCPU.  Ignore any such
7186                  * shenanigans as KVM doesn't support modifying the rep count,
7187                  * and the emulator ensures @count doesn't overflow the buffer.
7188                  */
7189         } else {
7190                 int r = __emulator_pio_in(vcpu, size, port, count);
7191                 if (!r)
7192                         return r;
7193
7194                 /* Results already available, fall through.  */
7195         }
7196
7197         complete_emulator_pio_in(vcpu, val);
7198         return 1;
7199 }
7200
7201 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7202                                     int size, unsigned short port, void *val,
7203                                     unsigned int count)
7204 {
7205         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7206
7207 }
7208
7209 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7210                             unsigned short port, const void *val,
7211                             unsigned int count)
7212 {
7213         int ret;
7214
7215         memcpy(vcpu->arch.pio_data, val, size * count);
7216         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7217         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7218         if (ret)
7219                 vcpu->arch.pio.count = 0;
7220
7221         return ret;
7222 }
7223
7224 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7225                                      int size, unsigned short port,
7226                                      const void *val, unsigned int count)
7227 {
7228         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7229 }
7230
7231 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7232 {
7233         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7234 }
7235
7236 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7237 {
7238         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7239 }
7240
7241 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7242 {
7243         if (!need_emulate_wbinvd(vcpu))
7244                 return X86EMUL_CONTINUE;
7245
7246         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7247                 int cpu = get_cpu();
7248
7249                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7250                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7251                                 wbinvd_ipi, NULL, 1);
7252                 put_cpu();
7253                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7254         } else
7255                 wbinvd();
7256         return X86EMUL_CONTINUE;
7257 }
7258
7259 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7260 {
7261         kvm_emulate_wbinvd_noskip(vcpu);
7262         return kvm_skip_emulated_instruction(vcpu);
7263 }
7264 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7265
7266
7267
7268 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7269 {
7270         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7271 }
7272
7273 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7274                             unsigned long *dest)
7275 {
7276         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7277 }
7278
7279 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7280                            unsigned long value)
7281 {
7282
7283         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7284 }
7285
7286 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7287 {
7288         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7289 }
7290
7291 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7292 {
7293         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7294         unsigned long value;
7295
7296         switch (cr) {
7297         case 0:
7298                 value = kvm_read_cr0(vcpu);
7299                 break;
7300         case 2:
7301                 value = vcpu->arch.cr2;
7302                 break;
7303         case 3:
7304                 value = kvm_read_cr3(vcpu);
7305                 break;
7306         case 4:
7307                 value = kvm_read_cr4(vcpu);
7308                 break;
7309         case 8:
7310                 value = kvm_get_cr8(vcpu);
7311                 break;
7312         default:
7313                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7314                 return 0;
7315         }
7316
7317         return value;
7318 }
7319
7320 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7321 {
7322         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7323         int res = 0;
7324
7325         switch (cr) {
7326         case 0:
7327                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7328                 break;
7329         case 2:
7330                 vcpu->arch.cr2 = val;
7331                 break;
7332         case 3:
7333                 res = kvm_set_cr3(vcpu, val);
7334                 break;
7335         case 4:
7336                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7337                 break;
7338         case 8:
7339                 res = kvm_set_cr8(vcpu, val);
7340                 break;
7341         default:
7342                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7343                 res = -1;
7344         }
7345
7346         return res;
7347 }
7348
7349 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7350 {
7351         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7352 }
7353
7354 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7355 {
7356         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7357 }
7358
7359 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7360 {
7361         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7362 }
7363
7364 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7365 {
7366         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7367 }
7368
7369 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7370 {
7371         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7372 }
7373
7374 static unsigned long emulator_get_cached_segment_base(
7375         struct x86_emulate_ctxt *ctxt, int seg)
7376 {
7377         return get_segment_base(emul_to_vcpu(ctxt), seg);
7378 }
7379
7380 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7381                                  struct desc_struct *desc, u32 *base3,
7382                                  int seg)
7383 {
7384         struct kvm_segment var;
7385
7386         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7387         *selector = var.selector;
7388
7389         if (var.unusable) {
7390                 memset(desc, 0, sizeof(*desc));
7391                 if (base3)
7392                         *base3 = 0;
7393                 return false;
7394         }
7395
7396         if (var.g)
7397                 var.limit >>= 12;
7398         set_desc_limit(desc, var.limit);
7399         set_desc_base(desc, (unsigned long)var.base);
7400 #ifdef CONFIG_X86_64
7401         if (base3)
7402                 *base3 = var.base >> 32;
7403 #endif
7404         desc->type = var.type;
7405         desc->s = var.s;
7406         desc->dpl = var.dpl;
7407         desc->p = var.present;
7408         desc->avl = var.avl;
7409         desc->l = var.l;
7410         desc->d = var.db;
7411         desc->g = var.g;
7412
7413         return true;
7414 }
7415
7416 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7417                                  struct desc_struct *desc, u32 base3,
7418                                  int seg)
7419 {
7420         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7421         struct kvm_segment var;
7422
7423         var.selector = selector;
7424         var.base = get_desc_base(desc);
7425 #ifdef CONFIG_X86_64
7426         var.base |= ((u64)base3) << 32;
7427 #endif
7428         var.limit = get_desc_limit(desc);
7429         if (desc->g)
7430                 var.limit = (var.limit << 12) | 0xfff;
7431         var.type = desc->type;
7432         var.dpl = desc->dpl;
7433         var.db = desc->d;
7434         var.s = desc->s;
7435         var.l = desc->l;
7436         var.g = desc->g;
7437         var.avl = desc->avl;
7438         var.present = desc->p;
7439         var.unusable = !var.present;
7440         var.padding = 0;
7441
7442         kvm_set_segment(vcpu, &var, seg);
7443         return;
7444 }
7445
7446 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7447                             u32 msr_index, u64 *pdata)
7448 {
7449         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7450         int r;
7451
7452         r = kvm_get_msr(vcpu, msr_index, pdata);
7453
7454         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7455                 /* Bounce to user space */
7456                 return X86EMUL_IO_NEEDED;
7457         }
7458
7459         return r;
7460 }
7461
7462 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7463                             u32 msr_index, u64 data)
7464 {
7465         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7466         int r;
7467
7468         r = kvm_set_msr(vcpu, msr_index, data);
7469
7470         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7471                 /* Bounce to user space */
7472                 return X86EMUL_IO_NEEDED;
7473         }
7474
7475         return r;
7476 }
7477
7478 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7479 {
7480         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7481
7482         return vcpu->arch.smbase;
7483 }
7484
7485 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7486 {
7487         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7488
7489         vcpu->arch.smbase = smbase;
7490 }
7491
7492 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7493                               u32 pmc)
7494 {
7495         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7496 }
7497
7498 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7499                              u32 pmc, u64 *pdata)
7500 {
7501         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7502 }
7503
7504 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7505 {
7506         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7507 }
7508
7509 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7510                               struct x86_instruction_info *info,
7511                               enum x86_intercept_stage stage)
7512 {
7513         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7514                                             &ctxt->exception);
7515 }
7516
7517 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7518                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7519                               bool exact_only)
7520 {
7521         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7522 }
7523
7524 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7525 {
7526         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7527 }
7528
7529 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7530 {
7531         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7532 }
7533
7534 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7535 {
7536         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7537 }
7538
7539 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7540 {
7541         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7542 }
7543
7544 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7545 {
7546         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7547 }
7548
7549 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7550 {
7551         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7552 }
7553
7554 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7555 {
7556         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7557 }
7558
7559 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7560 {
7561         return emul_to_vcpu(ctxt)->arch.hflags;
7562 }
7563
7564 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7565 {
7566         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7567
7568         kvm_smm_changed(vcpu, false);
7569 }
7570
7571 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7572                                   const char *smstate)
7573 {
7574         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7575 }
7576
7577 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7578 {
7579         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7580 }
7581
7582 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7583 {
7584         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7585 }
7586
7587 static const struct x86_emulate_ops emulate_ops = {
7588         .read_gpr            = emulator_read_gpr,
7589         .write_gpr           = emulator_write_gpr,
7590         .read_std            = emulator_read_std,
7591         .write_std           = emulator_write_std,
7592         .read_phys           = kvm_read_guest_phys_system,
7593         .fetch               = kvm_fetch_guest_virt,
7594         .read_emulated       = emulator_read_emulated,
7595         .write_emulated      = emulator_write_emulated,
7596         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7597         .invlpg              = emulator_invlpg,
7598         .pio_in_emulated     = emulator_pio_in_emulated,
7599         .pio_out_emulated    = emulator_pio_out_emulated,
7600         .get_segment         = emulator_get_segment,
7601         .set_segment         = emulator_set_segment,
7602         .get_cached_segment_base = emulator_get_cached_segment_base,
7603         .get_gdt             = emulator_get_gdt,
7604         .get_idt             = emulator_get_idt,
7605         .set_gdt             = emulator_set_gdt,
7606         .set_idt             = emulator_set_idt,
7607         .get_cr              = emulator_get_cr,
7608         .set_cr              = emulator_set_cr,
7609         .cpl                 = emulator_get_cpl,
7610         .get_dr              = emulator_get_dr,
7611         .set_dr              = emulator_set_dr,
7612         .get_smbase          = emulator_get_smbase,
7613         .set_smbase          = emulator_set_smbase,
7614         .set_msr             = emulator_set_msr,
7615         .get_msr             = emulator_get_msr,
7616         .check_pmc           = emulator_check_pmc,
7617         .read_pmc            = emulator_read_pmc,
7618         .halt                = emulator_halt,
7619         .wbinvd              = emulator_wbinvd,
7620         .fix_hypercall       = emulator_fix_hypercall,
7621         .intercept           = emulator_intercept,
7622         .get_cpuid           = emulator_get_cpuid,
7623         .guest_has_long_mode = emulator_guest_has_long_mode,
7624         .guest_has_movbe     = emulator_guest_has_movbe,
7625         .guest_has_fxsr      = emulator_guest_has_fxsr,
7626         .guest_has_rdpid     = emulator_guest_has_rdpid,
7627         .set_nmi_mask        = emulator_set_nmi_mask,
7628         .get_hflags          = emulator_get_hflags,
7629         .exiting_smm         = emulator_exiting_smm,
7630         .leave_smm           = emulator_leave_smm,
7631         .triple_fault        = emulator_triple_fault,
7632         .set_xcr             = emulator_set_xcr,
7633 };
7634
7635 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7636 {
7637         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7638         /*
7639          * an sti; sti; sequence only disable interrupts for the first
7640          * instruction. So, if the last instruction, be it emulated or
7641          * not, left the system with the INT_STI flag enabled, it
7642          * means that the last instruction is an sti. We should not
7643          * leave the flag on in this case. The same goes for mov ss
7644          */
7645         if (int_shadow & mask)
7646                 mask = 0;
7647         if (unlikely(int_shadow || mask)) {
7648                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7649                 if (!mask)
7650                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7651         }
7652 }
7653
7654 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7655 {
7656         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7657         if (ctxt->exception.vector == PF_VECTOR)
7658                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7659
7660         if (ctxt->exception.error_code_valid)
7661                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7662                                       ctxt->exception.error_code);
7663         else
7664                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7665         return false;
7666 }
7667
7668 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7669 {
7670         struct x86_emulate_ctxt *ctxt;
7671
7672         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7673         if (!ctxt) {
7674                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7675                 return NULL;
7676         }
7677
7678         ctxt->vcpu = vcpu;
7679         ctxt->ops = &emulate_ops;
7680         vcpu->arch.emulate_ctxt = ctxt;
7681
7682         return ctxt;
7683 }
7684
7685 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7686 {
7687         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7688         int cs_db, cs_l;
7689
7690         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7691
7692         ctxt->gpa_available = false;
7693         ctxt->eflags = kvm_get_rflags(vcpu);
7694         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7695
7696         ctxt->eip = kvm_rip_read(vcpu);
7697         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7698                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7699                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7700                      cs_db                              ? X86EMUL_MODE_PROT32 :
7701                                                           X86EMUL_MODE_PROT16;
7702         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7703         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7704         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7705
7706         ctxt->interruptibility = 0;
7707         ctxt->have_exception = false;
7708         ctxt->exception.vector = -1;
7709         ctxt->perm_ok = false;
7710
7711         init_decode_cache(ctxt);
7712         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7713 }
7714
7715 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7716 {
7717         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7718         int ret;
7719
7720         init_emulate_ctxt(vcpu);
7721
7722         ctxt->op_bytes = 2;
7723         ctxt->ad_bytes = 2;
7724         ctxt->_eip = ctxt->eip + inc_eip;
7725         ret = emulate_int_real(ctxt, irq);
7726
7727         if (ret != X86EMUL_CONTINUE) {
7728                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7729         } else {
7730                 ctxt->eip = ctxt->_eip;
7731                 kvm_rip_write(vcpu, ctxt->eip);
7732                 kvm_set_rflags(vcpu, ctxt->eflags);
7733         }
7734 }
7735 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7736
7737 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7738 {
7739         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7740         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7741         struct kvm_run *run = vcpu->run;
7742
7743         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7744         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7745         run->emulation_failure.ndata = 0;
7746         run->emulation_failure.flags = 0;
7747
7748         if (insn_size) {
7749                 run->emulation_failure.ndata = 3;
7750                 run->emulation_failure.flags |=
7751                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7752                 run->emulation_failure.insn_size = insn_size;
7753                 memset(run->emulation_failure.insn_bytes, 0x90,
7754                        sizeof(run->emulation_failure.insn_bytes));
7755                 memcpy(run->emulation_failure.insn_bytes,
7756                        ctxt->fetch.data, insn_size);
7757         }
7758 }
7759
7760 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7761 {
7762         struct kvm *kvm = vcpu->kvm;
7763
7764         ++vcpu->stat.insn_emulation_fail;
7765         trace_kvm_emulate_insn_failed(vcpu);
7766
7767         if (emulation_type & EMULTYPE_VMWARE_GP) {
7768                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7769                 return 1;
7770         }
7771
7772         if (kvm->arch.exit_on_emulation_error ||
7773             (emulation_type & EMULTYPE_SKIP)) {
7774                 prepare_emulation_failure_exit(vcpu);
7775                 return 0;
7776         }
7777
7778         kvm_queue_exception(vcpu, UD_VECTOR);
7779
7780         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7781                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7782                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7783                 vcpu->run->internal.ndata = 0;
7784                 return 0;
7785         }
7786
7787         return 1;
7788 }
7789
7790 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7791                                   bool write_fault_to_shadow_pgtable,
7792                                   int emulation_type)
7793 {
7794         gpa_t gpa = cr2_or_gpa;
7795         kvm_pfn_t pfn;
7796
7797         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7798                 return false;
7799
7800         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7801             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7802                 return false;
7803
7804         if (!vcpu->arch.mmu->direct_map) {
7805                 /*
7806                  * Write permission should be allowed since only
7807                  * write access need to be emulated.
7808                  */
7809                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7810
7811                 /*
7812                  * If the mapping is invalid in guest, let cpu retry
7813                  * it to generate fault.
7814                  */
7815                 if (gpa == UNMAPPED_GVA)
7816                         return true;
7817         }
7818
7819         /*
7820          * Do not retry the unhandleable instruction if it faults on the
7821          * readonly host memory, otherwise it will goto a infinite loop:
7822          * retry instruction -> write #PF -> emulation fail -> retry
7823          * instruction -> ...
7824          */
7825         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7826
7827         /*
7828          * If the instruction failed on the error pfn, it can not be fixed,
7829          * report the error to userspace.
7830          */
7831         if (is_error_noslot_pfn(pfn))
7832                 return false;
7833
7834         kvm_release_pfn_clean(pfn);
7835
7836         /* The instructions are well-emulated on direct mmu. */
7837         if (vcpu->arch.mmu->direct_map) {
7838                 unsigned int indirect_shadow_pages;
7839
7840                 write_lock(&vcpu->kvm->mmu_lock);
7841                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7842                 write_unlock(&vcpu->kvm->mmu_lock);
7843
7844                 if (indirect_shadow_pages)
7845                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7846
7847                 return true;
7848         }
7849
7850         /*
7851          * if emulation was due to access to shadowed page table
7852          * and it failed try to unshadow page and re-enter the
7853          * guest to let CPU execute the instruction.
7854          */
7855         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7856
7857         /*
7858          * If the access faults on its page table, it can not
7859          * be fixed by unprotecting shadow page and it should
7860          * be reported to userspace.
7861          */
7862         return !write_fault_to_shadow_pgtable;
7863 }
7864
7865 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7866                               gpa_t cr2_or_gpa,  int emulation_type)
7867 {
7868         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7869         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7870
7871         last_retry_eip = vcpu->arch.last_retry_eip;
7872         last_retry_addr = vcpu->arch.last_retry_addr;
7873
7874         /*
7875          * If the emulation is caused by #PF and it is non-page_table
7876          * writing instruction, it means the VM-EXIT is caused by shadow
7877          * page protected, we can zap the shadow page and retry this
7878          * instruction directly.
7879          *
7880          * Note: if the guest uses a non-page-table modifying instruction
7881          * on the PDE that points to the instruction, then we will unmap
7882          * the instruction and go to an infinite loop. So, we cache the
7883          * last retried eip and the last fault address, if we meet the eip
7884          * and the address again, we can break out of the potential infinite
7885          * loop.
7886          */
7887         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7888
7889         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7890                 return false;
7891
7892         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7893             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7894                 return false;
7895
7896         if (x86_page_table_writing_insn(ctxt))
7897                 return false;
7898
7899         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7900                 return false;
7901
7902         vcpu->arch.last_retry_eip = ctxt->eip;
7903         vcpu->arch.last_retry_addr = cr2_or_gpa;
7904
7905         if (!vcpu->arch.mmu->direct_map)
7906                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7907
7908         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7909
7910         return true;
7911 }
7912
7913 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7914 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7915
7916 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7917 {
7918         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7919
7920         if (entering_smm) {
7921                 vcpu->arch.hflags |= HF_SMM_MASK;
7922         } else {
7923                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7924
7925                 /* Process a latched INIT or SMI, if any.  */
7926                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7927
7928                 /*
7929                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7930                  * on SMM exit we still need to reload them from
7931                  * guest memory
7932                  */
7933                 vcpu->arch.pdptrs_from_userspace = false;
7934         }
7935
7936         kvm_mmu_reset_context(vcpu);
7937 }
7938
7939 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7940                                 unsigned long *db)
7941 {
7942         u32 dr6 = 0;
7943         int i;
7944         u32 enable, rwlen;
7945
7946         enable = dr7;
7947         rwlen = dr7 >> 16;
7948         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7949                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7950                         dr6 |= (1 << i);
7951         return dr6;
7952 }
7953
7954 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7955 {
7956         struct kvm_run *kvm_run = vcpu->run;
7957
7958         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7959                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7960                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7961                 kvm_run->debug.arch.exception = DB_VECTOR;
7962                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7963                 return 0;
7964         }
7965         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7966         return 1;
7967 }
7968
7969 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7970 {
7971         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7972         int r;
7973
7974         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7975         if (unlikely(!r))
7976                 return 0;
7977
7978         /*
7979          * rflags is the old, "raw" value of the flags.  The new value has
7980          * not been saved yet.
7981          *
7982          * This is correct even for TF set by the guest, because "the
7983          * processor will not generate this exception after the instruction
7984          * that sets the TF flag".
7985          */
7986         if (unlikely(rflags & X86_EFLAGS_TF))
7987                 r = kvm_vcpu_do_singlestep(vcpu);
7988         return r;
7989 }
7990 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7991
7992 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
7993 {
7994         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7995             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7996                 struct kvm_run *kvm_run = vcpu->run;
7997                 unsigned long eip = kvm_get_linear_rip(vcpu);
7998                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7999                                            vcpu->arch.guest_debug_dr7,
8000                                            vcpu->arch.eff_db);
8001
8002                 if (dr6 != 0) {
8003                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8004                         kvm_run->debug.arch.pc = eip;
8005                         kvm_run->debug.arch.exception = DB_VECTOR;
8006                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8007                         *r = 0;
8008                         return true;
8009                 }
8010         }
8011
8012         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8013             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8014                 unsigned long eip = kvm_get_linear_rip(vcpu);
8015                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8016                                            vcpu->arch.dr7,
8017                                            vcpu->arch.db);
8018
8019                 if (dr6 != 0) {
8020                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8021                         *r = 1;
8022                         return true;
8023                 }
8024         }
8025
8026         return false;
8027 }
8028
8029 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8030 {
8031         switch (ctxt->opcode_len) {
8032         case 1:
8033                 switch (ctxt->b) {
8034                 case 0xe4:      /* IN */
8035                 case 0xe5:
8036                 case 0xec:
8037                 case 0xed:
8038                 case 0xe6:      /* OUT */
8039                 case 0xe7:
8040                 case 0xee:
8041                 case 0xef:
8042                 case 0x6c:      /* INS */
8043                 case 0x6d:
8044                 case 0x6e:      /* OUTS */
8045                 case 0x6f:
8046                         return true;
8047                 }
8048                 break;
8049         case 2:
8050                 switch (ctxt->b) {
8051                 case 0x33:      /* RDPMC */
8052                         return true;
8053                 }
8054                 break;
8055         }
8056
8057         return false;
8058 }
8059
8060 /*
8061  * Decode an instruction for emulation.  The caller is responsible for handling
8062  * code breakpoints.  Note, manually detecting code breakpoints is unnecessary
8063  * (and wrong) when emulating on an intercepted fault-like exception[*], as
8064  * code breakpoints have higher priority and thus have already been done by
8065  * hardware.
8066  *
8067  * [*] Except #MC, which is higher priority, but KVM should never emulate in
8068  *     response to a machine check.
8069  */
8070 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8071                                     void *insn, int insn_len)
8072 {
8073         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8074         int r;
8075
8076         init_emulate_ctxt(vcpu);
8077
8078         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8079
8080         trace_kvm_emulate_insn_start(vcpu);
8081         ++vcpu->stat.insn_emulation;
8082
8083         return r;
8084 }
8085 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8086
8087 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8088                             int emulation_type, void *insn, int insn_len)
8089 {
8090         int r;
8091         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8092         bool writeback = true;
8093         bool write_fault_to_spt;
8094
8095         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
8096                 return 1;
8097
8098         vcpu->arch.l1tf_flush_l1d = true;
8099
8100         /*
8101          * Clear write_fault_to_shadow_pgtable here to ensure it is
8102          * never reused.
8103          */
8104         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8105         vcpu->arch.write_fault_to_shadow_pgtable = false;
8106
8107         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8108                 kvm_clear_exception_queue(vcpu);
8109
8110                 /*
8111                  * Return immediately if RIP hits a code breakpoint, such #DBs
8112                  * are fault-like and are higher priority than any faults on
8113                  * the code fetch itself.
8114                  */
8115                 if (!(emulation_type & EMULTYPE_SKIP) &&
8116                     kvm_vcpu_check_code_breakpoint(vcpu, &r))
8117                         return r;
8118
8119                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8120                                                     insn, insn_len);
8121                 if (r != EMULATION_OK)  {
8122                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8123                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8124                                 kvm_queue_exception(vcpu, UD_VECTOR);
8125                                 return 1;
8126                         }
8127                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8128                                                   write_fault_to_spt,
8129                                                   emulation_type))
8130                                 return 1;
8131
8132                         if (ctxt->have_exception &&
8133                             !(emulation_type & EMULTYPE_SKIP)) {
8134                                 /*
8135                                  * #UD should result in just EMULATION_FAILED, and trap-like
8136                                  * exception should not be encountered during decode.
8137                                  */
8138                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8139                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8140                                 inject_emulated_exception(vcpu);
8141                                 return 1;
8142                         }
8143                         return handle_emulation_failure(vcpu, emulation_type);
8144                 }
8145         }
8146
8147         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8148             !is_vmware_backdoor_opcode(ctxt)) {
8149                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8150                 return 1;
8151         }
8152
8153         /*
8154          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8155          * for kvm_skip_emulated_instruction().  The caller is responsible for
8156          * updating interruptibility state and injecting single-step #DBs.
8157          */
8158         if (emulation_type & EMULTYPE_SKIP) {
8159                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8160                         ctxt->eip = (u32)ctxt->_eip;
8161                 else
8162                         ctxt->eip = ctxt->_eip;
8163
8164                 kvm_rip_write(vcpu, ctxt->eip);
8165                 if (ctxt->eflags & X86_EFLAGS_RF)
8166                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8167                 return 1;
8168         }
8169
8170         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8171                 return 1;
8172
8173         /* this is needed for vmware backdoor interface to work since it
8174            changes registers values  during IO operation */
8175         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8176                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8177                 emulator_invalidate_register_cache(ctxt);
8178         }
8179
8180 restart:
8181         if (emulation_type & EMULTYPE_PF) {
8182                 /* Save the faulting GPA (cr2) in the address field */
8183                 ctxt->exception.address = cr2_or_gpa;
8184
8185                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8186                 if (vcpu->arch.mmu->direct_map) {
8187                         ctxt->gpa_available = true;
8188                         ctxt->gpa_val = cr2_or_gpa;
8189                 }
8190         } else {
8191                 /* Sanitize the address out of an abundance of paranoia. */
8192                 ctxt->exception.address = 0;
8193         }
8194
8195         r = x86_emulate_insn(ctxt);
8196
8197         if (r == EMULATION_INTERCEPTED)
8198                 return 1;
8199
8200         if (r == EMULATION_FAILED) {
8201                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8202                                         emulation_type))
8203                         return 1;
8204
8205                 return handle_emulation_failure(vcpu, emulation_type);
8206         }
8207
8208         if (ctxt->have_exception) {
8209                 r = 1;
8210                 if (inject_emulated_exception(vcpu))
8211                         return r;
8212         } else if (vcpu->arch.pio.count) {
8213                 if (!vcpu->arch.pio.in) {
8214                         /* FIXME: return into emulator if single-stepping.  */
8215                         vcpu->arch.pio.count = 0;
8216                 } else {
8217                         writeback = false;
8218                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8219                 }
8220                 r = 0;
8221         } else if (vcpu->mmio_needed) {
8222                 ++vcpu->stat.mmio_exits;
8223
8224                 if (!vcpu->mmio_is_write)
8225                         writeback = false;
8226                 r = 0;
8227                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8228         } else if (vcpu->arch.complete_userspace_io) {
8229                 writeback = false;
8230                 r = 0;
8231         } else if (r == EMULATION_RESTART)
8232                 goto restart;
8233         else
8234                 r = 1;
8235
8236         if (writeback) {
8237                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8238                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8239                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8240
8241                 /*
8242                  * Note, EXCPT_DB is assumed to be fault-like as the emulator
8243                  * only supports code breakpoints and general detect #DB, both
8244                  * of which are fault-like.
8245                  */
8246                 if (!ctxt->have_exception ||
8247                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8248                         kvm_rip_write(vcpu, ctxt->eip);
8249                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8250                                 r = kvm_vcpu_do_singlestep(vcpu);
8251                         if (kvm_x86_ops.update_emulated_instruction)
8252                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8253                         __kvm_set_rflags(vcpu, ctxt->eflags);
8254                 }
8255
8256                 /*
8257                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8258                  * do nothing, and it will be requested again as soon as
8259                  * the shadow expires.  But we still need to check here,
8260                  * because POPF has no interrupt shadow.
8261                  */
8262                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8263                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8264         } else
8265                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8266
8267         return r;
8268 }
8269
8270 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8271 {
8272         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8273 }
8274 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8275
8276 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8277                                         void *insn, int insn_len)
8278 {
8279         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8280 }
8281 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8282
8283 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8284 {
8285         vcpu->arch.pio.count = 0;
8286         return 1;
8287 }
8288
8289 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8290 {
8291         vcpu->arch.pio.count = 0;
8292
8293         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8294                 return 1;
8295
8296         return kvm_skip_emulated_instruction(vcpu);
8297 }
8298
8299 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8300                             unsigned short port)
8301 {
8302         unsigned long val = kvm_rax_read(vcpu);
8303         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8304
8305         if (ret)
8306                 return ret;
8307
8308         /*
8309          * Workaround userspace that relies on old KVM behavior of %rip being
8310          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8311          */
8312         if (port == 0x7e &&
8313             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8314                 vcpu->arch.complete_userspace_io =
8315                         complete_fast_pio_out_port_0x7e;
8316                 kvm_skip_emulated_instruction(vcpu);
8317         } else {
8318                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8319                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8320         }
8321         return 0;
8322 }
8323
8324 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8325 {
8326         unsigned long val;
8327
8328         /* We should only ever be called with arch.pio.count equal to 1 */
8329         BUG_ON(vcpu->arch.pio.count != 1);
8330
8331         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8332                 vcpu->arch.pio.count = 0;
8333                 return 1;
8334         }
8335
8336         /* For size less than 4 we merge, else we zero extend */
8337         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8338
8339         /*
8340          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8341          * the copy and tracing
8342          */
8343         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8344         kvm_rax_write(vcpu, val);
8345
8346         return kvm_skip_emulated_instruction(vcpu);
8347 }
8348
8349 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8350                            unsigned short port)
8351 {
8352         unsigned long val;
8353         int ret;
8354
8355         /* For size less than 4 we merge, else we zero extend */
8356         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8357
8358         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8359         if (ret) {
8360                 kvm_rax_write(vcpu, val);
8361                 return ret;
8362         }
8363
8364         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8365         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8366
8367         return 0;
8368 }
8369
8370 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8371 {
8372         int ret;
8373
8374         if (in)
8375                 ret = kvm_fast_pio_in(vcpu, size, port);
8376         else
8377                 ret = kvm_fast_pio_out(vcpu, size, port);
8378         return ret && kvm_skip_emulated_instruction(vcpu);
8379 }
8380 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8381
8382 static int kvmclock_cpu_down_prep(unsigned int cpu)
8383 {
8384         __this_cpu_write(cpu_tsc_khz, 0);
8385         return 0;
8386 }
8387
8388 static void tsc_khz_changed(void *data)
8389 {
8390         struct cpufreq_freqs *freq = data;
8391         unsigned long khz = 0;
8392
8393         if (data)
8394                 khz = freq->new;
8395         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8396                 khz = cpufreq_quick_get(raw_smp_processor_id());
8397         if (!khz)
8398                 khz = tsc_khz;
8399         __this_cpu_write(cpu_tsc_khz, khz);
8400 }
8401
8402 #ifdef CONFIG_X86_64
8403 static void kvm_hyperv_tsc_notifier(void)
8404 {
8405         struct kvm *kvm;
8406         struct kvm_vcpu *vcpu;
8407         int cpu;
8408         unsigned long flags;
8409
8410         mutex_lock(&kvm_lock);
8411         list_for_each_entry(kvm, &vm_list, vm_list)
8412                 kvm_make_mclock_inprogress_request(kvm);
8413
8414         hyperv_stop_tsc_emulation();
8415
8416         /* TSC frequency always matches when on Hyper-V */
8417         for_each_present_cpu(cpu)
8418                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8419         kvm_max_guest_tsc_khz = tsc_khz;
8420
8421         list_for_each_entry(kvm, &vm_list, vm_list) {
8422                 struct kvm_arch *ka = &kvm->arch;
8423
8424                 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8425                 pvclock_update_vm_gtod_copy(kvm);
8426                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8427
8428                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8429                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8430
8431                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8432                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8433         }
8434         mutex_unlock(&kvm_lock);
8435 }
8436 #endif
8437
8438 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8439 {
8440         struct kvm *kvm;
8441         struct kvm_vcpu *vcpu;
8442         int i, send_ipi = 0;
8443
8444         /*
8445          * We allow guests to temporarily run on slowing clocks,
8446          * provided we notify them after, or to run on accelerating
8447          * clocks, provided we notify them before.  Thus time never
8448          * goes backwards.
8449          *
8450          * However, we have a problem.  We can't atomically update
8451          * the frequency of a given CPU from this function; it is
8452          * merely a notifier, which can be called from any CPU.
8453          * Changing the TSC frequency at arbitrary points in time
8454          * requires a recomputation of local variables related to
8455          * the TSC for each VCPU.  We must flag these local variables
8456          * to be updated and be sure the update takes place with the
8457          * new frequency before any guests proceed.
8458          *
8459          * Unfortunately, the combination of hotplug CPU and frequency
8460          * change creates an intractable locking scenario; the order
8461          * of when these callouts happen is undefined with respect to
8462          * CPU hotplug, and they can race with each other.  As such,
8463          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8464          * undefined; you can actually have a CPU frequency change take
8465          * place in between the computation of X and the setting of the
8466          * variable.  To protect against this problem, all updates of
8467          * the per_cpu tsc_khz variable are done in an interrupt
8468          * protected IPI, and all callers wishing to update the value
8469          * must wait for a synchronous IPI to complete (which is trivial
8470          * if the caller is on the CPU already).  This establishes the
8471          * necessary total order on variable updates.
8472          *
8473          * Note that because a guest time update may take place
8474          * anytime after the setting of the VCPU's request bit, the
8475          * correct TSC value must be set before the request.  However,
8476          * to ensure the update actually makes it to any guest which
8477          * starts running in hardware virtualization between the set
8478          * and the acquisition of the spinlock, we must also ping the
8479          * CPU after setting the request bit.
8480          *
8481          */
8482
8483         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8484
8485         mutex_lock(&kvm_lock);
8486         list_for_each_entry(kvm, &vm_list, vm_list) {
8487                 kvm_for_each_vcpu(i, vcpu, kvm) {
8488                         if (vcpu->cpu != cpu)
8489                                 continue;
8490                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8491                         if (vcpu->cpu != raw_smp_processor_id())
8492                                 send_ipi = 1;
8493                 }
8494         }
8495         mutex_unlock(&kvm_lock);
8496
8497         if (freq->old < freq->new && send_ipi) {
8498                 /*
8499                  * We upscale the frequency.  Must make the guest
8500                  * doesn't see old kvmclock values while running with
8501                  * the new frequency, otherwise we risk the guest sees
8502                  * time go backwards.
8503                  *
8504                  * In case we update the frequency for another cpu
8505                  * (which might be in guest context) send an interrupt
8506                  * to kick the cpu out of guest context.  Next time
8507                  * guest context is entered kvmclock will be updated,
8508                  * so the guest will not see stale values.
8509                  */
8510                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8511         }
8512 }
8513
8514 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8515                                      void *data)
8516 {
8517         struct cpufreq_freqs *freq = data;
8518         int cpu;
8519
8520         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8521                 return 0;
8522         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8523                 return 0;
8524
8525         for_each_cpu(cpu, freq->policy->cpus)
8526                 __kvmclock_cpufreq_notifier(freq, cpu);
8527
8528         return 0;
8529 }
8530
8531 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8532         .notifier_call  = kvmclock_cpufreq_notifier
8533 };
8534
8535 static int kvmclock_cpu_online(unsigned int cpu)
8536 {
8537         tsc_khz_changed(NULL);
8538         return 0;
8539 }
8540
8541 static void kvm_timer_init(void)
8542 {
8543         max_tsc_khz = tsc_khz;
8544
8545         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8546 #ifdef CONFIG_CPU_FREQ
8547                 struct cpufreq_policy *policy;
8548                 int cpu;
8549
8550                 cpu = get_cpu();
8551                 policy = cpufreq_cpu_get(cpu);
8552                 if (policy) {
8553                         if (policy->cpuinfo.max_freq)
8554                                 max_tsc_khz = policy->cpuinfo.max_freq;
8555                         cpufreq_cpu_put(policy);
8556                 }
8557                 put_cpu();
8558 #endif
8559                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8560                                           CPUFREQ_TRANSITION_NOTIFIER);
8561         }
8562
8563         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8564                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8565 }
8566
8567 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8568 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8569
8570 int kvm_is_in_guest(void)
8571 {
8572         return __this_cpu_read(current_vcpu) != NULL;
8573 }
8574
8575 static int kvm_is_user_mode(void)
8576 {
8577         int user_mode = 3;
8578
8579         if (__this_cpu_read(current_vcpu))
8580                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8581
8582         return user_mode != 0;
8583 }
8584
8585 static unsigned long kvm_get_guest_ip(void)
8586 {
8587         unsigned long ip = 0;
8588
8589         if (__this_cpu_read(current_vcpu))
8590                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8591
8592         return ip;
8593 }
8594
8595 static void kvm_handle_intel_pt_intr(void)
8596 {
8597         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8598
8599         kvm_make_request(KVM_REQ_PMI, vcpu);
8600         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8601                         (unsigned long *)&vcpu->arch.pmu.global_status);
8602 }
8603
8604 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8605         .is_in_guest            = kvm_is_in_guest,
8606         .is_user_mode           = kvm_is_user_mode,
8607         .get_guest_ip           = kvm_get_guest_ip,
8608         .handle_intel_pt_intr   = NULL,
8609 };
8610
8611 #ifdef CONFIG_X86_64
8612 static void pvclock_gtod_update_fn(struct work_struct *work)
8613 {
8614         struct kvm *kvm;
8615
8616         struct kvm_vcpu *vcpu;
8617         int i;
8618
8619         mutex_lock(&kvm_lock);
8620         list_for_each_entry(kvm, &vm_list, vm_list)
8621                 kvm_for_each_vcpu(i, vcpu, kvm)
8622                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8623         atomic_set(&kvm_guest_has_master_clock, 0);
8624         mutex_unlock(&kvm_lock);
8625 }
8626
8627 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8628
8629 /*
8630  * Indirection to move queue_work() out of the tk_core.seq write held
8631  * region to prevent possible deadlocks against time accessors which
8632  * are invoked with work related locks held.
8633  */
8634 static void pvclock_irq_work_fn(struct irq_work *w)
8635 {
8636         queue_work(system_long_wq, &pvclock_gtod_work);
8637 }
8638
8639 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8640
8641 /*
8642  * Notification about pvclock gtod data update.
8643  */
8644 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8645                                void *priv)
8646 {
8647         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8648         struct timekeeper *tk = priv;
8649
8650         update_pvclock_gtod(tk);
8651
8652         /*
8653          * Disable master clock if host does not trust, or does not use,
8654          * TSC based clocksource. Delegate queue_work() to irq_work as
8655          * this is invoked with tk_core.seq write held.
8656          */
8657         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8658             atomic_read(&kvm_guest_has_master_clock) != 0)
8659                 irq_work_queue(&pvclock_irq_work);
8660         return 0;
8661 }
8662
8663 static struct notifier_block pvclock_gtod_notifier = {
8664         .notifier_call = pvclock_gtod_notify,
8665 };
8666 #endif
8667
8668 int kvm_arch_init(void *opaque)
8669 {
8670         struct kvm_x86_init_ops *ops = opaque;
8671         int r;
8672
8673         if (kvm_x86_ops.hardware_enable) {
8674                 printk(KERN_ERR "kvm: already loaded the other module\n");
8675                 r = -EEXIST;
8676                 goto out;
8677         }
8678
8679         if (!ops->cpu_has_kvm_support()) {
8680                 pr_err_ratelimited("kvm: no hardware support\n");
8681                 r = -EOPNOTSUPP;
8682                 goto out;
8683         }
8684         if (ops->disabled_by_bios()) {
8685                 pr_err_ratelimited("kvm: disabled by bios\n");
8686                 r = -EOPNOTSUPP;
8687                 goto out;
8688         }
8689
8690         /*
8691          * KVM explicitly assumes that the guest has an FPU and
8692          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8693          * vCPU's FPU state as a fxregs_state struct.
8694          */
8695         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8696                 printk(KERN_ERR "kvm: inadequate fpu\n");
8697                 r = -EOPNOTSUPP;
8698                 goto out;
8699         }
8700
8701         r = -ENOMEM;
8702         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8703                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8704                                           NULL);
8705         if (!x86_fpu_cache) {
8706                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8707                 goto out;
8708         }
8709
8710         x86_emulator_cache = kvm_alloc_emulator_cache();
8711         if (!x86_emulator_cache) {
8712                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8713                 goto out_free_x86_fpu_cache;
8714         }
8715
8716         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8717         if (!user_return_msrs) {
8718                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8719                 goto out_free_x86_emulator_cache;
8720         }
8721         kvm_nr_uret_msrs = 0;
8722
8723         r = kvm_mmu_vendor_module_init();
8724         if (r)
8725                 goto out_free_percpu;
8726
8727         kvm_timer_init();
8728
8729         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8730                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8731                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8732         }
8733
8734         if (pi_inject_timer == -1)
8735                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8736 #ifdef CONFIG_X86_64
8737         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8738
8739         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8740                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8741 #endif
8742
8743         return 0;
8744
8745 out_free_percpu:
8746         free_percpu(user_return_msrs);
8747 out_free_x86_emulator_cache:
8748         kmem_cache_destroy(x86_emulator_cache);
8749 out_free_x86_fpu_cache:
8750         kmem_cache_destroy(x86_fpu_cache);
8751 out:
8752         return r;
8753 }
8754
8755 void kvm_arch_exit(void)
8756 {
8757 #ifdef CONFIG_X86_64
8758         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8759                 clear_hv_tscchange_cb();
8760 #endif
8761         kvm_lapic_exit();
8762
8763         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8764                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8765                                             CPUFREQ_TRANSITION_NOTIFIER);
8766         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8767 #ifdef CONFIG_X86_64
8768         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8769         irq_work_sync(&pvclock_irq_work);
8770         cancel_work_sync(&pvclock_gtod_work);
8771 #endif
8772         kvm_x86_ops.hardware_enable = NULL;
8773         kvm_mmu_vendor_module_exit();
8774         free_percpu(user_return_msrs);
8775         kmem_cache_destroy(x86_emulator_cache);
8776         kmem_cache_destroy(x86_fpu_cache);
8777 #ifdef CONFIG_KVM_XEN
8778         static_key_deferred_flush(&kvm_xen_enabled);
8779         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8780 #endif
8781 }
8782
8783 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8784 {
8785         ++vcpu->stat.halt_exits;
8786         if (lapic_in_kernel(vcpu)) {
8787                 vcpu->arch.mp_state = state;
8788                 return 1;
8789         } else {
8790                 vcpu->run->exit_reason = reason;
8791                 return 0;
8792         }
8793 }
8794
8795 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8796 {
8797         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8798 }
8799 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8800
8801 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8802 {
8803         int ret = kvm_skip_emulated_instruction(vcpu);
8804         /*
8805          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8806          * KVM_EXIT_DEBUG here.
8807          */
8808         return kvm_vcpu_halt(vcpu) && ret;
8809 }
8810 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8811
8812 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8813 {
8814         int ret = kvm_skip_emulated_instruction(vcpu);
8815
8816         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8817 }
8818 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8819
8820 #ifdef CONFIG_X86_64
8821 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8822                                 unsigned long clock_type)
8823 {
8824         struct kvm_clock_pairing clock_pairing;
8825         struct timespec64 ts;
8826         u64 cycle;
8827         int ret;
8828
8829         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8830                 return -KVM_EOPNOTSUPP;
8831
8832         /*
8833          * When tsc is in permanent catchup mode guests won't be able to use
8834          * pvclock_read_retry loop to get consistent view of pvclock
8835          */
8836         if (vcpu->arch.tsc_always_catchup)
8837                 return -KVM_EOPNOTSUPP;
8838
8839         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8840                 return -KVM_EOPNOTSUPP;
8841
8842         clock_pairing.sec = ts.tv_sec;
8843         clock_pairing.nsec = ts.tv_nsec;
8844         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8845         clock_pairing.flags = 0;
8846         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8847
8848         ret = 0;
8849         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8850                             sizeof(struct kvm_clock_pairing)))
8851                 ret = -KVM_EFAULT;
8852
8853         return ret;
8854 }
8855 #endif
8856
8857 /*
8858  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8859  *
8860  * @apicid - apicid of vcpu to be kicked.
8861  */
8862 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8863 {
8864         /*
8865          * All other fields are unused for APIC_DM_REMRD, but may be consumed by
8866          * common code, e.g. for tracing. Defer initialization to the compiler.
8867          */
8868         struct kvm_lapic_irq lapic_irq = {
8869                 .delivery_mode = APIC_DM_REMRD,
8870                 .dest_mode = APIC_DEST_PHYSICAL,
8871                 .shorthand = APIC_DEST_NOSHORT,
8872                 .dest_id = apicid,
8873         };
8874
8875         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8876 }
8877
8878 bool kvm_apicv_activated(struct kvm *kvm)
8879 {
8880         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8881 }
8882 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8883
8884 static void kvm_apicv_init(struct kvm *kvm)
8885 {
8886         mutex_init(&kvm->arch.apicv_update_lock);
8887
8888         if (enable_apicv)
8889                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8890                           &kvm->arch.apicv_inhibit_reasons);
8891         else
8892                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8893                         &kvm->arch.apicv_inhibit_reasons);
8894 }
8895
8896 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8897 {
8898         struct kvm_vcpu *target = NULL;
8899         struct kvm_apic_map *map;
8900
8901         vcpu->stat.directed_yield_attempted++;
8902
8903         if (single_task_running())
8904                 goto no_yield;
8905
8906         rcu_read_lock();
8907         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8908
8909         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8910                 target = map->phys_map[dest_id]->vcpu;
8911
8912         rcu_read_unlock();
8913
8914         if (!target || !READ_ONCE(target->ready))
8915                 goto no_yield;
8916
8917         /* Ignore requests to yield to self */
8918         if (vcpu == target)
8919                 goto no_yield;
8920
8921         if (kvm_vcpu_yield_to(target) <= 0)
8922                 goto no_yield;
8923
8924         vcpu->stat.directed_yield_successful++;
8925
8926 no_yield:
8927         return;
8928 }
8929
8930 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8931 {
8932         u64 ret = vcpu->run->hypercall.ret;
8933
8934         if (!is_64_bit_mode(vcpu))
8935                 ret = (u32)ret;
8936         kvm_rax_write(vcpu, ret);
8937         ++vcpu->stat.hypercalls;
8938         return kvm_skip_emulated_instruction(vcpu);
8939 }
8940
8941 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8942 {
8943         unsigned long nr, a0, a1, a2, a3, ret;
8944         int op_64_bit;
8945
8946         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8947                 return kvm_xen_hypercall(vcpu);
8948
8949         if (kvm_hv_hypercall_enabled(vcpu))
8950                 return kvm_hv_hypercall(vcpu);
8951
8952         nr = kvm_rax_read(vcpu);
8953         a0 = kvm_rbx_read(vcpu);
8954         a1 = kvm_rcx_read(vcpu);
8955         a2 = kvm_rdx_read(vcpu);
8956         a3 = kvm_rsi_read(vcpu);
8957
8958         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8959
8960         op_64_bit = is_64_bit_hypercall(vcpu);
8961         if (!op_64_bit) {
8962                 nr &= 0xFFFFFFFF;
8963                 a0 &= 0xFFFFFFFF;
8964                 a1 &= 0xFFFFFFFF;
8965                 a2 &= 0xFFFFFFFF;
8966                 a3 &= 0xFFFFFFFF;
8967         }
8968
8969         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8970                 ret = -KVM_EPERM;
8971                 goto out;
8972         }
8973
8974         ret = -KVM_ENOSYS;
8975
8976         switch (nr) {
8977         case KVM_HC_VAPIC_POLL_IRQ:
8978                 ret = 0;
8979                 break;
8980         case KVM_HC_KICK_CPU:
8981                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8982                         break;
8983
8984                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8985                 kvm_sched_yield(vcpu, a1);
8986                 ret = 0;
8987                 break;
8988 #ifdef CONFIG_X86_64
8989         case KVM_HC_CLOCK_PAIRING:
8990                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8991                 break;
8992 #endif
8993         case KVM_HC_SEND_IPI:
8994                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8995                         break;
8996
8997                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8998                 break;
8999         case KVM_HC_SCHED_YIELD:
9000                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9001                         break;
9002
9003                 kvm_sched_yield(vcpu, a0);
9004                 ret = 0;
9005                 break;
9006         case KVM_HC_MAP_GPA_RANGE: {
9007                 u64 gpa = a0, npages = a1, attrs = a2;
9008
9009                 ret = -KVM_ENOSYS;
9010                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9011                         break;
9012
9013                 if (!PAGE_ALIGNED(gpa) || !npages ||
9014                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9015                         ret = -KVM_EINVAL;
9016                         break;
9017                 }
9018
9019                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9020                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9021                 vcpu->run->hypercall.args[0]  = gpa;
9022                 vcpu->run->hypercall.args[1]  = npages;
9023                 vcpu->run->hypercall.args[2]  = attrs;
9024                 vcpu->run->hypercall.longmode = op_64_bit;
9025                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9026                 return 0;
9027         }
9028         default:
9029                 ret = -KVM_ENOSYS;
9030                 break;
9031         }
9032 out:
9033         if (!op_64_bit)
9034                 ret = (u32)ret;
9035         kvm_rax_write(vcpu, ret);
9036
9037         ++vcpu->stat.hypercalls;
9038         return kvm_skip_emulated_instruction(vcpu);
9039 }
9040 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9041
9042 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9043 {
9044         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9045         char instruction[3];
9046         unsigned long rip = kvm_rip_read(vcpu);
9047
9048         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9049
9050         return emulator_write_emulated(ctxt, rip, instruction, 3,
9051                 &ctxt->exception);
9052 }
9053
9054 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9055 {
9056         return vcpu->run->request_interrupt_window &&
9057                 likely(!pic_in_kernel(vcpu->kvm));
9058 }
9059
9060 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9061 {
9062         struct kvm_run *kvm_run = vcpu->run;
9063
9064         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9065         kvm_run->cr8 = kvm_get_cr8(vcpu);
9066         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9067
9068         /*
9069          * The call to kvm_ready_for_interrupt_injection() may end up in
9070          * kvm_xen_has_interrupt() which may require the srcu lock to be
9071          * held, to protect against changes in the vcpu_info address.
9072          */
9073         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9074         kvm_run->ready_for_interrupt_injection =
9075                 pic_in_kernel(vcpu->kvm) ||
9076                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9077         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9078
9079         if (is_smm(vcpu))
9080                 kvm_run->flags |= KVM_RUN_X86_SMM;
9081 }
9082
9083 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9084 {
9085         int max_irr, tpr;
9086
9087         if (!kvm_x86_ops.update_cr8_intercept)
9088                 return;
9089
9090         if (!lapic_in_kernel(vcpu))
9091                 return;
9092
9093         if (vcpu->arch.apicv_active)
9094                 return;
9095
9096         if (!vcpu->arch.apic->vapic_addr)
9097                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9098         else
9099                 max_irr = -1;
9100
9101         if (max_irr != -1)
9102                 max_irr >>= 4;
9103
9104         tpr = kvm_lapic_get_cr8(vcpu);
9105
9106         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9107 }
9108
9109
9110 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9111 {
9112         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9113                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9114                 return 1;
9115         }
9116
9117         return kvm_x86_ops.nested_ops->check_events(vcpu);
9118 }
9119
9120 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9121 {
9122         trace_kvm_inj_exception(vcpu->arch.exception.nr,
9123                                 vcpu->arch.exception.has_error_code,
9124                                 vcpu->arch.exception.error_code,
9125                                 vcpu->arch.exception.injected);
9126
9127         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9128                 vcpu->arch.exception.error_code = false;
9129         static_call(kvm_x86_queue_exception)(vcpu);
9130 }
9131
9132 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9133 {
9134         int r;
9135         bool can_inject = true;
9136
9137         /* try to reinject previous events if any */
9138
9139         if (vcpu->arch.exception.injected) {
9140                 kvm_inject_exception(vcpu);
9141                 can_inject = false;
9142         }
9143         /*
9144          * Do not inject an NMI or interrupt if there is a pending
9145          * exception.  Exceptions and interrupts are recognized at
9146          * instruction boundaries, i.e. the start of an instruction.
9147          * Trap-like exceptions, e.g. #DB, have higher priority than
9148          * NMIs and interrupts, i.e. traps are recognized before an
9149          * NMI/interrupt that's pending on the same instruction.
9150          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9151          * priority, but are only generated (pended) during instruction
9152          * execution, i.e. a pending fault-like exception means the
9153          * fault occurred on the *previous* instruction and must be
9154          * serviced prior to recognizing any new events in order to
9155          * fully complete the previous instruction.
9156          */
9157         else if (!vcpu->arch.exception.pending) {
9158                 if (vcpu->arch.nmi_injected) {
9159                         static_call(kvm_x86_set_nmi)(vcpu);
9160                         can_inject = false;
9161                 } else if (vcpu->arch.interrupt.injected) {
9162                         static_call(kvm_x86_set_irq)(vcpu);
9163                         can_inject = false;
9164                 }
9165         }
9166
9167         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9168                      vcpu->arch.exception.pending);
9169
9170         /*
9171          * Call check_nested_events() even if we reinjected a previous event
9172          * in order for caller to determine if it should require immediate-exit
9173          * from L2 to L1 due to pending L1 events which require exit
9174          * from L2 to L1.
9175          */
9176         if (is_guest_mode(vcpu)) {
9177                 r = kvm_check_nested_events(vcpu);
9178                 if (r < 0)
9179                         goto out;
9180         }
9181
9182         /* try to inject new event if pending */
9183         if (vcpu->arch.exception.pending) {
9184                 /*
9185                  * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
9186                  * value pushed on the stack.  Trap-like exception and all #DBs
9187                  * leave RF as-is (KVM follows Intel's behavior in this regard;
9188                  * AMD states that code breakpoint #DBs excplitly clear RF=0).
9189                  *
9190                  * Note, most versions of Intel's SDM and AMD's APM incorrectly
9191                  * describe the behavior of General Detect #DBs, which are
9192                  * fault-like.  They do _not_ set RF, a la code breakpoints.
9193                  */
9194                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9195                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9196                                              X86_EFLAGS_RF);
9197
9198                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9199                         kvm_deliver_exception_payload(vcpu);
9200                         if (vcpu->arch.dr7 & DR7_GD) {
9201                                 vcpu->arch.dr7 &= ~DR7_GD;
9202                                 kvm_update_dr7(vcpu);
9203                         }
9204                 }
9205
9206                 kvm_inject_exception(vcpu);
9207
9208                 vcpu->arch.exception.pending = false;
9209                 vcpu->arch.exception.injected = true;
9210
9211                 can_inject = false;
9212         }
9213
9214         /* Don't inject interrupts if the user asked to avoid doing so */
9215         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9216                 return 0;
9217
9218         /*
9219          * Finally, inject interrupt events.  If an event cannot be injected
9220          * due to architectural conditions (e.g. IF=0) a window-open exit
9221          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9222          * and can architecturally be injected, but we cannot do it right now:
9223          * an interrupt could have arrived just now and we have to inject it
9224          * as a vmexit, or there could already an event in the queue, which is
9225          * indicated by can_inject.  In that case we request an immediate exit
9226          * in order to make progress and get back here for another iteration.
9227          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9228          */
9229         if (vcpu->arch.smi_pending) {
9230                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9231                 if (r < 0)
9232                         goto out;
9233                 if (r) {
9234                         vcpu->arch.smi_pending = false;
9235                         ++vcpu->arch.smi_count;
9236                         enter_smm(vcpu);
9237                         can_inject = false;
9238                 } else
9239                         static_call(kvm_x86_enable_smi_window)(vcpu);
9240         }
9241
9242         if (vcpu->arch.nmi_pending) {
9243                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9244                 if (r < 0)
9245                         goto out;
9246                 if (r) {
9247                         --vcpu->arch.nmi_pending;
9248                         vcpu->arch.nmi_injected = true;
9249                         static_call(kvm_x86_set_nmi)(vcpu);
9250                         can_inject = false;
9251                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9252                 }
9253                 if (vcpu->arch.nmi_pending)
9254                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9255         }
9256
9257         if (kvm_cpu_has_injectable_intr(vcpu)) {
9258                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9259                 if (r < 0)
9260                         goto out;
9261                 if (r) {
9262                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9263                         static_call(kvm_x86_set_irq)(vcpu);
9264                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9265                 }
9266                 if (kvm_cpu_has_injectable_intr(vcpu))
9267                         static_call(kvm_x86_enable_irq_window)(vcpu);
9268         }
9269
9270         if (is_guest_mode(vcpu) &&
9271             kvm_x86_ops.nested_ops->hv_timer_pending &&
9272             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9273                 *req_immediate_exit = true;
9274
9275         WARN_ON(vcpu->arch.exception.pending);
9276         return 0;
9277
9278 out:
9279         if (r == -EBUSY) {
9280                 *req_immediate_exit = true;
9281                 r = 0;
9282         }
9283         return r;
9284 }
9285
9286 static void process_nmi(struct kvm_vcpu *vcpu)
9287 {
9288         unsigned limit = 2;
9289
9290         /*
9291          * x86 is limited to one NMI running, and one NMI pending after it.
9292          * If an NMI is already in progress, limit further NMIs to just one.
9293          * Otherwise, allow two (and we'll inject the first one immediately).
9294          */
9295         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9296                 limit = 1;
9297
9298         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9299         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9300         kvm_make_request(KVM_REQ_EVENT, vcpu);
9301 }
9302
9303 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9304 {
9305         u32 flags = 0;
9306         flags |= seg->g       << 23;
9307         flags |= seg->db      << 22;
9308         flags |= seg->l       << 21;
9309         flags |= seg->avl     << 20;
9310         flags |= seg->present << 15;
9311         flags |= seg->dpl     << 13;
9312         flags |= seg->s       << 12;
9313         flags |= seg->type    << 8;
9314         return flags;
9315 }
9316
9317 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9318 {
9319         struct kvm_segment seg;
9320         int offset;
9321
9322         kvm_get_segment(vcpu, &seg, n);
9323         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9324
9325         if (n < 3)
9326                 offset = 0x7f84 + n * 12;
9327         else
9328                 offset = 0x7f2c + (n - 3) * 12;
9329
9330         put_smstate(u32, buf, offset + 8, seg.base);
9331         put_smstate(u32, buf, offset + 4, seg.limit);
9332         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9333 }
9334
9335 #ifdef CONFIG_X86_64
9336 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9337 {
9338         struct kvm_segment seg;
9339         int offset;
9340         u16 flags;
9341
9342         kvm_get_segment(vcpu, &seg, n);
9343         offset = 0x7e00 + n * 16;
9344
9345         flags = enter_smm_get_segment_flags(&seg) >> 8;
9346         put_smstate(u16, buf, offset, seg.selector);
9347         put_smstate(u16, buf, offset + 2, flags);
9348         put_smstate(u32, buf, offset + 4, seg.limit);
9349         put_smstate(u64, buf, offset + 8, seg.base);
9350 }
9351 #endif
9352
9353 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9354 {
9355         struct desc_ptr dt;
9356         struct kvm_segment seg;
9357         unsigned long val;
9358         int i;
9359
9360         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9361         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9362         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9363         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9364
9365         for (i = 0; i < 8; i++)
9366                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9367
9368         kvm_get_dr(vcpu, 6, &val);
9369         put_smstate(u32, buf, 0x7fcc, (u32)val);
9370         kvm_get_dr(vcpu, 7, &val);
9371         put_smstate(u32, buf, 0x7fc8, (u32)val);
9372
9373         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9374         put_smstate(u32, buf, 0x7fc4, seg.selector);
9375         put_smstate(u32, buf, 0x7f64, seg.base);
9376         put_smstate(u32, buf, 0x7f60, seg.limit);
9377         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9378
9379         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9380         put_smstate(u32, buf, 0x7fc0, seg.selector);
9381         put_smstate(u32, buf, 0x7f80, seg.base);
9382         put_smstate(u32, buf, 0x7f7c, seg.limit);
9383         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9384
9385         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9386         put_smstate(u32, buf, 0x7f74, dt.address);
9387         put_smstate(u32, buf, 0x7f70, dt.size);
9388
9389         static_call(kvm_x86_get_idt)(vcpu, &dt);
9390         put_smstate(u32, buf, 0x7f58, dt.address);
9391         put_smstate(u32, buf, 0x7f54, dt.size);
9392
9393         for (i = 0; i < 6; i++)
9394                 enter_smm_save_seg_32(vcpu, buf, i);
9395
9396         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9397
9398         /* revision id */
9399         put_smstate(u32, buf, 0x7efc, 0x00020000);
9400         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9401 }
9402
9403 #ifdef CONFIG_X86_64
9404 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9405 {
9406         struct desc_ptr dt;
9407         struct kvm_segment seg;
9408         unsigned long val;
9409         int i;
9410
9411         for (i = 0; i < 16; i++)
9412                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9413
9414         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9415         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9416
9417         kvm_get_dr(vcpu, 6, &val);
9418         put_smstate(u64, buf, 0x7f68, val);
9419         kvm_get_dr(vcpu, 7, &val);
9420         put_smstate(u64, buf, 0x7f60, val);
9421
9422         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9423         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9424         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9425
9426         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9427
9428         /* revision id */
9429         put_smstate(u32, buf, 0x7efc, 0x00020064);
9430
9431         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9432
9433         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9434         put_smstate(u16, buf, 0x7e90, seg.selector);
9435         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9436         put_smstate(u32, buf, 0x7e94, seg.limit);
9437         put_smstate(u64, buf, 0x7e98, seg.base);
9438
9439         static_call(kvm_x86_get_idt)(vcpu, &dt);
9440         put_smstate(u32, buf, 0x7e84, dt.size);
9441         put_smstate(u64, buf, 0x7e88, dt.address);
9442
9443         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9444         put_smstate(u16, buf, 0x7e70, seg.selector);
9445         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9446         put_smstate(u32, buf, 0x7e74, seg.limit);
9447         put_smstate(u64, buf, 0x7e78, seg.base);
9448
9449         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9450         put_smstate(u32, buf, 0x7e64, dt.size);
9451         put_smstate(u64, buf, 0x7e68, dt.address);
9452
9453         for (i = 0; i < 6; i++)
9454                 enter_smm_save_seg_64(vcpu, buf, i);
9455 }
9456 #endif
9457
9458 static void enter_smm(struct kvm_vcpu *vcpu)
9459 {
9460         struct kvm_segment cs, ds;
9461         struct desc_ptr dt;
9462         unsigned long cr0;
9463         char buf[512];
9464
9465         memset(buf, 0, 512);
9466 #ifdef CONFIG_X86_64
9467         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9468                 enter_smm_save_state_64(vcpu, buf);
9469         else
9470 #endif
9471                 enter_smm_save_state_32(vcpu, buf);
9472
9473         /*
9474          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9475          * state (e.g. leave guest mode) after we've saved the state into the
9476          * SMM state-save area.
9477          */
9478         static_call(kvm_x86_enter_smm)(vcpu, buf);
9479
9480         kvm_smm_changed(vcpu, true);
9481         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9482
9483         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9484                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9485         else
9486                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9487
9488         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9489         kvm_rip_write(vcpu, 0x8000);
9490
9491         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9492         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9493         vcpu->arch.cr0 = cr0;
9494
9495         static_call(kvm_x86_set_cr4)(vcpu, 0);
9496
9497         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9498         dt.address = dt.size = 0;
9499         static_call(kvm_x86_set_idt)(vcpu, &dt);
9500
9501         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9502
9503         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9504         cs.base = vcpu->arch.smbase;
9505
9506         ds.selector = 0;
9507         ds.base = 0;
9508
9509         cs.limit    = ds.limit = 0xffffffff;
9510         cs.type     = ds.type = 0x3;
9511         cs.dpl      = ds.dpl = 0;
9512         cs.db       = ds.db = 0;
9513         cs.s        = ds.s = 1;
9514         cs.l        = ds.l = 0;
9515         cs.g        = ds.g = 1;
9516         cs.avl      = ds.avl = 0;
9517         cs.present  = ds.present = 1;
9518         cs.unusable = ds.unusable = 0;
9519         cs.padding  = ds.padding = 0;
9520
9521         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9522         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9523         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9524         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9525         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9526         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9527
9528 #ifdef CONFIG_X86_64
9529         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9530                 static_call(kvm_x86_set_efer)(vcpu, 0);
9531 #endif
9532
9533         kvm_update_cpuid_runtime(vcpu);
9534         kvm_mmu_reset_context(vcpu);
9535 }
9536
9537 static void process_smi(struct kvm_vcpu *vcpu)
9538 {
9539         vcpu->arch.smi_pending = true;
9540         kvm_make_request(KVM_REQ_EVENT, vcpu);
9541 }
9542
9543 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9544                                        unsigned long *vcpu_bitmap)
9545 {
9546         cpumask_var_t cpus;
9547
9548         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9549
9550         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9551                                     NULL, vcpu_bitmap, cpus);
9552
9553         free_cpumask_var(cpus);
9554 }
9555
9556 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9557 {
9558         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9559 }
9560
9561 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9562 {
9563         bool activate;
9564
9565         if (!lapic_in_kernel(vcpu))
9566                 return;
9567
9568         mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9569
9570         activate = kvm_apicv_activated(vcpu->kvm);
9571         if (vcpu->arch.apicv_active == activate)
9572                 goto out;
9573
9574         vcpu->arch.apicv_active = activate;
9575         kvm_apic_update_apicv(vcpu);
9576         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9577
9578         /*
9579          * When APICv gets disabled, we may still have injected interrupts
9580          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9581          * still active when the interrupt got accepted. Make sure
9582          * inject_pending_event() is called to check for that.
9583          */
9584         if (!vcpu->arch.apicv_active)
9585                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9586
9587 out:
9588         mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9589 }
9590 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9591
9592 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9593 {
9594         unsigned long old, new;
9595
9596         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9597             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9598                 return;
9599
9600         old = new = kvm->arch.apicv_inhibit_reasons;
9601
9602         if (activate)
9603                 __clear_bit(bit, &new);
9604         else
9605                 __set_bit(bit, &new);
9606
9607         if (!!old != !!new) {
9608                 trace_kvm_apicv_update_request(activate, bit);
9609                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9610                 kvm->arch.apicv_inhibit_reasons = new;
9611                 if (new) {
9612                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9613                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9614                 }
9615         } else
9616                 kvm->arch.apicv_inhibit_reasons = new;
9617 }
9618 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9619
9620 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9621 {
9622         mutex_lock(&kvm->arch.apicv_update_lock);
9623         __kvm_request_apicv_update(kvm, activate, bit);
9624         mutex_unlock(&kvm->arch.apicv_update_lock);
9625 }
9626 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9627
9628 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9629 {
9630         if (!kvm_apic_present(vcpu))
9631                 return;
9632
9633         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9634
9635         if (irqchip_split(vcpu->kvm))
9636                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9637         else {
9638                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9639                 if (ioapic_in_kernel(vcpu->kvm))
9640                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9641         }
9642
9643         if (is_guest_mode(vcpu))
9644                 vcpu->arch.load_eoi_exitmap_pending = true;
9645         else
9646                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9647 }
9648
9649 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9650 {
9651         u64 eoi_exit_bitmap[4];
9652
9653         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9654                 return;
9655
9656         if (to_hv_vcpu(vcpu)) {
9657                 bitmap_or((ulong *)eoi_exit_bitmap,
9658                           vcpu->arch.ioapic_handled_vectors,
9659                           to_hv_synic(vcpu)->vec_bitmap, 256);
9660                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9661                 return;
9662         }
9663
9664         static_call(kvm_x86_load_eoi_exitmap)(
9665                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9666 }
9667
9668 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9669                                             unsigned long start, unsigned long end)
9670 {
9671         unsigned long apic_address;
9672
9673         /*
9674          * The physical address of apic access page is stored in the VMCS.
9675          * Update it when it becomes invalid.
9676          */
9677         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9678         if (start <= apic_address && apic_address < end)
9679                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9680 }
9681
9682 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
9683 {
9684         static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
9685 }
9686
9687 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9688 {
9689         if (!lapic_in_kernel(vcpu))
9690                 return;
9691
9692         if (!kvm_x86_ops.set_apic_access_page_addr)
9693                 return;
9694
9695         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9696 }
9697
9698 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9699 {
9700         smp_send_reschedule(vcpu->cpu);
9701 }
9702 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9703
9704 /*
9705  * Returns 1 to let vcpu_run() continue the guest execution loop without
9706  * exiting to the userspace.  Otherwise, the value will be returned to the
9707  * userspace.
9708  */
9709 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9710 {
9711         int r;
9712         bool req_int_win =
9713                 dm_request_for_irq_injection(vcpu) &&
9714                 kvm_cpu_accept_dm_intr(vcpu);
9715         fastpath_t exit_fastpath;
9716
9717         bool req_immediate_exit = false;
9718
9719         /* Forbid vmenter if vcpu dirty ring is soft-full */
9720         if (unlikely(vcpu->kvm->dirty_ring_size &&
9721                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9722                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9723                 trace_kvm_dirty_ring_exit(vcpu);
9724                 r = 0;
9725                 goto out;
9726         }
9727
9728         if (kvm_request_pending(vcpu)) {
9729                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9730                         r = -EIO;
9731                         goto out;
9732                 }
9733                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9734                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9735                                 r = 0;
9736                                 goto out;
9737                         }
9738                 }
9739                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9740                         kvm_mmu_unload(vcpu);
9741                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9742                         __kvm_migrate_timers(vcpu);
9743                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9744                         kvm_gen_update_masterclock(vcpu->kvm);
9745                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9746                         kvm_gen_kvmclock_update(vcpu);
9747                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9748                         r = kvm_guest_time_update(vcpu);
9749                         if (unlikely(r))
9750                                 goto out;
9751                 }
9752                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9753                         kvm_mmu_sync_roots(vcpu);
9754                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9755                         kvm_mmu_load_pgd(vcpu);
9756                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9757                         kvm_vcpu_flush_tlb_all(vcpu);
9758
9759                         /* Flushing all ASIDs flushes the current ASID... */
9760                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9761                 }
9762                 kvm_service_local_tlb_flush_requests(vcpu);
9763
9764                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9765                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9766                         r = 0;
9767                         goto out;
9768                 }
9769                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9770                         if (is_guest_mode(vcpu)) {
9771                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9772                         } else {
9773                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9774                                 vcpu->mmio_needed = 0;
9775                                 r = 0;
9776                                 goto out;
9777                         }
9778                 }
9779                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9780                         /* Page is swapped out. Do synthetic halt */
9781                         vcpu->arch.apf.halted = true;
9782                         r = 1;
9783                         goto out;
9784                 }
9785                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9786                         record_steal_time(vcpu);
9787                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9788                         process_smi(vcpu);
9789                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9790                         process_nmi(vcpu);
9791                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9792                         kvm_pmu_handle_event(vcpu);
9793                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9794                         kvm_pmu_deliver_pmi(vcpu);
9795                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9796                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9797                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9798                                      vcpu->arch.ioapic_handled_vectors)) {
9799                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9800                                 vcpu->run->eoi.vector =
9801                                                 vcpu->arch.pending_ioapic_eoi;
9802                                 r = 0;
9803                                 goto out;
9804                         }
9805                 }
9806                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9807                         vcpu_scan_ioapic(vcpu);
9808                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9809                         vcpu_load_eoi_exitmap(vcpu);
9810                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9811                         kvm_vcpu_reload_apic_access_page(vcpu);
9812                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9813                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9814                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9815                         r = 0;
9816                         goto out;
9817                 }
9818                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9819                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9820                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9821                         r = 0;
9822                         goto out;
9823                 }
9824                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9825                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9826
9827                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9828                         vcpu->run->hyperv = hv_vcpu->exit;
9829                         r = 0;
9830                         goto out;
9831                 }
9832
9833                 /*
9834                  * KVM_REQ_HV_STIMER has to be processed after
9835                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9836                  * depend on the guest clock being up-to-date
9837                  */
9838                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9839                         kvm_hv_process_stimers(vcpu);
9840                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9841                         kvm_vcpu_update_apicv(vcpu);
9842                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9843                         kvm_check_async_pf_completion(vcpu);
9844                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9845                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9846
9847                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9848                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9849         }
9850
9851         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9852             kvm_xen_has_interrupt(vcpu)) {
9853                 ++vcpu->stat.req_event;
9854                 r = kvm_apic_accept_events(vcpu);
9855                 if (r < 0) {
9856                         r = 0;
9857                         goto out;
9858                 }
9859                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9860                         r = 1;
9861                         goto out;
9862                 }
9863
9864                 r = inject_pending_event(vcpu, &req_immediate_exit);
9865                 if (r < 0) {
9866                         r = 0;
9867                         goto out;
9868                 }
9869                 if (req_int_win)
9870                         static_call(kvm_x86_enable_irq_window)(vcpu);
9871
9872                 if (kvm_lapic_enabled(vcpu)) {
9873                         update_cr8_intercept(vcpu);
9874                         kvm_lapic_sync_to_vapic(vcpu);
9875                 }
9876         }
9877
9878         r = kvm_mmu_reload(vcpu);
9879         if (unlikely(r)) {
9880                 goto cancel_injection;
9881         }
9882
9883         preempt_disable();
9884
9885         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9886
9887         /*
9888          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9889          * IPI are then delayed after guest entry, which ensures that they
9890          * result in virtual interrupt delivery.
9891          */
9892         local_irq_disable();
9893         vcpu->mode = IN_GUEST_MODE;
9894
9895         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9896
9897         /*
9898          * 1) We should set ->mode before checking ->requests.  Please see
9899          * the comment in kvm_vcpu_exiting_guest_mode().
9900          *
9901          * 2) For APICv, we should set ->mode before checking PID.ON. This
9902          * pairs with the memory barrier implicit in pi_test_and_set_on
9903          * (see vmx_deliver_posted_interrupt).
9904          *
9905          * 3) This also orders the write to mode from any reads to the page
9906          * tables done while the VCPU is running.  Please see the comment
9907          * in kvm_flush_remote_tlbs.
9908          */
9909         smp_mb__after_srcu_read_unlock();
9910
9911         /*
9912          * This handles the case where a posted interrupt was
9913          * notified with kvm_vcpu_kick.  Assigned devices can
9914          * use the POSTED_INTR_VECTOR even if APICv is disabled,
9915          * so do it even if APICv is disabled on this vCPU.
9916          */
9917         if (kvm_lapic_enabled(vcpu))
9918                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9919
9920         if (kvm_vcpu_exit_request(vcpu)) {
9921                 vcpu->mode = OUTSIDE_GUEST_MODE;
9922                 smp_wmb();
9923                 local_irq_enable();
9924                 preempt_enable();
9925                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9926                 r = 1;
9927                 goto cancel_injection;
9928         }
9929
9930         if (req_immediate_exit) {
9931                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9932                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9933         }
9934
9935         fpregs_assert_state_consistent();
9936         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9937                 switch_fpu_return();
9938
9939         if (unlikely(vcpu->arch.switch_db_regs)) {
9940                 set_debugreg(0, 7);
9941                 set_debugreg(vcpu->arch.eff_db[0], 0);
9942                 set_debugreg(vcpu->arch.eff_db[1], 1);
9943                 set_debugreg(vcpu->arch.eff_db[2], 2);
9944                 set_debugreg(vcpu->arch.eff_db[3], 3);
9945         } else if (unlikely(hw_breakpoint_active())) {
9946                 set_debugreg(0, 7);
9947         }
9948
9949         for (;;) {
9950                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9951                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9952                         break;
9953
9954                 if (kvm_lapic_enabled(vcpu))
9955                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9956
9957                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9958                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9959                         break;
9960                 }
9961
9962                 /* Note, VM-Exits that go down the "slow" path are accounted below. */
9963                 ++vcpu->stat.exits;
9964         }
9965
9966         /*
9967          * Do this here before restoring debug registers on the host.  And
9968          * since we do this before handling the vmexit, a DR access vmexit
9969          * can (a) read the correct value of the debug registers, (b) set
9970          * KVM_DEBUGREG_WONT_EXIT again.
9971          */
9972         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9973                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9974                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9975                 kvm_update_dr0123(vcpu);
9976                 kvm_update_dr7(vcpu);
9977         }
9978
9979         /*
9980          * If the guest has used debug registers, at least dr7
9981          * will be disabled while returning to the host.
9982          * If we don't have active breakpoints in the host, we don't
9983          * care about the messed up debug address registers. But if
9984          * we have some of them active, restore the old state.
9985          */
9986         if (hw_breakpoint_active())
9987                 hw_breakpoint_restore();
9988
9989         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9990         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9991
9992         vcpu->mode = OUTSIDE_GUEST_MODE;
9993         smp_wmb();
9994
9995         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9996
9997         /*
9998          * Consume any pending interrupts, including the possible source of
9999          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10000          * An instruction is required after local_irq_enable() to fully unblock
10001          * interrupts on processors that implement an interrupt shadow, the
10002          * stat.exits increment will do nicely.
10003          */
10004         kvm_before_interrupt(vcpu);
10005         local_irq_enable();
10006         ++vcpu->stat.exits;
10007         local_irq_disable();
10008         kvm_after_interrupt(vcpu);
10009
10010         /*
10011          * Wait until after servicing IRQs to account guest time so that any
10012          * ticks that occurred while running the guest are properly accounted
10013          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10014          * of accounting via context tracking, but the loss of accuracy is
10015          * acceptable for all known use cases.
10016          */
10017         vtime_account_guest_exit();
10018
10019         if (lapic_in_kernel(vcpu)) {
10020                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10021                 if (delta != S64_MIN) {
10022                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10023                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10024                 }
10025         }
10026
10027         local_irq_enable();
10028         preempt_enable();
10029
10030         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10031
10032         /*
10033          * Profile KVM exit RIPs:
10034          */
10035         if (unlikely(prof_on == KVM_PROFILING)) {
10036                 unsigned long rip = kvm_rip_read(vcpu);
10037                 profile_hit(KVM_PROFILING, (void *)rip);
10038         }
10039
10040         if (unlikely(vcpu->arch.tsc_always_catchup))
10041                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10042
10043         if (vcpu->arch.apic_attention)
10044                 kvm_lapic_sync_from_vapic(vcpu);
10045
10046         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10047         return r;
10048
10049 cancel_injection:
10050         if (req_immediate_exit)
10051                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10052         static_call(kvm_x86_cancel_injection)(vcpu);
10053         if (unlikely(vcpu->arch.apic_attention))
10054                 kvm_lapic_sync_from_vapic(vcpu);
10055 out:
10056         return r;
10057 }
10058
10059 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10060 {
10061         bool hv_timer;
10062
10063         if (!kvm_arch_vcpu_runnable(vcpu) &&
10064             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
10065                 /*
10066                  * Switch to the software timer before halt-polling/blocking as
10067                  * the guest's timer may be a break event for the vCPU, and the
10068                  * hypervisor timer runs only when the CPU is in guest mode.
10069                  * Switch before halt-polling so that KVM recognizes an expired
10070                  * timer before blocking.
10071                  */
10072                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10073                 if (hv_timer)
10074                         kvm_lapic_switch_to_sw_timer(vcpu);
10075
10076                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10077                 kvm_vcpu_block(vcpu);
10078                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10079
10080                 if (hv_timer)
10081                         kvm_lapic_switch_to_hv_timer(vcpu);
10082
10083                 if (kvm_x86_ops.post_block)
10084                         static_call(kvm_x86_post_block)(vcpu);
10085
10086                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10087                         return 1;
10088         }
10089
10090         if (kvm_apic_accept_events(vcpu) < 0)
10091                 return 0;
10092         switch(vcpu->arch.mp_state) {
10093         case KVM_MP_STATE_HALTED:
10094         case KVM_MP_STATE_AP_RESET_HOLD:
10095                 vcpu->arch.pv.pv_unhalted = false;
10096                 vcpu->arch.mp_state =
10097                         KVM_MP_STATE_RUNNABLE;
10098                 fallthrough;
10099         case KVM_MP_STATE_RUNNABLE:
10100                 vcpu->arch.apf.halted = false;
10101                 break;
10102         case KVM_MP_STATE_INIT_RECEIVED:
10103                 break;
10104         default:
10105                 return -EINTR;
10106         }
10107         return 1;
10108 }
10109
10110 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10111 {
10112         if (is_guest_mode(vcpu))
10113                 kvm_check_nested_events(vcpu);
10114
10115         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10116                 !vcpu->arch.apf.halted);
10117 }
10118
10119 static int vcpu_run(struct kvm_vcpu *vcpu)
10120 {
10121         int r;
10122         struct kvm *kvm = vcpu->kvm;
10123
10124         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10125         vcpu->arch.l1tf_flush_l1d = true;
10126
10127         for (;;) {
10128                 /*
10129                  * If another guest vCPU requests a PV TLB flush in the middle
10130                  * of instruction emulation, the rest of the emulation could
10131                  * use a stale page translation. Assume that any code after
10132                  * this point can start executing an instruction.
10133                  */
10134                 vcpu->arch.at_instruction_boundary = false;
10135                 if (kvm_vcpu_running(vcpu)) {
10136                         r = vcpu_enter_guest(vcpu);
10137                 } else {
10138                         r = vcpu_block(kvm, vcpu);
10139                 }
10140
10141                 if (r <= 0)
10142                         break;
10143
10144                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10145                 if (kvm_cpu_has_pending_timer(vcpu))
10146                         kvm_inject_pending_timer_irqs(vcpu);
10147
10148                 if (dm_request_for_irq_injection(vcpu) &&
10149                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10150                         r = 0;
10151                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10152                         ++vcpu->stat.request_irq_exits;
10153                         break;
10154                 }
10155
10156                 if (__xfer_to_guest_mode_work_pending()) {
10157                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10158                         r = xfer_to_guest_mode_handle_work(vcpu);
10159                         if (r)
10160                                 return r;
10161                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10162                 }
10163         }
10164
10165         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10166
10167         return r;
10168 }
10169
10170 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10171 {
10172         int r;
10173
10174         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10175         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10176         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10177         return r;
10178 }
10179
10180 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10181 {
10182         BUG_ON(!vcpu->arch.pio.count);
10183
10184         return complete_emulated_io(vcpu);
10185 }
10186
10187 /*
10188  * Implements the following, as a state machine:
10189  *
10190  * read:
10191  *   for each fragment
10192  *     for each mmio piece in the fragment
10193  *       write gpa, len
10194  *       exit
10195  *       copy data
10196  *   execute insn
10197  *
10198  * write:
10199  *   for each fragment
10200  *     for each mmio piece in the fragment
10201  *       write gpa, len
10202  *       copy data
10203  *       exit
10204  */
10205 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10206 {
10207         struct kvm_run *run = vcpu->run;
10208         struct kvm_mmio_fragment *frag;
10209         unsigned len;
10210
10211         BUG_ON(!vcpu->mmio_needed);
10212
10213         /* Complete previous fragment */
10214         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10215         len = min(8u, frag->len);
10216         if (!vcpu->mmio_is_write)
10217                 memcpy(frag->data, run->mmio.data, len);
10218
10219         if (frag->len <= 8) {
10220                 /* Switch to the next fragment. */
10221                 frag++;
10222                 vcpu->mmio_cur_fragment++;
10223         } else {
10224                 /* Go forward to the next mmio piece. */
10225                 frag->data += len;
10226                 frag->gpa += len;
10227                 frag->len -= len;
10228         }
10229
10230         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10231                 vcpu->mmio_needed = 0;
10232
10233                 /* FIXME: return into emulator if single-stepping.  */
10234                 if (vcpu->mmio_is_write)
10235                         return 1;
10236                 vcpu->mmio_read_completed = 1;
10237                 return complete_emulated_io(vcpu);
10238         }
10239
10240         run->exit_reason = KVM_EXIT_MMIO;
10241         run->mmio.phys_addr = frag->gpa;
10242         if (vcpu->mmio_is_write)
10243                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10244         run->mmio.len = min(8u, frag->len);
10245         run->mmio.is_write = vcpu->mmio_is_write;
10246         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10247         return 0;
10248 }
10249
10250 static void kvm_save_current_fpu(struct fpu *fpu)
10251 {
10252         /*
10253          * If the target FPU state is not resident in the CPU registers, just
10254          * memcpy() from current, else save CPU state directly to the target.
10255          */
10256         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10257                 memcpy(&fpu->state, &current->thread.fpu.state,
10258                        fpu_kernel_xstate_size);
10259         else
10260                 save_fpregs_to_fpstate(fpu);
10261 }
10262
10263 /* Swap (qemu) user FPU context for the guest FPU context. */
10264 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10265 {
10266         fpregs_lock();
10267
10268         kvm_save_current_fpu(vcpu->arch.user_fpu);
10269
10270         /*
10271          * Guests with protected state can't have it set by the hypervisor,
10272          * so skip trying to set it.
10273          */
10274         if (vcpu->arch.guest_fpu)
10275                 /* PKRU is separately restored in kvm_x86_ops.run. */
10276                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
10277                                         ~XFEATURE_MASK_PKRU);
10278
10279         fpregs_mark_activate();
10280         fpregs_unlock();
10281
10282         trace_kvm_fpu(1);
10283 }
10284
10285 /* When vcpu_run ends, restore user space FPU context. */
10286 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10287 {
10288         fpregs_lock();
10289
10290         /*
10291          * Guests with protected state can't have it read by the hypervisor,
10292          * so skip trying to save it.
10293          */
10294         if (vcpu->arch.guest_fpu)
10295                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
10296
10297         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
10298
10299         fpregs_mark_activate();
10300         fpregs_unlock();
10301
10302         ++vcpu->stat.fpu_reload;
10303         trace_kvm_fpu(0);
10304 }
10305
10306 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10307 {
10308         struct kvm_run *kvm_run = vcpu->run;
10309         int r;
10310
10311         vcpu_load(vcpu);
10312         kvm_sigset_activate(vcpu);
10313         kvm_run->flags = 0;
10314         kvm_load_guest_fpu(vcpu);
10315
10316         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10317                 if (kvm_run->immediate_exit) {
10318                         r = -EINTR;
10319                         goto out;
10320                 }
10321                 /*
10322                  * It should be impossible for the hypervisor timer to be in
10323                  * use before KVM has ever run the vCPU.
10324                  */
10325                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10326                 kvm_vcpu_block(vcpu);
10327                 if (kvm_apic_accept_events(vcpu) < 0) {
10328                         r = 0;
10329                         goto out;
10330                 }
10331                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10332                 r = -EAGAIN;
10333                 if (signal_pending(current)) {
10334                         r = -EINTR;
10335                         kvm_run->exit_reason = KVM_EXIT_INTR;
10336                         ++vcpu->stat.signal_exits;
10337                 }
10338                 goto out;
10339         }
10340
10341         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10342             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10343                 r = -EINVAL;
10344                 goto out;
10345         }
10346
10347         if (kvm_run->kvm_dirty_regs) {
10348                 r = sync_regs(vcpu);
10349                 if (r != 0)
10350                         goto out;
10351         }
10352
10353         /* re-sync apic's tpr */
10354         if (!lapic_in_kernel(vcpu)) {
10355                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10356                         r = -EINVAL;
10357                         goto out;
10358                 }
10359         }
10360
10361         if (unlikely(vcpu->arch.complete_userspace_io)) {
10362                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10363                 vcpu->arch.complete_userspace_io = NULL;
10364                 r = cui(vcpu);
10365                 if (r <= 0)
10366                         goto out;
10367         } else
10368                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10369
10370         if (kvm_run->immediate_exit)
10371                 r = -EINTR;
10372         else
10373                 r = vcpu_run(vcpu);
10374
10375 out:
10376         kvm_put_guest_fpu(vcpu);
10377         if (kvm_run->kvm_valid_regs)
10378                 store_regs(vcpu);
10379         post_kvm_run_save(vcpu);
10380         kvm_sigset_deactivate(vcpu);
10381
10382         vcpu_put(vcpu);
10383         return r;
10384 }
10385
10386 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10387 {
10388         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10389                 /*
10390                  * We are here if userspace calls get_regs() in the middle of
10391                  * instruction emulation. Registers state needs to be copied
10392                  * back from emulation context to vcpu. Userspace shouldn't do
10393                  * that usually, but some bad designed PV devices (vmware
10394                  * backdoor interface) need this to work
10395                  */
10396                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10397                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10398         }
10399         regs->rax = kvm_rax_read(vcpu);
10400         regs->rbx = kvm_rbx_read(vcpu);
10401         regs->rcx = kvm_rcx_read(vcpu);
10402         regs->rdx = kvm_rdx_read(vcpu);
10403         regs->rsi = kvm_rsi_read(vcpu);
10404         regs->rdi = kvm_rdi_read(vcpu);
10405         regs->rsp = kvm_rsp_read(vcpu);
10406         regs->rbp = kvm_rbp_read(vcpu);
10407 #ifdef CONFIG_X86_64
10408         regs->r8 = kvm_r8_read(vcpu);
10409         regs->r9 = kvm_r9_read(vcpu);
10410         regs->r10 = kvm_r10_read(vcpu);
10411         regs->r11 = kvm_r11_read(vcpu);
10412         regs->r12 = kvm_r12_read(vcpu);
10413         regs->r13 = kvm_r13_read(vcpu);
10414         regs->r14 = kvm_r14_read(vcpu);
10415         regs->r15 = kvm_r15_read(vcpu);
10416 #endif
10417
10418         regs->rip = kvm_rip_read(vcpu);
10419         regs->rflags = kvm_get_rflags(vcpu);
10420 }
10421
10422 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10423 {
10424         vcpu_load(vcpu);
10425         __get_regs(vcpu, regs);
10426         vcpu_put(vcpu);
10427         return 0;
10428 }
10429
10430 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10431 {
10432         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10433         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10434
10435         kvm_rax_write(vcpu, regs->rax);
10436         kvm_rbx_write(vcpu, regs->rbx);
10437         kvm_rcx_write(vcpu, regs->rcx);
10438         kvm_rdx_write(vcpu, regs->rdx);
10439         kvm_rsi_write(vcpu, regs->rsi);
10440         kvm_rdi_write(vcpu, regs->rdi);
10441         kvm_rsp_write(vcpu, regs->rsp);
10442         kvm_rbp_write(vcpu, regs->rbp);
10443 #ifdef CONFIG_X86_64
10444         kvm_r8_write(vcpu, regs->r8);
10445         kvm_r9_write(vcpu, regs->r9);
10446         kvm_r10_write(vcpu, regs->r10);
10447         kvm_r11_write(vcpu, regs->r11);
10448         kvm_r12_write(vcpu, regs->r12);
10449         kvm_r13_write(vcpu, regs->r13);
10450         kvm_r14_write(vcpu, regs->r14);
10451         kvm_r15_write(vcpu, regs->r15);
10452 #endif
10453
10454         kvm_rip_write(vcpu, regs->rip);
10455         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10456
10457         vcpu->arch.exception.pending = false;
10458
10459         kvm_make_request(KVM_REQ_EVENT, vcpu);
10460 }
10461
10462 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10463 {
10464         vcpu_load(vcpu);
10465         __set_regs(vcpu, regs);
10466         vcpu_put(vcpu);
10467         return 0;
10468 }
10469
10470 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10471 {
10472         struct kvm_segment cs;
10473
10474         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10475         *db = cs.db;
10476         *l = cs.l;
10477 }
10478 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10479
10480 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10481 {
10482         struct desc_ptr dt;
10483
10484         if (vcpu->arch.guest_state_protected)
10485                 goto skip_protected_regs;
10486
10487         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10488         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10489         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10490         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10491         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10492         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10493
10494         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10495         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10496
10497         static_call(kvm_x86_get_idt)(vcpu, &dt);
10498         sregs->idt.limit = dt.size;
10499         sregs->idt.base = dt.address;
10500         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10501         sregs->gdt.limit = dt.size;
10502         sregs->gdt.base = dt.address;
10503
10504         sregs->cr2 = vcpu->arch.cr2;
10505         sregs->cr3 = kvm_read_cr3(vcpu);
10506
10507 skip_protected_regs:
10508         sregs->cr0 = kvm_read_cr0(vcpu);
10509         sregs->cr4 = kvm_read_cr4(vcpu);
10510         sregs->cr8 = kvm_get_cr8(vcpu);
10511         sregs->efer = vcpu->arch.efer;
10512         sregs->apic_base = kvm_get_apic_base(vcpu);
10513 }
10514
10515 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10516 {
10517         __get_sregs_common(vcpu, sregs);
10518
10519         if (vcpu->arch.guest_state_protected)
10520                 return;
10521
10522         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10523                 set_bit(vcpu->arch.interrupt.nr,
10524                         (unsigned long *)sregs->interrupt_bitmap);
10525 }
10526
10527 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10528 {
10529         int i;
10530
10531         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10532
10533         if (vcpu->arch.guest_state_protected)
10534                 return;
10535
10536         if (is_pae_paging(vcpu)) {
10537                 for (i = 0 ; i < 4 ; i++)
10538                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10539                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10540         }
10541 }
10542
10543 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10544                                   struct kvm_sregs *sregs)
10545 {
10546         vcpu_load(vcpu);
10547         __get_sregs(vcpu, sregs);
10548         vcpu_put(vcpu);
10549         return 0;
10550 }
10551
10552 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10553                                     struct kvm_mp_state *mp_state)
10554 {
10555         int r;
10556
10557         vcpu_load(vcpu);
10558         if (kvm_mpx_supported())
10559                 kvm_load_guest_fpu(vcpu);
10560
10561         r = kvm_apic_accept_events(vcpu);
10562         if (r < 0)
10563                 goto out;
10564         r = 0;
10565
10566         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10567              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10568             vcpu->arch.pv.pv_unhalted)
10569                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10570         else
10571                 mp_state->mp_state = vcpu->arch.mp_state;
10572
10573 out:
10574         if (kvm_mpx_supported())
10575                 kvm_put_guest_fpu(vcpu);
10576         vcpu_put(vcpu);
10577         return r;
10578 }
10579
10580 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10581                                     struct kvm_mp_state *mp_state)
10582 {
10583         int ret = -EINVAL;
10584
10585         vcpu_load(vcpu);
10586
10587         if (!lapic_in_kernel(vcpu) &&
10588             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10589                 goto out;
10590
10591         /*
10592          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10593          * INIT state; latched init should be reported using
10594          * KVM_SET_VCPU_EVENTS, so reject it here.
10595          */
10596         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10597             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10598              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10599                 goto out;
10600
10601         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10602                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10603                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10604         } else
10605                 vcpu->arch.mp_state = mp_state->mp_state;
10606         kvm_make_request(KVM_REQ_EVENT, vcpu);
10607
10608         ret = 0;
10609 out:
10610         vcpu_put(vcpu);
10611         return ret;
10612 }
10613
10614 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10615                     int reason, bool has_error_code, u32 error_code)
10616 {
10617         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10618         int ret;
10619
10620         init_emulate_ctxt(vcpu);
10621
10622         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10623                                    has_error_code, error_code);
10624         if (ret) {
10625                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10626                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10627                 vcpu->run->internal.ndata = 0;
10628                 return 0;
10629         }
10630
10631         kvm_rip_write(vcpu, ctxt->eip);
10632         kvm_set_rflags(vcpu, ctxt->eflags);
10633         return 1;
10634 }
10635 EXPORT_SYMBOL_GPL(kvm_task_switch);
10636
10637 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10638 {
10639         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10640                 /*
10641                  * When EFER.LME and CR0.PG are set, the processor is in
10642                  * 64-bit mode (though maybe in a 32-bit code segment).
10643                  * CR4.PAE and EFER.LMA must be set.
10644                  */
10645                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10646                         return false;
10647                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10648                         return false;
10649         } else {
10650                 /*
10651                  * Not in 64-bit mode: EFER.LMA is clear and the code
10652                  * segment cannot be 64-bit.
10653                  */
10654                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10655                         return false;
10656         }
10657
10658         return kvm_is_valid_cr4(vcpu, sregs->cr4) &&
10659                kvm_is_valid_cr0(vcpu, sregs->cr0);
10660 }
10661
10662 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10663                 int *mmu_reset_needed, bool update_pdptrs)
10664 {
10665         struct msr_data apic_base_msr;
10666         int idx;
10667         struct desc_ptr dt;
10668
10669         if (!kvm_is_valid_sregs(vcpu, sregs))
10670                 return -EINVAL;
10671
10672         apic_base_msr.data = sregs->apic_base;
10673         apic_base_msr.host_initiated = true;
10674         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10675                 return -EINVAL;
10676
10677         if (vcpu->arch.guest_state_protected)
10678                 return 0;
10679
10680         dt.size = sregs->idt.limit;
10681         dt.address = sregs->idt.base;
10682         static_call(kvm_x86_set_idt)(vcpu, &dt);
10683         dt.size = sregs->gdt.limit;
10684         dt.address = sregs->gdt.base;
10685         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10686
10687         vcpu->arch.cr2 = sregs->cr2;
10688         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10689         vcpu->arch.cr3 = sregs->cr3;
10690         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10691
10692         kvm_set_cr8(vcpu, sregs->cr8);
10693
10694         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10695         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10696
10697         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10698         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10699         vcpu->arch.cr0 = sregs->cr0;
10700
10701         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10702         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10703
10704         if (update_pdptrs) {
10705                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10706                 if (is_pae_paging(vcpu)) {
10707                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10708                         *mmu_reset_needed = 1;
10709                 }
10710                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10711         }
10712
10713         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10714         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10715         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10716         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10717         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10718         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10719
10720         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10721         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10722
10723         update_cr8_intercept(vcpu);
10724
10725         /* Older userspace won't unhalt the vcpu on reset. */
10726         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10727             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10728             !is_protmode(vcpu))
10729                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10730
10731         return 0;
10732 }
10733
10734 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10735 {
10736         int pending_vec, max_bits;
10737         int mmu_reset_needed = 0;
10738         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10739
10740         if (ret)
10741                 return ret;
10742
10743         if (mmu_reset_needed)
10744                 kvm_mmu_reset_context(vcpu);
10745
10746         max_bits = KVM_NR_INTERRUPTS;
10747         pending_vec = find_first_bit(
10748                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10749
10750         if (pending_vec < max_bits) {
10751                 kvm_queue_interrupt(vcpu, pending_vec, false);
10752                 pr_debug("Set back pending irq %d\n", pending_vec);
10753                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10754         }
10755         return 0;
10756 }
10757
10758 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10759 {
10760         int mmu_reset_needed = 0;
10761         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10762         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10763                 !(sregs2->efer & EFER_LMA);
10764         int i, ret;
10765
10766         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10767                 return -EINVAL;
10768
10769         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10770                 return -EINVAL;
10771
10772         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10773                                  &mmu_reset_needed, !valid_pdptrs);
10774         if (ret)
10775                 return ret;
10776
10777         if (valid_pdptrs) {
10778                 for (i = 0; i < 4 ; i++)
10779                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10780
10781                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10782                 mmu_reset_needed = 1;
10783                 vcpu->arch.pdptrs_from_userspace = true;
10784         }
10785         if (mmu_reset_needed)
10786                 kvm_mmu_reset_context(vcpu);
10787         return 0;
10788 }
10789
10790 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10791                                   struct kvm_sregs *sregs)
10792 {
10793         int ret;
10794
10795         vcpu_load(vcpu);
10796         ret = __set_sregs(vcpu, sregs);
10797         vcpu_put(vcpu);
10798         return ret;
10799 }
10800
10801 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10802                                         struct kvm_guest_debug *dbg)
10803 {
10804         unsigned long rflags;
10805         int i, r;
10806
10807         if (vcpu->arch.guest_state_protected)
10808                 return -EINVAL;
10809
10810         vcpu_load(vcpu);
10811
10812         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10813                 r = -EBUSY;
10814                 if (vcpu->arch.exception.pending)
10815                         goto out;
10816                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10817                         kvm_queue_exception(vcpu, DB_VECTOR);
10818                 else
10819                         kvm_queue_exception(vcpu, BP_VECTOR);
10820         }
10821
10822         /*
10823          * Read rflags as long as potentially injected trace flags are still
10824          * filtered out.
10825          */
10826         rflags = kvm_get_rflags(vcpu);
10827
10828         vcpu->guest_debug = dbg->control;
10829         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10830                 vcpu->guest_debug = 0;
10831
10832         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10833                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10834                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10835                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10836         } else {
10837                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10838                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10839         }
10840         kvm_update_dr7(vcpu);
10841
10842         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10843                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10844
10845         /*
10846          * Trigger an rflags update that will inject or remove the trace
10847          * flags.
10848          */
10849         kvm_set_rflags(vcpu, rflags);
10850
10851         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10852
10853         r = 0;
10854
10855 out:
10856         vcpu_put(vcpu);
10857         return r;
10858 }
10859
10860 /*
10861  * Translate a guest virtual address to a guest physical address.
10862  */
10863 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10864                                     struct kvm_translation *tr)
10865 {
10866         unsigned long vaddr = tr->linear_address;
10867         gpa_t gpa;
10868         int idx;
10869
10870         vcpu_load(vcpu);
10871
10872         idx = srcu_read_lock(&vcpu->kvm->srcu);
10873         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10874         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10875         tr->physical_address = gpa;
10876         tr->valid = gpa != UNMAPPED_GVA;
10877         tr->writeable = 1;
10878         tr->usermode = 0;
10879
10880         vcpu_put(vcpu);
10881         return 0;
10882 }
10883
10884 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10885 {
10886         struct fxregs_state *fxsave;
10887
10888         if (!vcpu->arch.guest_fpu)
10889                 return 0;
10890
10891         vcpu_load(vcpu);
10892
10893         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10894         memcpy(fpu->fpr, fxsave->st_space, 128);
10895         fpu->fcw = fxsave->cwd;
10896         fpu->fsw = fxsave->swd;
10897         fpu->ftwx = fxsave->twd;
10898         fpu->last_opcode = fxsave->fop;
10899         fpu->last_ip = fxsave->rip;
10900         fpu->last_dp = fxsave->rdp;
10901         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10902
10903         vcpu_put(vcpu);
10904         return 0;
10905 }
10906
10907 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10908 {
10909         struct fxregs_state *fxsave;
10910
10911         if (!vcpu->arch.guest_fpu)
10912                 return 0;
10913
10914         vcpu_load(vcpu);
10915
10916         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10917
10918         memcpy(fxsave->st_space, fpu->fpr, 128);
10919         fxsave->cwd = fpu->fcw;
10920         fxsave->swd = fpu->fsw;
10921         fxsave->twd = fpu->ftwx;
10922         fxsave->fop = fpu->last_opcode;
10923         fxsave->rip = fpu->last_ip;
10924         fxsave->rdp = fpu->last_dp;
10925         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10926
10927         vcpu_put(vcpu);
10928         return 0;
10929 }
10930
10931 static void store_regs(struct kvm_vcpu *vcpu)
10932 {
10933         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10934
10935         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10936                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10937
10938         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10939                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10940
10941         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10942                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10943                                 vcpu, &vcpu->run->s.regs.events);
10944 }
10945
10946 static int sync_regs(struct kvm_vcpu *vcpu)
10947 {
10948         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10949                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10950                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10951         }
10952         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10953                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10954                         return -EINVAL;
10955                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10956         }
10957         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10958                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10959                                 vcpu, &vcpu->run->s.regs.events))
10960                         return -EINVAL;
10961                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10962         }
10963
10964         return 0;
10965 }
10966
10967 static void fx_init(struct kvm_vcpu *vcpu)
10968 {
10969         if (!vcpu->arch.guest_fpu)
10970                 return;
10971
10972         fpstate_init(&vcpu->arch.guest_fpu->state);
10973         if (boot_cpu_has(X86_FEATURE_XSAVES))
10974                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10975                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10976
10977         /*
10978          * Ensure guest xcr0 is valid for loading
10979          */
10980         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10981
10982         vcpu->arch.cr0 |= X86_CR0_ET;
10983 }
10984
10985 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10986 {
10987         if (vcpu->arch.guest_fpu) {
10988                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10989                 vcpu->arch.guest_fpu = NULL;
10990         }
10991 }
10992 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10993
10994 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10995 {
10996         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10997                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10998                              "guest TSC will not be reliable\n");
10999
11000         return 0;
11001 }
11002
11003 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11004 {
11005         struct page *page;
11006         int r;
11007
11008         vcpu->arch.last_vmentry_cpu = -1;
11009         vcpu->arch.regs_avail = ~0;
11010         vcpu->arch.regs_dirty = ~0;
11011
11012         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11013                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11014         else
11015                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11016
11017         r = kvm_mmu_create(vcpu);
11018         if (r < 0)
11019                 return r;
11020
11021         if (irqchip_in_kernel(vcpu->kvm)) {
11022                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11023                 if (r < 0)
11024                         goto fail_mmu_destroy;
11025
11026                 /*
11027                  * Defer evaluating inhibits until the vCPU is first run, as
11028                  * this vCPU will not get notified of any changes until this
11029                  * vCPU is visible to other vCPUs (marked online and added to
11030                  * the set of vCPUs).  Opportunistically mark APICv active as
11031                  * VMX in particularly is highly unlikely to have inhibits.
11032                  * Ignore the current per-VM APICv state so that vCPU creation
11033                  * is guaranteed to run with a deterministic value, the request
11034                  * will ensure the vCPU gets the correct state before VM-Entry.
11035                  */
11036                 if (enable_apicv) {
11037                         vcpu->arch.apicv_active = true;
11038                         kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11039                 }
11040         } else
11041                 static_branch_inc(&kvm_has_noapic_vcpu);
11042
11043         r = -ENOMEM;
11044
11045         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11046         if (!page)
11047                 goto fail_free_lapic;
11048         vcpu->arch.pio_data = page_address(page);
11049
11050         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11051                                        GFP_KERNEL_ACCOUNT);
11052         if (!vcpu->arch.mce_banks)
11053                 goto fail_free_pio_data;
11054         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11055
11056         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11057                                 GFP_KERNEL_ACCOUNT))
11058                 goto fail_free_mce_banks;
11059
11060         if (!alloc_emulate_ctxt(vcpu))
11061                 goto free_wbinvd_dirty_mask;
11062
11063         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
11064                                                 GFP_KERNEL_ACCOUNT);
11065         if (!vcpu->arch.user_fpu) {
11066                 pr_err("kvm: failed to allocate userspace's fpu\n");
11067                 goto free_emulate_ctxt;
11068         }
11069
11070         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
11071                                                  GFP_KERNEL_ACCOUNT);
11072         if (!vcpu->arch.guest_fpu) {
11073                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11074                 goto free_user_fpu;
11075         }
11076         fx_init(vcpu);
11077
11078         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11079         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11080
11081         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11082
11083         kvm_async_pf_hash_reset(vcpu);
11084         kvm_pmu_init(vcpu);
11085
11086         vcpu->arch.pending_external_vector = -1;
11087         vcpu->arch.preempted_in_kernel = false;
11088
11089 #if IS_ENABLED(CONFIG_HYPERV)
11090         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11091 #endif
11092
11093         r = static_call(kvm_x86_vcpu_create)(vcpu);
11094         if (r)
11095                 goto free_guest_fpu;
11096
11097         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11098         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11099         kvm_vcpu_mtrr_init(vcpu);
11100         vcpu_load(vcpu);
11101         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11102         kvm_vcpu_reset(vcpu, false);
11103         kvm_init_mmu(vcpu);
11104         vcpu_put(vcpu);
11105         return 0;
11106
11107 free_guest_fpu:
11108         kvm_free_guest_fpu(vcpu);
11109 free_user_fpu:
11110         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11111 free_emulate_ctxt:
11112         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11113 free_wbinvd_dirty_mask:
11114         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11115 fail_free_mce_banks:
11116         kfree(vcpu->arch.mce_banks);
11117 fail_free_pio_data:
11118         free_page((unsigned long)vcpu->arch.pio_data);
11119 fail_free_lapic:
11120         kvm_free_lapic(vcpu);
11121 fail_mmu_destroy:
11122         kvm_mmu_destroy(vcpu);
11123         return r;
11124 }
11125
11126 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11127 {
11128         struct kvm *kvm = vcpu->kvm;
11129
11130         if (mutex_lock_killable(&vcpu->mutex))
11131                 return;
11132         vcpu_load(vcpu);
11133         kvm_synchronize_tsc(vcpu, 0);
11134         vcpu_put(vcpu);
11135
11136         /* poll control enabled by default */
11137         vcpu->arch.msr_kvm_poll_control = 1;
11138
11139         mutex_unlock(&vcpu->mutex);
11140
11141         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11142                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11143                                                 KVMCLOCK_SYNC_PERIOD);
11144 }
11145
11146 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11147 {
11148         int idx;
11149
11150         kvmclock_reset(vcpu);
11151
11152         static_call(kvm_x86_vcpu_free)(vcpu);
11153
11154         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11155         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11156         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11157         kvm_free_guest_fpu(vcpu);
11158
11159         kvm_hv_vcpu_uninit(vcpu);
11160         kvm_pmu_destroy(vcpu);
11161         kfree(vcpu->arch.mce_banks);
11162         kvm_free_lapic(vcpu);
11163         idx = srcu_read_lock(&vcpu->kvm->srcu);
11164         kvm_mmu_destroy(vcpu);
11165         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11166         free_page((unsigned long)vcpu->arch.pio_data);
11167         kvfree(vcpu->arch.cpuid_entries);
11168         if (!lapic_in_kernel(vcpu))
11169                 static_branch_dec(&kvm_has_noapic_vcpu);
11170 }
11171
11172 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11173 {
11174         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11175         unsigned long new_cr0;
11176         u32 eax, dummy;
11177
11178         /*
11179          * SVM doesn't unconditionally VM-Exit on INIT and SHUTDOWN, thus it's
11180          * possible to INIT the vCPU while L2 is active.  Force the vCPU back
11181          * into L1 as EFER.SVME is cleared on INIT (along with all other EFER
11182          * bits), i.e. virtualization is disabled.
11183          */
11184         if (is_guest_mode(vcpu))
11185                 kvm_leave_nested(vcpu);
11186
11187         kvm_lapic_reset(vcpu, init_event);
11188
11189         WARN_ON_ONCE(is_guest_mode(vcpu) || is_smm(vcpu));
11190         vcpu->arch.hflags = 0;
11191
11192         vcpu->arch.smi_pending = 0;
11193         vcpu->arch.smi_count = 0;
11194         atomic_set(&vcpu->arch.nmi_queued, 0);
11195         vcpu->arch.nmi_pending = 0;
11196         vcpu->arch.nmi_injected = false;
11197         kvm_clear_interrupt_queue(vcpu);
11198         kvm_clear_exception_queue(vcpu);
11199
11200         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11201         kvm_update_dr0123(vcpu);
11202         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11203         vcpu->arch.dr7 = DR7_FIXED_1;
11204         kvm_update_dr7(vcpu);
11205
11206         vcpu->arch.cr2 = 0;
11207
11208         kvm_make_request(KVM_REQ_EVENT, vcpu);
11209         vcpu->arch.apf.msr_en_val = 0;
11210         vcpu->arch.apf.msr_int_val = 0;
11211         vcpu->arch.st.msr_val = 0;
11212
11213         kvmclock_reset(vcpu);
11214
11215         kvm_clear_async_pf_completion_queue(vcpu);
11216         kvm_async_pf_hash_reset(vcpu);
11217         vcpu->arch.apf.halted = false;
11218
11219         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
11220                 void *mpx_state_buffer;
11221
11222                 /*
11223                  * To avoid have the INIT path from kvm_apic_has_events() that be
11224                  * called with loaded FPU and does not let userspace fix the state.
11225                  */
11226                 if (init_event)
11227                         kvm_put_guest_fpu(vcpu);
11228                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11229                                         XFEATURE_BNDREGS);
11230                 if (mpx_state_buffer)
11231                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
11232                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11233                                         XFEATURE_BNDCSR);
11234                 if (mpx_state_buffer)
11235                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
11236                 if (init_event)
11237                         kvm_load_guest_fpu(vcpu);
11238         }
11239
11240         if (!init_event) {
11241                 kvm_pmu_reset(vcpu);
11242                 vcpu->arch.smbase = 0x30000;
11243
11244                 vcpu->arch.msr_misc_features_enables = 0;
11245
11246                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11247                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11248         }
11249
11250         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11251         vcpu->arch.regs_avail = ~0;
11252         vcpu->arch.regs_dirty = ~0;
11253
11254         /*
11255          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11256          * if no CPUID match is found.  Note, it's impossible to get a match at
11257          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11258          * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11259          * But, go through the motions in case that's ever remedied.
11260          */
11261         eax = 1;
11262         if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
11263                 eax = 0x600;
11264         kvm_rdx_write(vcpu, eax);
11265
11266         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11267
11268         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11269         kvm_rip_write(vcpu, 0xfff0);
11270
11271         vcpu->arch.cr3 = 0;
11272         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11273
11274         /*
11275          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11276          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11277          * (or qualify) that with a footnote stating that CD/NW are preserved.
11278          */
11279         new_cr0 = X86_CR0_ET;
11280         if (init_event)
11281                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11282         else
11283                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11284
11285         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11286         static_call(kvm_x86_set_cr4)(vcpu, 0);
11287         static_call(kvm_x86_set_efer)(vcpu, 0);
11288         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11289
11290         /*
11291          * Reset the MMU context if paging was enabled prior to INIT (which is
11292          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11293          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11294          * checked because it is unconditionally cleared on INIT and all other
11295          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11296          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11297          */
11298         if (old_cr0 & X86_CR0_PG)
11299                 kvm_mmu_reset_context(vcpu);
11300
11301         /*
11302          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11303          * APM states the TLBs are untouched by INIT, but it also states that
11304          * the TLBs are flushed on "External initialization of the processor."
11305          * Flush the guest TLB regardless of vendor, there is no meaningful
11306          * benefit in relying on the guest to flush the TLB immediately after
11307          * INIT.  A spurious TLB flush is benign and likely negligible from a
11308          * performance perspective.
11309          */
11310         if (init_event)
11311                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11312 }
11313 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11314
11315 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11316 {
11317         struct kvm_segment cs;
11318
11319         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11320         cs.selector = vector << 8;
11321         cs.base = vector << 12;
11322         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11323         kvm_rip_write(vcpu, 0);
11324 }
11325 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11326
11327 int kvm_arch_hardware_enable(void)
11328 {
11329         struct kvm *kvm;
11330         struct kvm_vcpu *vcpu;
11331         int i;
11332         int ret;
11333         u64 local_tsc;
11334         u64 max_tsc = 0;
11335         bool stable, backwards_tsc = false;
11336
11337         kvm_user_return_msr_cpu_online();
11338         ret = static_call(kvm_x86_hardware_enable)();
11339         if (ret != 0)
11340                 return ret;
11341
11342         local_tsc = rdtsc();
11343         stable = !kvm_check_tsc_unstable();
11344         list_for_each_entry(kvm, &vm_list, vm_list) {
11345                 kvm_for_each_vcpu(i, vcpu, kvm) {
11346                         if (!stable && vcpu->cpu == smp_processor_id())
11347                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11348                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11349                                 backwards_tsc = true;
11350                                 if (vcpu->arch.last_host_tsc > max_tsc)
11351                                         max_tsc = vcpu->arch.last_host_tsc;
11352                         }
11353                 }
11354         }
11355
11356         /*
11357          * Sometimes, even reliable TSCs go backwards.  This happens on
11358          * platforms that reset TSC during suspend or hibernate actions, but
11359          * maintain synchronization.  We must compensate.  Fortunately, we can
11360          * detect that condition here, which happens early in CPU bringup,
11361          * before any KVM threads can be running.  Unfortunately, we can't
11362          * bring the TSCs fully up to date with real time, as we aren't yet far
11363          * enough into CPU bringup that we know how much real time has actually
11364          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11365          * variables that haven't been updated yet.
11366          *
11367          * So we simply find the maximum observed TSC above, then record the
11368          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11369          * the adjustment will be applied.  Note that we accumulate
11370          * adjustments, in case multiple suspend cycles happen before some VCPU
11371          * gets a chance to run again.  In the event that no KVM threads get a
11372          * chance to run, we will miss the entire elapsed period, as we'll have
11373          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11374          * loose cycle time.  This isn't too big a deal, since the loss will be
11375          * uniform across all VCPUs (not to mention the scenario is extremely
11376          * unlikely). It is possible that a second hibernate recovery happens
11377          * much faster than a first, causing the observed TSC here to be
11378          * smaller; this would require additional padding adjustment, which is
11379          * why we set last_host_tsc to the local tsc observed here.
11380          *
11381          * N.B. - this code below runs only on platforms with reliable TSC,
11382          * as that is the only way backwards_tsc is set above.  Also note
11383          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11384          * have the same delta_cyc adjustment applied if backwards_tsc
11385          * is detected.  Note further, this adjustment is only done once,
11386          * as we reset last_host_tsc on all VCPUs to stop this from being
11387          * called multiple times (one for each physical CPU bringup).
11388          *
11389          * Platforms with unreliable TSCs don't have to deal with this, they
11390          * will be compensated by the logic in vcpu_load, which sets the TSC to
11391          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11392          * guarantee that they stay in perfect synchronization.
11393          */
11394         if (backwards_tsc) {
11395                 u64 delta_cyc = max_tsc - local_tsc;
11396                 list_for_each_entry(kvm, &vm_list, vm_list) {
11397                         kvm->arch.backwards_tsc_observed = true;
11398                         kvm_for_each_vcpu(i, vcpu, kvm) {
11399                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11400                                 vcpu->arch.last_host_tsc = local_tsc;
11401                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11402                         }
11403
11404                         /*
11405                          * We have to disable TSC offset matching.. if you were
11406                          * booting a VM while issuing an S4 host suspend....
11407                          * you may have some problem.  Solving this issue is
11408                          * left as an exercise to the reader.
11409                          */
11410                         kvm->arch.last_tsc_nsec = 0;
11411                         kvm->arch.last_tsc_write = 0;
11412                 }
11413
11414         }
11415         return 0;
11416 }
11417
11418 void kvm_arch_hardware_disable(void)
11419 {
11420         static_call(kvm_x86_hardware_disable)();
11421         drop_user_return_notifiers();
11422 }
11423
11424 int kvm_arch_hardware_setup(void *opaque)
11425 {
11426         struct kvm_x86_init_ops *ops = opaque;
11427         int r;
11428
11429         rdmsrl_safe(MSR_EFER, &host_efer);
11430
11431         if (boot_cpu_has(X86_FEATURE_XSAVES))
11432                 rdmsrl(MSR_IA32_XSS, host_xss);
11433
11434         r = ops->hardware_setup();
11435         if (r != 0)
11436                 return r;
11437
11438         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11439         kvm_ops_static_call_update();
11440
11441         if (ops->intel_pt_intr_in_guest && ops->intel_pt_intr_in_guest())
11442                 kvm_guest_cbs.handle_intel_pt_intr = kvm_handle_intel_pt_intr;
11443         perf_register_guest_info_callbacks(&kvm_guest_cbs);
11444
11445         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11446                 supported_xss = 0;
11447
11448 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11449         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11450 #undef __kvm_cpu_cap_has
11451
11452         if (kvm_has_tsc_control) {
11453                 /*
11454                  * Make sure the user can only configure tsc_khz values that
11455                  * fit into a signed integer.
11456                  * A min value is not calculated because it will always
11457                  * be 1 on all machines.
11458                  */
11459                 u64 max = min(0x7fffffffULL,
11460                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11461                 kvm_max_guest_tsc_khz = max;
11462
11463                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11464         }
11465
11466         kvm_init_msr_list();
11467         return 0;
11468 }
11469
11470 void kvm_arch_hardware_unsetup(void)
11471 {
11472         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
11473         kvm_guest_cbs.handle_intel_pt_intr = NULL;
11474
11475         static_call(kvm_x86_hardware_unsetup)();
11476 }
11477
11478 int kvm_arch_check_processor_compat(void *opaque)
11479 {
11480         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11481         struct kvm_x86_init_ops *ops = opaque;
11482
11483         WARN_ON(!irqs_disabled());
11484
11485         if (__cr4_reserved_bits(cpu_has, c) !=
11486             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11487                 return -EIO;
11488
11489         return ops->check_processor_compatibility();
11490 }
11491
11492 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11493 {
11494         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11495 }
11496 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11497
11498 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11499 {
11500         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11501 }
11502
11503 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11504 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11505
11506 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11507 {
11508         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11509
11510         vcpu->arch.l1tf_flush_l1d = true;
11511         if (pmu->version && unlikely(pmu->event_count)) {
11512                 pmu->need_cleanup = true;
11513                 kvm_make_request(KVM_REQ_PMU, vcpu);
11514         }
11515         static_call(kvm_x86_sched_in)(vcpu, cpu);
11516 }
11517
11518 void kvm_arch_free_vm(struct kvm *kvm)
11519 {
11520         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11521         vfree(kvm);
11522 }
11523
11524
11525 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11526 {
11527         int ret;
11528
11529         if (type)
11530                 return -EINVAL;
11531
11532         ret = kvm_page_track_init(kvm);
11533         if (ret)
11534                 return ret;
11535
11536         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11537         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11538         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11539         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11540         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11541         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11542
11543         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11544         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11545         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11546         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11547                 &kvm->arch.irq_sources_bitmap);
11548
11549         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11550         mutex_init(&kvm->arch.apic_map_lock);
11551         raw_spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11552
11553         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11554         pvclock_update_vm_gtod_copy(kvm);
11555
11556         kvm->arch.guest_can_read_msr_platform_info = true;
11557
11558 #if IS_ENABLED(CONFIG_HYPERV)
11559         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11560         kvm->arch.hv_root_tdp = INVALID_PAGE;
11561 #endif
11562
11563         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11564         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11565
11566         kvm_apicv_init(kvm);
11567         kvm_hv_init_vm(kvm);
11568         kvm_mmu_init_vm(kvm);
11569         kvm_xen_init_vm(kvm);
11570
11571         return static_call(kvm_x86_vm_init)(kvm);
11572 }
11573
11574 int kvm_arch_post_init_vm(struct kvm *kvm)
11575 {
11576         return kvm_mmu_post_init_vm(kvm);
11577 }
11578
11579 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11580 {
11581         vcpu_load(vcpu);
11582         kvm_mmu_unload(vcpu);
11583         vcpu_put(vcpu);
11584 }
11585
11586 static void kvm_free_vcpus(struct kvm *kvm)
11587 {
11588         unsigned int i;
11589         struct kvm_vcpu *vcpu;
11590
11591         /*
11592          * Unpin any mmu pages first.
11593          */
11594         kvm_for_each_vcpu(i, vcpu, kvm) {
11595                 kvm_clear_async_pf_completion_queue(vcpu);
11596                 kvm_unload_vcpu_mmu(vcpu);
11597         }
11598         kvm_for_each_vcpu(i, vcpu, kvm)
11599                 kvm_vcpu_destroy(vcpu);
11600
11601         mutex_lock(&kvm->lock);
11602         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11603                 kvm->vcpus[i] = NULL;
11604
11605         atomic_set(&kvm->online_vcpus, 0);
11606         mutex_unlock(&kvm->lock);
11607 }
11608
11609 void kvm_arch_sync_events(struct kvm *kvm)
11610 {
11611         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11612         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11613         kvm_free_pit(kvm);
11614 }
11615
11616 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11617
11618 /**
11619  * __x86_set_memory_region: Setup KVM internal memory slot
11620  *
11621  * @kvm: the kvm pointer to the VM.
11622  * @id: the slot ID to setup.
11623  * @gpa: the GPA to install the slot (unused when @size == 0).
11624  * @size: the size of the slot. Set to zero to uninstall a slot.
11625  *
11626  * This function helps to setup a KVM internal memory slot.  Specify
11627  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11628  * slot.  The return code can be one of the following:
11629  *
11630  *   HVA:           on success (uninstall will return a bogus HVA)
11631  *   -errno:        on error
11632  *
11633  * The caller should always use IS_ERR() to check the return value
11634  * before use.  Note, the KVM internal memory slots are guaranteed to
11635  * remain valid and unchanged until the VM is destroyed, i.e., the
11636  * GPA->HVA translation will not change.  However, the HVA is a user
11637  * address, i.e. its accessibility is not guaranteed, and must be
11638  * accessed via __copy_{to,from}_user().
11639  */
11640 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11641                                       u32 size)
11642 {
11643         int i, r;
11644         unsigned long hva, old_npages;
11645         struct kvm_memslots *slots = kvm_memslots(kvm);
11646         struct kvm_memory_slot *slot;
11647
11648         /* Called with kvm->slots_lock held.  */
11649         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11650                 return ERR_PTR_USR(-EINVAL);
11651
11652         slot = id_to_memslot(slots, id);
11653         if (size) {
11654                 if (slot && slot->npages)
11655                         return ERR_PTR_USR(-EEXIST);
11656
11657                 /*
11658                  * MAP_SHARED to prevent internal slot pages from being moved
11659                  * by fork()/COW.
11660                  */
11661                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11662                               MAP_SHARED | MAP_ANONYMOUS, 0);
11663                 if (IS_ERR((void *)hva))
11664                         return (void __user *)hva;
11665         } else {
11666                 if (!slot || !slot->npages)
11667                         return NULL;
11668
11669                 old_npages = slot->npages;
11670                 hva = slot->userspace_addr;
11671         }
11672
11673         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11674                 struct kvm_userspace_memory_region m;
11675
11676                 m.slot = id | (i << 16);
11677                 m.flags = 0;
11678                 m.guest_phys_addr = gpa;
11679                 m.userspace_addr = hva;
11680                 m.memory_size = size;
11681                 r = __kvm_set_memory_region(kvm, &m);
11682                 if (r < 0)
11683                         return ERR_PTR_USR(r);
11684         }
11685
11686         if (!size)
11687                 vm_munmap(hva, old_npages * PAGE_SIZE);
11688
11689         return (void __user *)hva;
11690 }
11691 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11692
11693 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11694 {
11695         kvm_mmu_pre_destroy_vm(kvm);
11696 }
11697
11698 void kvm_arch_destroy_vm(struct kvm *kvm)
11699 {
11700         if (current->mm == kvm->mm) {
11701                 /*
11702                  * Free memory regions allocated on behalf of userspace,
11703                  * unless the the memory map has changed due to process exit
11704                  * or fd copying.
11705                  */
11706                 mutex_lock(&kvm->slots_lock);
11707                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11708                                         0, 0);
11709                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11710                                         0, 0);
11711                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11712                 mutex_unlock(&kvm->slots_lock);
11713         }
11714         static_call_cond(kvm_x86_vm_destroy)(kvm);
11715         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11716         kvm_pic_destroy(kvm);
11717         kvm_ioapic_destroy(kvm);
11718         kvm_free_vcpus(kvm);
11719         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11720         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11721         kvm_mmu_uninit_vm(kvm);
11722         kvm_page_track_cleanup(kvm);
11723         kvm_xen_destroy_vm(kvm);
11724         kvm_hv_destroy_vm(kvm);
11725 }
11726
11727 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11728 {
11729         int i;
11730
11731         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11732                 kvfree(slot->arch.rmap[i]);
11733                 slot->arch.rmap[i] = NULL;
11734         }
11735 }
11736
11737 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11738 {
11739         int i;
11740
11741         memslot_rmap_free(slot);
11742
11743         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11744                 kvfree(slot->arch.lpage_info[i - 1]);
11745                 slot->arch.lpage_info[i - 1] = NULL;
11746         }
11747
11748         kvm_page_track_free_memslot(slot);
11749 }
11750
11751 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11752                               unsigned long npages)
11753 {
11754         const int sz = sizeof(*slot->arch.rmap[0]);
11755         int i;
11756
11757         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11758                 int level = i + 1;
11759                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11760
11761                 if (slot->arch.rmap[i])
11762                         continue;
11763
11764                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11765                 if (!slot->arch.rmap[i]) {
11766                         memslot_rmap_free(slot);
11767                         return -ENOMEM;
11768                 }
11769         }
11770
11771         return 0;
11772 }
11773
11774 int alloc_all_memslots_rmaps(struct kvm *kvm)
11775 {
11776         struct kvm_memslots *slots;
11777         struct kvm_memory_slot *slot;
11778         int r, i;
11779
11780         /*
11781          * Check if memslots alreday have rmaps early before acquiring
11782          * the slots_arch_lock below.
11783          */
11784         if (kvm_memslots_have_rmaps(kvm))
11785                 return 0;
11786
11787         mutex_lock(&kvm->slots_arch_lock);
11788
11789         /*
11790          * Read memslots_have_rmaps again, under the slots arch lock,
11791          * before allocating the rmaps
11792          */
11793         if (kvm_memslots_have_rmaps(kvm)) {
11794                 mutex_unlock(&kvm->slots_arch_lock);
11795                 return 0;
11796         }
11797
11798         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11799                 slots = __kvm_memslots(kvm, i);
11800                 kvm_for_each_memslot(slot, slots) {
11801                         r = memslot_rmap_alloc(slot, slot->npages);
11802                         if (r) {
11803                                 mutex_unlock(&kvm->slots_arch_lock);
11804                                 return r;
11805                         }
11806                 }
11807         }
11808
11809         /*
11810          * Ensure that memslots_have_rmaps becomes true strictly after
11811          * all the rmap pointers are set.
11812          */
11813         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11814         mutex_unlock(&kvm->slots_arch_lock);
11815         return 0;
11816 }
11817
11818 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11819                                       struct kvm_memory_slot *slot,
11820                                       unsigned long npages)
11821 {
11822         int i, r;
11823
11824         /*
11825          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11826          * old arrays will be freed by __kvm_set_memory_region() if installing
11827          * the new memslot is successful.
11828          */
11829         memset(&slot->arch, 0, sizeof(slot->arch));
11830
11831         if (kvm_memslots_have_rmaps(kvm)) {
11832                 r = memslot_rmap_alloc(slot, npages);
11833                 if (r)
11834                         return r;
11835         }
11836
11837         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11838                 struct kvm_lpage_info *linfo;
11839                 unsigned long ugfn;
11840                 int lpages;
11841                 int level = i + 1;
11842
11843                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11844
11845                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11846                 if (!linfo)
11847                         goto out_free;
11848
11849                 slot->arch.lpage_info[i - 1] = linfo;
11850
11851                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11852                         linfo[0].disallow_lpage = 1;
11853                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11854                         linfo[lpages - 1].disallow_lpage = 1;
11855                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11856                 /*
11857                  * If the gfn and userspace address are not aligned wrt each
11858                  * other, disable large page support for this slot.
11859                  */
11860                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11861                         unsigned long j;
11862
11863                         for (j = 0; j < lpages; ++j)
11864                                 linfo[j].disallow_lpage = 1;
11865                 }
11866         }
11867
11868         if (kvm_page_track_create_memslot(slot, npages))
11869                 goto out_free;
11870
11871         return 0;
11872
11873 out_free:
11874         memslot_rmap_free(slot);
11875
11876         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11877                 kvfree(slot->arch.lpage_info[i - 1]);
11878                 slot->arch.lpage_info[i - 1] = NULL;
11879         }
11880         return -ENOMEM;
11881 }
11882
11883 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11884 {
11885         struct kvm_vcpu *vcpu;
11886         int i;
11887
11888         /*
11889          * memslots->generation has been incremented.
11890          * mmio generation may have reached its maximum value.
11891          */
11892         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11893
11894         /* Force re-initialization of steal_time cache */
11895         kvm_for_each_vcpu(i, vcpu, kvm)
11896                 kvm_vcpu_kick(vcpu);
11897 }
11898
11899 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11900                                 struct kvm_memory_slot *memslot,
11901                                 const struct kvm_userspace_memory_region *mem,
11902                                 enum kvm_mr_change change)
11903 {
11904         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11905                 return kvm_alloc_memslot_metadata(kvm, memslot,
11906                                                   mem->memory_size >> PAGE_SHIFT);
11907         return 0;
11908 }
11909
11910
11911 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11912 {
11913         struct kvm_arch *ka = &kvm->arch;
11914
11915         if (!kvm_x86_ops.cpu_dirty_log_size)
11916                 return;
11917
11918         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11919             (!enable && --ka->cpu_dirty_logging_count == 0))
11920                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11921
11922         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11923 }
11924
11925 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11926                                      struct kvm_memory_slot *old,
11927                                      const struct kvm_memory_slot *new,
11928                                      enum kvm_mr_change change)
11929 {
11930         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11931
11932         /*
11933          * Update CPU dirty logging if dirty logging is being toggled.  This
11934          * applies to all operations.
11935          */
11936         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11937                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11938
11939         /*
11940          * Nothing more to do for RO slots (which can't be dirtied and can't be
11941          * made writable) or CREATE/MOVE/DELETE of a slot.
11942          *
11943          * For a memslot with dirty logging disabled:
11944          * CREATE:      No dirty mappings will already exist.
11945          * MOVE/DELETE: The old mappings will already have been cleaned up by
11946          *              kvm_arch_flush_shadow_memslot()
11947          *
11948          * For a memslot with dirty logging enabled:
11949          * CREATE:      No shadow pages exist, thus nothing to write-protect
11950          *              and no dirty bits to clear.
11951          * MOVE/DELETE: The old mappings will already have been cleaned up by
11952          *              kvm_arch_flush_shadow_memslot().
11953          */
11954         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11955                 return;
11956
11957         /*
11958          * READONLY and non-flags changes were filtered out above, and the only
11959          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11960          * logging isn't being toggled on or off.
11961          */
11962         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11963                 return;
11964
11965         if (!log_dirty_pages) {
11966                 /*
11967                  * Dirty logging tracks sptes in 4k granularity, meaning that
11968                  * large sptes have to be split.  If live migration succeeds,
11969                  * the guest in the source machine will be destroyed and large
11970                  * sptes will be created in the destination.  However, if the
11971                  * guest continues to run in the source machine (for example if
11972                  * live migration fails), small sptes will remain around and
11973                  * cause bad performance.
11974                  *
11975                  * Scan sptes if dirty logging has been stopped, dropping those
11976                  * which can be collapsed into a single large-page spte.  Later
11977                  * page faults will create the large-page sptes.
11978                  */
11979                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11980         } else {
11981                 /*
11982                  * Initially-all-set does not require write protecting any page,
11983                  * because they're all assumed to be dirty.
11984                  */
11985                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11986                         return;
11987
11988                 if (kvm_x86_ops.cpu_dirty_log_size) {
11989                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11990                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11991                 } else {
11992                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11993                 }
11994         }
11995 }
11996
11997 void kvm_arch_commit_memory_region(struct kvm *kvm,
11998                                 const struct kvm_userspace_memory_region *mem,
11999                                 struct kvm_memory_slot *old,
12000                                 const struct kvm_memory_slot *new,
12001                                 enum kvm_mr_change change)
12002 {
12003         if (!kvm->arch.n_requested_mmu_pages)
12004                 kvm_mmu_change_mmu_pages(kvm,
12005                                 kvm_mmu_calculate_default_mmu_pages(kvm));
12006
12007         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12008
12009         /* Free the arrays associated with the old memslot. */
12010         if (change == KVM_MR_MOVE)
12011                 kvm_arch_free_memslot(kvm, old);
12012 }
12013
12014 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12015 {
12016         kvm_mmu_zap_all(kvm);
12017 }
12018
12019 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12020                                    struct kvm_memory_slot *slot)
12021 {
12022         kvm_page_track_flush_slot(kvm, slot);
12023 }
12024
12025 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12026 {
12027         return (is_guest_mode(vcpu) &&
12028                         kvm_x86_ops.guest_apic_has_interrupt &&
12029                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12030 }
12031
12032 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12033 {
12034         if (!list_empty_careful(&vcpu->async_pf.done))
12035                 return true;
12036
12037         if (kvm_apic_has_events(vcpu))
12038                 return true;
12039
12040         if (vcpu->arch.pv.pv_unhalted)
12041                 return true;
12042
12043         if (vcpu->arch.exception.pending)
12044                 return true;
12045
12046         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12047             (vcpu->arch.nmi_pending &&
12048              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12049                 return true;
12050
12051         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12052             (vcpu->arch.smi_pending &&
12053              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12054                 return true;
12055
12056         if (kvm_arch_interrupt_allowed(vcpu) &&
12057             (kvm_cpu_has_interrupt(vcpu) ||
12058             kvm_guest_apic_has_interrupt(vcpu)))
12059                 return true;
12060
12061         if (kvm_hv_has_stimer_pending(vcpu))
12062                 return true;
12063
12064         if (is_guest_mode(vcpu) &&
12065             kvm_x86_ops.nested_ops->hv_timer_pending &&
12066             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12067                 return true;
12068
12069         return false;
12070 }
12071
12072 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12073 {
12074         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12075 }
12076
12077 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12078 {
12079         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12080                 return true;
12081
12082         return false;
12083 }
12084
12085 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12086 {
12087         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12088                 return true;
12089
12090         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12091                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12092                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12093                 return true;
12094
12095         return kvm_arch_dy_has_pending_interrupt(vcpu);
12096 }
12097
12098 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12099 {
12100         if (vcpu->arch.guest_state_protected)
12101                 return true;
12102
12103         return vcpu->arch.preempted_in_kernel;
12104 }
12105
12106 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12107 {
12108         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12109 }
12110
12111 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12112 {
12113         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12114 }
12115
12116 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12117 {
12118         /* Can't read the RIP when guest state is protected, just return 0 */
12119         if (vcpu->arch.guest_state_protected)
12120                 return 0;
12121
12122         if (is_64_bit_mode(vcpu))
12123                 return kvm_rip_read(vcpu);
12124         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12125                      kvm_rip_read(vcpu));
12126 }
12127 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12128
12129 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12130 {
12131         return kvm_get_linear_rip(vcpu) == linear_rip;
12132 }
12133 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12134
12135 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12136 {
12137         unsigned long rflags;
12138
12139         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12140         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12141                 rflags &= ~X86_EFLAGS_TF;
12142         return rflags;
12143 }
12144 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12145
12146 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12147 {
12148         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12149             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12150                 rflags |= X86_EFLAGS_TF;
12151         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12152 }
12153
12154 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12155 {
12156         __kvm_set_rflags(vcpu, rflags);
12157         kvm_make_request(KVM_REQ_EVENT, vcpu);
12158 }
12159 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12160
12161 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12162 {
12163         int r;
12164
12165         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12166               work->wakeup_all)
12167                 return;
12168
12169         r = kvm_mmu_reload(vcpu);
12170         if (unlikely(r))
12171                 return;
12172
12173         if (!vcpu->arch.mmu->direct_map &&
12174               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12175                 return;
12176
12177         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12178 }
12179
12180 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12181 {
12182         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12183
12184         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12185 }
12186
12187 static inline u32 kvm_async_pf_next_probe(u32 key)
12188 {
12189         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12190 }
12191
12192 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12193 {
12194         u32 key = kvm_async_pf_hash_fn(gfn);
12195
12196         while (vcpu->arch.apf.gfns[key] != ~0)
12197                 key = kvm_async_pf_next_probe(key);
12198
12199         vcpu->arch.apf.gfns[key] = gfn;
12200 }
12201
12202 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12203 {
12204         int i;
12205         u32 key = kvm_async_pf_hash_fn(gfn);
12206
12207         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12208                      (vcpu->arch.apf.gfns[key] != gfn &&
12209                       vcpu->arch.apf.gfns[key] != ~0); i++)
12210                 key = kvm_async_pf_next_probe(key);
12211
12212         return key;
12213 }
12214
12215 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12216 {
12217         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12218 }
12219
12220 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12221 {
12222         u32 i, j, k;
12223
12224         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12225
12226         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12227                 return;
12228
12229         while (true) {
12230                 vcpu->arch.apf.gfns[i] = ~0;
12231                 do {
12232                         j = kvm_async_pf_next_probe(j);
12233                         if (vcpu->arch.apf.gfns[j] == ~0)
12234                                 return;
12235                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12236                         /*
12237                          * k lies cyclically in ]i,j]
12238                          * |    i.k.j |
12239                          * |....j i.k.| or  |.k..j i...|
12240                          */
12241                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12242                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12243                 i = j;
12244         }
12245 }
12246
12247 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12248 {
12249         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12250
12251         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12252                                       sizeof(reason));
12253 }
12254
12255 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12256 {
12257         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12258
12259         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12260                                              &token, offset, sizeof(token));
12261 }
12262
12263 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12264 {
12265         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12266         u32 val;
12267
12268         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12269                                          &val, offset, sizeof(val)))
12270                 return false;
12271
12272         return !val;
12273 }
12274
12275 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12276 {
12277         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12278                 return false;
12279
12280         if (!kvm_pv_async_pf_enabled(vcpu) ||
12281             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12282                 return false;
12283
12284         return true;
12285 }
12286
12287 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12288 {
12289         if (unlikely(!lapic_in_kernel(vcpu) ||
12290                      kvm_event_needs_reinjection(vcpu) ||
12291                      vcpu->arch.exception.pending))
12292                 return false;
12293
12294         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12295                 return false;
12296
12297         /*
12298          * If interrupts are off we cannot even use an artificial
12299          * halt state.
12300          */
12301         return kvm_arch_interrupt_allowed(vcpu);
12302 }
12303
12304 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12305                                      struct kvm_async_pf *work)
12306 {
12307         struct x86_exception fault;
12308
12309         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12310         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12311
12312         if (kvm_can_deliver_async_pf(vcpu) &&
12313             !apf_put_user_notpresent(vcpu)) {
12314                 fault.vector = PF_VECTOR;
12315                 fault.error_code_valid = true;
12316                 fault.error_code = 0;
12317                 fault.nested_page_fault = false;
12318                 fault.address = work->arch.token;
12319                 fault.async_page_fault = true;
12320                 kvm_inject_page_fault(vcpu, &fault);
12321                 return true;
12322         } else {
12323                 /*
12324                  * It is not possible to deliver a paravirtualized asynchronous
12325                  * page fault, but putting the guest in an artificial halt state
12326                  * can be beneficial nevertheless: if an interrupt arrives, we
12327                  * can deliver it timely and perhaps the guest will schedule
12328                  * another process.  When the instruction that triggered a page
12329                  * fault is retried, hopefully the page will be ready in the host.
12330                  */
12331                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12332                 return false;
12333         }
12334 }
12335
12336 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12337                                  struct kvm_async_pf *work)
12338 {
12339         struct kvm_lapic_irq irq = {
12340                 .delivery_mode = APIC_DM_FIXED,
12341                 .vector = vcpu->arch.apf.vec
12342         };
12343
12344         if (work->wakeup_all)
12345                 work->arch.token = ~0; /* broadcast wakeup */
12346         else
12347                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12348         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12349
12350         if ((work->wakeup_all || work->notpresent_injected) &&
12351             kvm_pv_async_pf_enabled(vcpu) &&
12352             !apf_put_user_ready(vcpu, work->arch.token)) {
12353                 vcpu->arch.apf.pageready_pending = true;
12354                 kvm_apic_set_irq(vcpu, &irq, NULL);
12355         }
12356
12357         vcpu->arch.apf.halted = false;
12358         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12359 }
12360
12361 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12362 {
12363         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12364         if (!vcpu->arch.apf.pageready_pending)
12365                 kvm_vcpu_kick(vcpu);
12366 }
12367
12368 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12369 {
12370         if (!kvm_pv_async_pf_enabled(vcpu))
12371                 return true;
12372         else
12373                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12374 }
12375
12376 void kvm_arch_start_assignment(struct kvm *kvm)
12377 {
12378         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12379                 static_call_cond(kvm_x86_start_assignment)(kvm);
12380 }
12381 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12382
12383 void kvm_arch_end_assignment(struct kvm *kvm)
12384 {
12385         atomic_dec(&kvm->arch.assigned_device_count);
12386 }
12387 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12388
12389 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
12390 {
12391         return arch_atomic_read(&kvm->arch.assigned_device_count);
12392 }
12393 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12394
12395 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12396 {
12397         atomic_inc(&kvm->arch.noncoherent_dma_count);
12398 }
12399 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12400
12401 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12402 {
12403         atomic_dec(&kvm->arch.noncoherent_dma_count);
12404 }
12405 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12406
12407 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12408 {
12409         return atomic_read(&kvm->arch.noncoherent_dma_count);
12410 }
12411 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12412
12413 bool kvm_arch_has_irq_bypass(void)
12414 {
12415         return true;
12416 }
12417
12418 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12419                                       struct irq_bypass_producer *prod)
12420 {
12421         struct kvm_kernel_irqfd *irqfd =
12422                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12423         int ret;
12424
12425         irqfd->producer = prod;
12426         kvm_arch_start_assignment(irqfd->kvm);
12427         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12428                                          prod->irq, irqfd->gsi, 1);
12429
12430         if (ret)
12431                 kvm_arch_end_assignment(irqfd->kvm);
12432
12433         return ret;
12434 }
12435
12436 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12437                                       struct irq_bypass_producer *prod)
12438 {
12439         int ret;
12440         struct kvm_kernel_irqfd *irqfd =
12441                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12442
12443         WARN_ON(irqfd->producer != prod);
12444         irqfd->producer = NULL;
12445
12446         /*
12447          * When producer of consumer is unregistered, we change back to
12448          * remapped mode, so we can re-use the current implementation
12449          * when the irq is masked/disabled or the consumer side (KVM
12450          * int this case doesn't want to receive the interrupts.
12451         */
12452         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12453         if (ret)
12454                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12455                        " fails: %d\n", irqfd->consumer.token, ret);
12456
12457         kvm_arch_end_assignment(irqfd->kvm);
12458 }
12459
12460 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12461                                    uint32_t guest_irq, bool set)
12462 {
12463         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12464 }
12465
12466 bool kvm_vector_hashing_enabled(void)
12467 {
12468         return vector_hashing;
12469 }
12470
12471 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12472 {
12473         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12474 }
12475 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12476
12477
12478 int kvm_spec_ctrl_test_value(u64 value)
12479 {
12480         /*
12481          * test that setting IA32_SPEC_CTRL to given value
12482          * is allowed by the host processor
12483          */
12484
12485         u64 saved_value;
12486         unsigned long flags;
12487         int ret = 0;
12488
12489         local_irq_save(flags);
12490
12491         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12492                 ret = 1;
12493         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12494                 ret = 1;
12495         else
12496                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12497
12498         local_irq_restore(flags);
12499
12500         return ret;
12501 }
12502 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12503
12504 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12505 {
12506         struct x86_exception fault;
12507         u32 access = error_code &
12508                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12509
12510         if (!(error_code & PFERR_PRESENT_MASK) ||
12511             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12512                 /*
12513                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12514                  * tables probably do not match the TLB.  Just proceed
12515                  * with the error code that the processor gave.
12516                  */
12517                 fault.vector = PF_VECTOR;
12518                 fault.error_code_valid = true;
12519                 fault.error_code = error_code;
12520                 fault.nested_page_fault = false;
12521                 fault.address = gva;
12522         }
12523         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12524 }
12525 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12526
12527 /*
12528  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12529  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12530  * indicates whether exit to userspace is needed.
12531  */
12532 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12533                               struct x86_exception *e)
12534 {
12535         if (r == X86EMUL_PROPAGATE_FAULT) {
12536                 kvm_inject_emulated_page_fault(vcpu, e);
12537                 return 1;
12538         }
12539
12540         /*
12541          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12542          * while handling a VMX instruction KVM could've handled the request
12543          * correctly by exiting to userspace and performing I/O but there
12544          * doesn't seem to be a real use-case behind such requests, just return
12545          * KVM_EXIT_INTERNAL_ERROR for now.
12546          */
12547         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12548         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12549         vcpu->run->internal.ndata = 0;
12550
12551         return 0;
12552 }
12553 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12554
12555 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12556 {
12557         bool pcid_enabled;
12558         struct x86_exception e;
12559         struct {
12560                 u64 pcid;
12561                 u64 gla;
12562         } operand;
12563         int r;
12564
12565         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12566         if (r != X86EMUL_CONTINUE)
12567                 return kvm_handle_memory_failure(vcpu, r, &e);
12568
12569         if (operand.pcid >> 12 != 0) {
12570                 kvm_inject_gp(vcpu, 0);
12571                 return 1;
12572         }
12573
12574         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12575
12576         switch (type) {
12577         case INVPCID_TYPE_INDIV_ADDR:
12578                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12579                     is_noncanonical_address(operand.gla, vcpu)) {
12580                         kvm_inject_gp(vcpu, 0);
12581                         return 1;
12582                 }
12583                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12584                 return kvm_skip_emulated_instruction(vcpu);
12585
12586         case INVPCID_TYPE_SINGLE_CTXT:
12587                 if (!pcid_enabled && (operand.pcid != 0)) {
12588                         kvm_inject_gp(vcpu, 0);
12589                         return 1;
12590                 }
12591
12592                 kvm_invalidate_pcid(vcpu, operand.pcid);
12593                 return kvm_skip_emulated_instruction(vcpu);
12594
12595         case INVPCID_TYPE_ALL_NON_GLOBAL:
12596                 /*
12597                  * Currently, KVM doesn't mark global entries in the shadow
12598                  * page tables, so a non-global flush just degenerates to a
12599                  * global flush. If needed, we could optimize this later by
12600                  * keeping track of global entries in shadow page tables.
12601                  */
12602
12603                 fallthrough;
12604         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12605                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12606                 return kvm_skip_emulated_instruction(vcpu);
12607
12608         default:
12609                 BUG(); /* We have already checked above that type <= 3 */
12610         }
12611 }
12612 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12613
12614 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12615 {
12616         struct kvm_run *run = vcpu->run;
12617         struct kvm_mmio_fragment *frag;
12618         unsigned int len;
12619
12620         BUG_ON(!vcpu->mmio_needed);
12621
12622         /* Complete previous fragment */
12623         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12624         len = min(8u, frag->len);
12625         if (!vcpu->mmio_is_write)
12626                 memcpy(frag->data, run->mmio.data, len);
12627
12628         if (frag->len <= 8) {
12629                 /* Switch to the next fragment. */
12630                 frag++;
12631                 vcpu->mmio_cur_fragment++;
12632         } else {
12633                 /* Go forward to the next mmio piece. */
12634                 frag->data += len;
12635                 frag->gpa += len;
12636                 frag->len -= len;
12637         }
12638
12639         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12640                 vcpu->mmio_needed = 0;
12641
12642                 // VMG change, at this point, we're always done
12643                 // RIP has already been advanced
12644                 return 1;
12645         }
12646
12647         // More MMIO is needed
12648         run->mmio.phys_addr = frag->gpa;
12649         run->mmio.len = min(8u, frag->len);
12650         run->mmio.is_write = vcpu->mmio_is_write;
12651         if (run->mmio.is_write)
12652                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12653         run->exit_reason = KVM_EXIT_MMIO;
12654
12655         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12656
12657         return 0;
12658 }
12659
12660 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12661                           void *data)
12662 {
12663         int handled;
12664         struct kvm_mmio_fragment *frag;
12665
12666         if (!data)
12667                 return -EINVAL;
12668
12669         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12670         if (handled == bytes)
12671                 return 1;
12672
12673         bytes -= handled;
12674         gpa += handled;
12675         data += handled;
12676
12677         /*TODO: Check if need to increment number of frags */
12678         frag = vcpu->mmio_fragments;
12679         vcpu->mmio_nr_fragments = 1;
12680         frag->len = bytes;
12681         frag->gpa = gpa;
12682         frag->data = data;
12683
12684         vcpu->mmio_needed = 1;
12685         vcpu->mmio_cur_fragment = 0;
12686
12687         vcpu->run->mmio.phys_addr = gpa;
12688         vcpu->run->mmio.len = min(8u, frag->len);
12689         vcpu->run->mmio.is_write = 1;
12690         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12691         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12692
12693         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12694
12695         return 0;
12696 }
12697 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12698
12699 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12700                          void *data)
12701 {
12702         int handled;
12703         struct kvm_mmio_fragment *frag;
12704
12705         if (!data)
12706                 return -EINVAL;
12707
12708         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12709         if (handled == bytes)
12710                 return 1;
12711
12712         bytes -= handled;
12713         gpa += handled;
12714         data += handled;
12715
12716         /*TODO: Check if need to increment number of frags */
12717         frag = vcpu->mmio_fragments;
12718         vcpu->mmio_nr_fragments = 1;
12719         frag->len = bytes;
12720         frag->gpa = gpa;
12721         frag->data = data;
12722
12723         vcpu->mmio_needed = 1;
12724         vcpu->mmio_cur_fragment = 0;
12725
12726         vcpu->run->mmio.phys_addr = gpa;
12727         vcpu->run->mmio.len = min(8u, frag->len);
12728         vcpu->run->mmio.is_write = 0;
12729         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12730
12731         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12732
12733         return 0;
12734 }
12735 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12736
12737 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12738                            unsigned int port);
12739
12740 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12741 {
12742         int size = vcpu->arch.pio.size;
12743         int port = vcpu->arch.pio.port;
12744
12745         vcpu->arch.pio.count = 0;
12746         if (vcpu->arch.sev_pio_count)
12747                 return kvm_sev_es_outs(vcpu, size, port);
12748         return 1;
12749 }
12750
12751 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12752                            unsigned int port)
12753 {
12754         for (;;) {
12755                 unsigned int count =
12756                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12757                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12758
12759                 /* memcpy done already by emulator_pio_out.  */
12760                 vcpu->arch.sev_pio_count -= count;
12761                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12762                 if (!ret)
12763                         break;
12764
12765                 /* Emulation done by the kernel.  */
12766                 if (!vcpu->arch.sev_pio_count)
12767                         return 1;
12768         }
12769
12770         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12771         return 0;
12772 }
12773
12774 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12775                           unsigned int port);
12776
12777 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12778 {
12779         unsigned count = vcpu->arch.pio.count;
12780         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12781         vcpu->arch.sev_pio_count -= count;
12782         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12783 }
12784
12785 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12786 {
12787         int size = vcpu->arch.pio.size;
12788         int port = vcpu->arch.pio.port;
12789
12790         advance_sev_es_emulated_ins(vcpu);
12791         if (vcpu->arch.sev_pio_count)
12792                 return kvm_sev_es_ins(vcpu, size, port);
12793         return 1;
12794 }
12795
12796 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12797                           unsigned int port)
12798 {
12799         for (;;) {
12800                 unsigned int count =
12801                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12802                 if (!__emulator_pio_in(vcpu, size, port, count))
12803                         break;
12804
12805                 /* Emulation done by the kernel.  */
12806                 advance_sev_es_emulated_ins(vcpu);
12807                 if (!vcpu->arch.sev_pio_count)
12808                         return 1;
12809         }
12810
12811         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12812         return 0;
12813 }
12814
12815 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12816                          unsigned int port, void *data,  unsigned int count,
12817                          int in)
12818 {
12819         vcpu->arch.sev_pio_data = data;
12820         vcpu->arch.sev_pio_count = count;
12821         return in ? kvm_sev_es_ins(vcpu, size, port)
12822                   : kvm_sev_es_outs(vcpu, size, port);
12823 }
12824 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12825
12826 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12827 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12828 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12829 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12830 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12846 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12847 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12848 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12849 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12850 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12851 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
12853
12854 static int __init kvm_x86_init(void)
12855 {
12856         kvm_mmu_x86_module_init();
12857         mitigate_smt_rsb &= boot_cpu_has_bug(X86_BUG_SMT_RSB) && cpu_smt_possible();
12858         return 0;
12859 }
12860 module_init(kvm_x86_init);
12861
12862 static void __exit kvm_x86_exit(void)
12863 {
12864         /*
12865          * If module_init() is implemented, module_exit() must also be
12866          * implemented to allow module unload.
12867          */
12868 }
12869 module_exit(kvm_x86_exit);