arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, pages_4k),
 237         STATS_DESC_ICOUNTER(VM, pages_2m),
 238         STATS_DESC_ICOUNTER(VM, pages_1g),
 239         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 240         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 241         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 242 };
 243
 244 const struct kvm_stats_header kvm_vm_stats_header = {
 245         .name_size = KVM_STATS_NAME_SIZE,
 246         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 247         .id_offset = sizeof(struct kvm_stats_header),
 248         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 249         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 250                        sizeof(kvm_vm_stats_desc),
 251 };
 252
 253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 254         KVM_GENERIC_VCPU_STATS(),
 255         STATS_DESC_COUNTER(VCPU, pf_fixed),
 256         STATS_DESC_COUNTER(VCPU, pf_guest),
 257         STATS_DESC_COUNTER(VCPU, tlb_flush),
 258         STATS_DESC_COUNTER(VCPU, invlpg),
 259         STATS_DESC_COUNTER(VCPU, exits),
 260         STATS_DESC_COUNTER(VCPU, io_exits),
 261         STATS_DESC_COUNTER(VCPU, mmio_exits),
 262         STATS_DESC_COUNTER(VCPU, signal_exits),
 263         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 264         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 265         STATS_DESC_COUNTER(VCPU, l1d_flush),
 266         STATS_DESC_COUNTER(VCPU, halt_exits),
 267         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 268         STATS_DESC_COUNTER(VCPU, irq_exits),
 269         STATS_DESC_COUNTER(VCPU, host_state_reload),
 270         STATS_DESC_COUNTER(VCPU, fpu_reload),
 271         STATS_DESC_COUNTER(VCPU, insn_emulation),
 272         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 273         STATS_DESC_COUNTER(VCPU, hypercalls),
 274         STATS_DESC_COUNTER(VCPU, irq_injections),
 275         STATS_DESC_COUNTER(VCPU, nmi_injections),
 276         STATS_DESC_COUNTER(VCPU, req_event),
 277         STATS_DESC_COUNTER(VCPU, nested_run),
 278         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 279         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 280         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 281 };
 282
 283 const struct kvm_stats_header kvm_vcpu_stats_header = {
 284         .name_size = KVM_STATS_NAME_SIZE,
 285         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 286         .id_offset = sizeof(struct kvm_stats_header),
 287         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 288         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 289                        sizeof(kvm_vcpu_stats_desc),
 290 };
 291
 292 u64 __read_mostly host_xcr0;
 293 u64 __read_mostly supported_xcr0;
 294 EXPORT_SYMBOL_GPL(supported_xcr0);
 295
 296 static struct kmem_cache *x86_fpu_cache;
 297
 298 static struct kmem_cache *x86_emulator_cache;
 299
 300 /*
 301  * When called, it means the previous get/set msr reached an invalid msr.
 302  * Return true if we want to ignore/silent this failed msr access.
 303  */
 304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 305 {
 306         const char *op = write ? "wrmsr" : "rdmsr";
 307
 308         if (ignore_msrs) {
 309                 if (report_ignored_msrs)
 310                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 311                                       op, msr, data);
 312                 /* Mask the error */
 313                 return true;
 314         } else {
 315                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 316                                       op, msr, data);
 317                 return false;
 318         }
 319 }
 320
 321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 322 {
 323         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 324         unsigned int size = sizeof(struct x86_emulate_ctxt);
 325
 326         return kmem_cache_create_usercopy("x86_emulator", size,
 327                                           __alignof__(struct x86_emulate_ctxt),
 328                                           SLAB_ACCOUNT, useroffset,
 329                                           size - useroffset, NULL);
 330 }
 331
 332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 333
 334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 335 {
 336         int i;
 337         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 338                 vcpu->arch.apf.gfns[i] = ~0;
 339 }
 340
 341 static void kvm_on_user_return(struct user_return_notifier *urn)
 342 {
 343         unsigned slot;
 344         struct kvm_user_return_msrs *msrs
 345                 = container_of(urn, struct kvm_user_return_msrs, urn);
 346         struct kvm_user_return_msr_values *values;
 347         unsigned long flags;
 348
 349         /*
 350          * Disabling irqs at this point since the following code could be
 351          * interrupted and executed through kvm_arch_hardware_disable()
 352          */
 353         local_irq_save(flags);
 354         if (msrs->registered) {
 355                 msrs->registered = false;
 356                 user_return_notifier_unregister(urn);
 357         }
 358         local_irq_restore(flags);
 359         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 360                 values = &msrs->values[slot];
 361                 if (values->host != values->curr) {
 362                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 363                         values->curr = values->host;
 364                 }
 365         }
 366 }
 367
 368 static int kvm_probe_user_return_msr(u32 msr)
 369 {
 370         u64 val;
 371         int ret;
 372
 373         preempt_disable();
 374         ret = rdmsrl_safe(msr, &val);
 375         if (ret)
 376                 goto out;
 377         ret = wrmsrl_safe(msr, val);
 378 out:
 379         preempt_enable();
 380         return ret;
 381 }
 382
 383 int kvm_add_user_return_msr(u32 msr)
 384 {
 385         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 386
 387         if (kvm_probe_user_return_msr(msr))
 388                 return -1;
 389
 390         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 391         return kvm_nr_uret_msrs++;
 392 }
 393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 394
 395 int kvm_find_user_return_msr(u32 msr)
 396 {
 397         int i;
 398
 399         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 400                 if (kvm_uret_msrs_list[i] == msr)
 401                         return i;
 402         }
 403         return -1;
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 406
 407 static void kvm_user_return_msr_cpu_online(void)
 408 {
 409         unsigned int cpu = smp_processor_id();
 410         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 411         u64 value;
 412         int i;
 413
 414         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 415                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 416                 msrs->values[i].host = value;
 417                 msrs->values[i].curr = value;
 418         }
 419 }
 420
 421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 422 {
 423         unsigned int cpu = smp_processor_id();
 424         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 425         int err;
 426
 427         value = (value & mask) | (msrs->values[slot].host & ~mask);
 428         if (value == msrs->values[slot].curr)
 429                 return 0;
 430         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 431         if (err)
 432                 return 1;
 433
 434         msrs->values[slot].curr = value;
 435         if (!msrs->registered) {
 436                 msrs->urn.on_user_return = kvm_on_user_return;
 437                 user_return_notifier_register(&msrs->urn);
 438                 msrs->registered = true;
 439         }
 440         return 0;
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 443
 444 static void drop_user_return_notifiers(void)
 445 {
 446         unsigned int cpu = smp_processor_id();
 447         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 448
 449         if (msrs->registered)
 450                 kvm_on_user_return(&msrs->urn);
 451 }
 452
 453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 454 {
 455         return vcpu->arch.apic_base;
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 458
 459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 460 {
 461         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 464
 465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 466 {
 467         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 468         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 469         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 470                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 471
 472         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 473                 return 1;
 474         if (!msr_info->host_initiated) {
 475                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 476                         return 1;
 477                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 478                         return 1;
 479         }
 480
 481         kvm_lapic_set_base(vcpu, msr_info->data);
 482         kvm_recalculate_apic_map(vcpu->kvm);
 483         return 0;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 486
 487 /*
 488  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 489  *
 490  * Hardware virtualization extension instructions may fault if a reboot turns
 491  * off virtualization while processes are running.  Usually after catching the
 492  * fault we just panic; during reboot instead the instruction is ignored.
 493  */
 494 noinstr void kvm_spurious_fault(void)
 495 {
 496         /* Fault while not rebooting.  We want the trace. */
 497         BUG_ON(!kvm_rebooting);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 500
 501 #define EXCPT_BENIGN            0
 502 #define EXCPT_CONTRIBUTORY      1
 503 #define EXCPT_PF                2
 504
 505 static int exception_class(int vector)
 506 {
 507         switch (vector) {
 508         case PF_VECTOR:
 509                 return EXCPT_PF;
 510         case DE_VECTOR:
 511         case TS_VECTOR:
 512         case NP_VECTOR:
 513         case SS_VECTOR:
 514         case GP_VECTOR:
 515                 return EXCPT_CONTRIBUTORY;
 516         default:
 517                 break;
 518         }
 519         return EXCPT_BENIGN;
 520 }
 521
 522 #define EXCPT_FAULT             0
 523 #define EXCPT_TRAP              1
 524 #define EXCPT_ABORT             2
 525 #define EXCPT_INTERRUPT         3
 526
 527 static int exception_type(int vector)
 528 {
 529         unsigned int mask;
 530
 531         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 532                 return EXCPT_INTERRUPT;
 533
 534         mask = 1 << vector;
 535
 536         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 537         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 538                 return EXCPT_TRAP;
 539
 540         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 541                 return EXCPT_ABORT;
 542
 543         /* Reserved exceptions will result in fault */
 544         return EXCPT_FAULT;
 545 }
 546
 547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 548 {
 549         unsigned nr = vcpu->arch.exception.nr;
 550         bool has_payload = vcpu->arch.exception.has_payload;
 551         unsigned long payload = vcpu->arch.exception.payload;
 552
 553         if (!has_payload)
 554                 return;
 555
 556         switch (nr) {
 557         case DB_VECTOR:
 558                 /*
 559                  * "Certain debug exceptions may clear bit 0-3.  The
 560                  * remaining contents of the DR6 register are never
 561                  * cleared by the processor".
 562                  */
 563                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 564                 /*
 565                  * In order to reflect the #DB exception payload in guest
 566                  * dr6, three components need to be considered: active low
 567                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 568                  * DR6_BS and DR6_BT)
 569                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 570                  * In the target guest dr6:
 571                  * FIXED_1 bits should always be set.
 572                  * Active low bits should be cleared if 1-setting in payload.
 573                  * Active high bits should be set if 1-setting in payload.
 574                  *
 575                  * Note, the payload is compatible with the pending debug
 576                  * exceptions/exit qualification under VMX, that active_low bits
 577                  * are active high in payload.
 578                  * So they need to be flipped for DR6.
 579                  */
 580                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 581                 vcpu->arch.dr6 |= payload;
 582                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 583
 584                 /*
 585                  * The #DB payload is defined as compatible with the 'pending
 586                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 587                  * defined in the 'pending debug exceptions' field (enabled
 588                  * breakpoint), it is reserved and must be zero in DR6.
 589                  */
 590                 vcpu->arch.dr6 &= ~BIT(12);
 591                 break;
 592         case PF_VECTOR:
 593                 vcpu->arch.cr2 = payload;
 594                 break;
 595         }
 596
 597         vcpu->arch.exception.has_payload = false;
 598         vcpu->arch.exception.payload = 0;
 599 }
 600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 601
 602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 603                 unsigned nr, bool has_error, u32 error_code,
 604                 bool has_payload, unsigned long payload, bool reinject)
 605 {
 606         u32 prev_nr;
 607         int class1, class2;
 608
 609         kvm_make_request(KVM_REQ_EVENT, vcpu);
 610
 611         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 612         queue:
 613                 if (reinject) {
 614                         /*
 615                          * On vmentry, vcpu->arch.exception.pending is only
 616                          * true if an event injection was blocked by
 617                          * nested_run_pending.  In that case, however,
 618                          * vcpu_enter_guest requests an immediate exit,
 619                          * and the guest shouldn't proceed far enough to
 620                          * need reinjection.
 621                          */
 622                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 623                         vcpu->arch.exception.injected = true;
 624                         if (WARN_ON_ONCE(has_payload)) {
 625                                 /*
 626                                  * A reinjected event has already
 627                                  * delivered its payload.
 628                                  */
 629                                 has_payload = false;
 630                                 payload = 0;
 631                         }
 632                 } else {
 633                         vcpu->arch.exception.pending = true;
 634                         vcpu->arch.exception.injected = false;
 635                 }
 636                 vcpu->arch.exception.has_error_code = has_error;
 637                 vcpu->arch.exception.nr = nr;
 638                 vcpu->arch.exception.error_code = error_code;
 639                 vcpu->arch.exception.has_payload = has_payload;
 640                 vcpu->arch.exception.payload = payload;
 641                 if (!is_guest_mode(vcpu))
 642                         kvm_deliver_exception_payload(vcpu);
 643                 return;
 644         }
 645
 646         /* to check exception */
 647         prev_nr = vcpu->arch.exception.nr;
 648         if (prev_nr == DF_VECTOR) {
 649                 /* triple fault -> shutdown */
 650                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 651                 return;
 652         }
 653         class1 = exception_class(prev_nr);
 654         class2 = exception_class(nr);
 655         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 656                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 657                 /*
 658                  * Generate double fault per SDM Table 5-5.  Set
 659                  * exception.pending = true so that the double fault
 660                  * can trigger a nested vmexit.
 661                  */
 662                 vcpu->arch.exception.pending = true;
 663                 vcpu->arch.exception.injected = false;
 664                 vcpu->arch.exception.has_error_code = true;
 665                 vcpu->arch.exception.nr = DF_VECTOR;
 666                 vcpu->arch.exception.error_code = 0;
 667                 vcpu->arch.exception.has_payload = false;
 668                 vcpu->arch.exception.payload = 0;
 669         } else
 670                 /* replace previous exception with a new one in a hope
 671                    that instruction re-execution will regenerate lost
 672                    exception */
 673                 goto queue;
 674 }
 675
 676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 677 {
 678         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 681
 682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 687
 688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 689                            unsigned long payload)
 690 {
 691         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 694
 695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 696                                     u32 error_code, unsigned long payload)
 697 {
 698         kvm_multiple_exception(vcpu, nr, true, error_code,
 699                                true, payload, false);
 700 }
 701
 702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 703 {
 704         if (err)
 705                 kvm_inject_gp(vcpu, 0);
 706         else
 707                 return kvm_skip_emulated_instruction(vcpu);
 708
 709         return 1;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 712
 713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 714 {
 715         ++vcpu->stat.pf_guest;
 716         vcpu->arch.exception.nested_apf =
 717                 is_guest_mode(vcpu) && fault->async_page_fault;
 718         if (vcpu->arch.exception.nested_apf) {
 719                 vcpu->arch.apf.nested_apf_token = fault->address;
 720                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 721         } else {
 722                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 723                                         fault->address);
 724         }
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 727
 728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 729                                     struct x86_exception *fault)
 730 {
 731         struct kvm_mmu *fault_mmu;
 732         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 733
 734         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 735                                                vcpu->arch.walk_mmu;
 736
 737         /*
 738          * Invalidate the TLB entry for the faulting address, if it exists,
 739          * else the access will fault indefinitely (and to emulate hardware).
 740          */
 741         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 742             !(fault->error_code & PFERR_RSVD_MASK))
 743                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 744                                        fault_mmu->root_hpa);
 745
 746         fault_mmu->inject_page_fault(vcpu, fault);
 747         return fault->nested_page_fault;
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 750
 751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 752 {
 753         atomic_inc(&vcpu->arch.nmi_queued);
 754         kvm_make_request(KVM_REQ_NMI, vcpu);
 755 }
 756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 757
 758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 759 {
 760         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 761 }
 762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 763
 764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 765 {
 766         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 769
 770 /*
 771  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 772  * a #GP and return false.
 773  */
 774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 775 {
 776         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 777                 return true;
 778         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 779         return false;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 782
 783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 784 {
 785         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                 return true;
 787
 788         kvm_queue_exception(vcpu, UD_VECTOR);
 789         return false;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_require_dr);
 792
 793 /*
 794  * This function will be used to read from the physical memory of the currently
 795  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 796  * can read from guest physical or from the guest's guest physical memory.
 797  */
 798 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 799                             gfn_t ngfn, void *data, int offset, int len,
 800                             u32 access)
 801 {
 802         struct x86_exception exception;
 803         gfn_t real_gfn;
 804         gpa_t ngpa;
 805
 806         ngpa     = gfn_to_gpa(ngfn);
 807         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 808         if (real_gfn == UNMAPPED_GVA)
 809                 return -EFAULT;
 810
 811         real_gfn = gpa_to_gfn(real_gfn);
 812
 813         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 816
 817 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 818 {
 819         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 820 }
 821
 822 /*
 823  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 824  */
 825 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 826 {
 827         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 828         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 829         int i;
 830         int ret;
 831         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 832
 833         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 834                                       offset * sizeof(u64), sizeof(pdpte),
 835                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 836         if (ret < 0) {
 837                 ret = 0;
 838                 goto out;
 839         }
 840         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 841                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 842                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 843                         ret = 0;
 844                         goto out;
 845                 }
 846         }
 847         ret = 1;
 848
 849         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 850         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 851         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 852         vcpu->arch.pdptrs_from_userspace = false;
 853
 854 out:
 855
 856         return ret;
 857 }
 858 EXPORT_SYMBOL_GPL(load_pdptrs);
 859
 860 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 861 {
 862         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 863                 kvm_clear_async_pf_completion_queue(vcpu);
 864                 kvm_async_pf_hash_reset(vcpu);
 865         }
 866
 867         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 868                 kvm_mmu_reset_context(vcpu);
 869
 870         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 871             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 872             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 873                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 874 }
 875 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 876
 877 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 878 {
 879         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 880         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 881
 882         cr0 |= X86_CR0_ET;
 883
 884 #ifdef CONFIG_X86_64
 885         if (cr0 & 0xffffffff00000000UL)
 886                 return 1;
 887 #endif
 888
 889         cr0 &= ~CR0_RESERVED_BITS;
 890
 891         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 892                 return 1;
 893
 894         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 895                 return 1;
 896
 897 #ifdef CONFIG_X86_64
 898         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 899             (cr0 & X86_CR0_PG)) {
 900                 int cs_db, cs_l;
 901
 902                 if (!is_pae(vcpu))
 903                         return 1;
 904                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 905                 if (cs_l)
 906                         return 1;
 907         }
 908 #endif
 909         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 910             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 911             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 912                 return 1;
 913
 914         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 915                 return 1;
 916
 917         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 918
 919         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 920
 921         return 0;
 922 }
 923 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 924
 925 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 926 {
 927         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_lmsw);
 930
 931 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 932 {
 933         if (vcpu->arch.guest_state_protected)
 934                 return;
 935
 936         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 937
 938                 if (vcpu->arch.xcr0 != host_xcr0)
 939                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 940
 941                 if (vcpu->arch.xsaves_enabled &&
 942                     vcpu->arch.ia32_xss != host_xss)
 943                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 944         }
 945
 946         if (static_cpu_has(X86_FEATURE_PKU) &&
 947             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 948              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 949             vcpu->arch.pkru != vcpu->arch.host_pkru)
 950                 write_pkru(vcpu->arch.pkru);
 951 }
 952 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 953
 954 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 955 {
 956         if (vcpu->arch.guest_state_protected)
 957                 return;
 958
 959         if (static_cpu_has(X86_FEATURE_PKU) &&
 960             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 961              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 962                 vcpu->arch.pkru = rdpkru();
 963                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 964                         write_pkru(vcpu->arch.host_pkru);
 965         }
 966
 967         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 968
 969                 if (vcpu->arch.xcr0 != host_xcr0)
 970                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 971
 972                 if (vcpu->arch.xsaves_enabled &&
 973                     vcpu->arch.ia32_xss != host_xss)
 974                         wrmsrl(MSR_IA32_XSS, host_xss);
 975         }
 976
 977 }
 978 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 979
 980 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 981 {
 982         u64 xcr0 = xcr;
 983         u64 old_xcr0 = vcpu->arch.xcr0;
 984         u64 valid_bits;
 985
 986         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 987         if (index != XCR_XFEATURE_ENABLED_MASK)
 988                 return 1;
 989         if (!(xcr0 & XFEATURE_MASK_FP))
 990                 return 1;
 991         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 992                 return 1;
 993
 994         /*
 995          * Do not allow the guest to set bits that we do not support
 996          * saving.  However, xcr0 bit 0 is always set, even if the
 997          * emulated CPU does not support XSAVE (see fx_init).
 998          */
 999         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1000         if (xcr0 & ~valid_bits)
1001                 return 1;
1002
1003         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1004             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1005                 return 1;
1006
1007         if (xcr0 & XFEATURE_MASK_AVX512) {
1008                 if (!(xcr0 & XFEATURE_MASK_YMM))
1009                         return 1;
1010                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1011                         return 1;
1012         }
1013         vcpu->arch.xcr0 = xcr0;
1014
1015         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1016                 kvm_update_cpuid_runtime(vcpu);
1017         return 0;
1018 }
1019
1020 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1021 {
1022         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1023             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1024                 kvm_inject_gp(vcpu, 0);
1025                 return 1;
1026         }
1027
1028         return kvm_skip_emulated_instruction(vcpu);
1029 }
1030 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1031
1032 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1033 {
1034         if (cr4 & cr4_reserved_bits)
1035                 return false;
1036
1037         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1038                 return false;
1039
1040         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1041 }
1042 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1043
1044 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1045 {
1046         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1047             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1048                 kvm_mmu_reset_context(vcpu);
1049 }
1050 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1051
1052 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1053 {
1054         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1055         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1056                                    X86_CR4_SMEP;
1057
1058         if (!kvm_is_valid_cr4(vcpu, cr4))
1059                 return 1;
1060
1061         if (is_long_mode(vcpu)) {
1062                 if (!(cr4 & X86_CR4_PAE))
1063                         return 1;
1064                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1065                         return 1;
1066         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1067                    && ((cr4 ^ old_cr4) & pdptr_bits)
1068                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1069                                    kvm_read_cr3(vcpu)))
1070                 return 1;
1071
1072         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1073                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1074                         return 1;
1075
1076                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1077                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1078                         return 1;
1079         }
1080
1081         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1082
1083         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1084
1085         return 0;
1086 }
1087 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1088
1089 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1090 {
1091         struct kvm_mmu *mmu = vcpu->arch.mmu;
1092         unsigned long roots_to_free = 0;
1093         int i;
1094
1095         /*
1096          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1097          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1098          * also via the emulator.  KVM's TDP page tables are not in the scope of
1099          * the invalidation, but the guest's TLB entries need to be flushed as
1100          * the CPU may have cached entries in its TLB for the target PCID.
1101          */
1102         if (unlikely(tdp_enabled)) {
1103                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1104                 return;
1105         }
1106
1107         /*
1108          * If neither the current CR3 nor any of the prev_roots use the given
1109          * PCID, then nothing needs to be done here because a resync will
1110          * happen anyway before switching to any other CR3.
1111          */
1112         if (kvm_get_active_pcid(vcpu) == pcid) {
1113                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1114                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1115         }
1116
1117         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1118                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1119                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1120
1121         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1122 }
1123
1124 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1125 {
1126         bool skip_tlb_flush = false;
1127         unsigned long pcid = 0;
1128 #ifdef CONFIG_X86_64
1129         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1130
1131         if (pcid_enabled) {
1132                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1133                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1134                 pcid = cr3 & X86_CR3_PCID_MASK;
1135         }
1136 #endif
1137
1138         /* PDPTRs are always reloaded for PAE paging. */
1139         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1140                 goto handle_tlb_flush;
1141
1142         /*
1143          * Do not condition the GPA check on long mode, this helper is used to
1144          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1145          * the current vCPU mode is accurate.
1146          */
1147         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1148                 return 1;
1149
1150         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1151                 return 1;
1152
1153         if (cr3 != kvm_read_cr3(vcpu))
1154                 kvm_mmu_new_pgd(vcpu, cr3);
1155
1156         vcpu->arch.cr3 = cr3;
1157         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1158
1159 handle_tlb_flush:
1160         /*
1161          * A load of CR3 that flushes the TLB flushes only the current PCID,
1162          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1163          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1164          * and it's impossible to use a non-zero PCID when PCID is disabled,
1165          * i.e. only PCID=0 can be relevant.
1166          */
1167         if (!skip_tlb_flush)
1168                 kvm_invalidate_pcid(vcpu, pcid);
1169
1170         return 0;
1171 }
1172 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1173
1174 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1175 {
1176         if (cr8 & CR8_RESERVED_BITS)
1177                 return 1;
1178         if (lapic_in_kernel(vcpu))
1179                 kvm_lapic_set_tpr(vcpu, cr8);
1180         else
1181                 vcpu->arch.cr8 = cr8;
1182         return 0;
1183 }
1184 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1185
1186 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1187 {
1188         if (lapic_in_kernel(vcpu))
1189                 return kvm_lapic_get_cr8(vcpu);
1190         else
1191                 return vcpu->arch.cr8;
1192 }
1193 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1194
1195 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1196 {
1197         int i;
1198
1199         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1200                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1201                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1202         }
1203 }
1204
1205 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1206 {
1207         unsigned long dr7;
1208
1209         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1210                 dr7 = vcpu->arch.guest_debug_dr7;
1211         else
1212                 dr7 = vcpu->arch.dr7;
1213         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1214         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1215         if (dr7 & DR7_BP_EN_MASK)
1216                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1217 }
1218 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1219
1220 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1221 {
1222         u64 fixed = DR6_FIXED_1;
1223
1224         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1225                 fixed |= DR6_RTM;
1226
1227         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1228                 fixed |= DR6_BUS_LOCK;
1229         return fixed;
1230 }
1231
1232 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1233 {
1234         size_t size = ARRAY_SIZE(vcpu->arch.db);
1235
1236         switch (dr) {
1237         case 0 ... 3:
1238                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1239                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1240                         vcpu->arch.eff_db[dr] = val;
1241                 break;
1242         case 4:
1243         case 6:
1244                 if (!kvm_dr6_valid(val))
1245                         return 1; /* #GP */
1246                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1247                 break;
1248         case 5:
1249         default: /* 7 */
1250                 if (!kvm_dr7_valid(val))
1251                         return 1; /* #GP */
1252                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1253                 kvm_update_dr7(vcpu);
1254                 break;
1255         }
1256
1257         return 0;
1258 }
1259 EXPORT_SYMBOL_GPL(kvm_set_dr);
1260
1261 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1262 {
1263         size_t size = ARRAY_SIZE(vcpu->arch.db);
1264
1265         switch (dr) {
1266         case 0 ... 3:
1267                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1268                 break;
1269         case 4:
1270         case 6:
1271                 *val = vcpu->arch.dr6;
1272                 break;
1273         case 5:
1274         default: /* 7 */
1275                 *val = vcpu->arch.dr7;
1276                 break;
1277         }
1278 }
1279 EXPORT_SYMBOL_GPL(kvm_get_dr);
1280
1281 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1282 {
1283         u32 ecx = kvm_rcx_read(vcpu);
1284         u64 data;
1285
1286         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1287                 kvm_inject_gp(vcpu, 0);
1288                 return 1;
1289         }
1290
1291         kvm_rax_write(vcpu, (u32)data);
1292         kvm_rdx_write(vcpu, data >> 32);
1293         return kvm_skip_emulated_instruction(vcpu);
1294 }
1295 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1296
1297 /*
1298  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1299  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1300  *
1301  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1302  * extract the supported MSRs from the related const lists.
1303  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1304  * capabilities of the host cpu. This capabilities test skips MSRs that are
1305  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1306  * may depend on host virtualization features rather than host cpu features.
1307  */
1308
1309 static const u32 msrs_to_save_all[] = {
1310         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1311         MSR_STAR,
1312 #ifdef CONFIG_X86_64
1313         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1314 #endif
1315         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1316         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1317         MSR_IA32_SPEC_CTRL,
1318         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1319         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1320         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1321         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1322         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1323         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1324         MSR_IA32_UMWAIT_CONTROL,
1325
1326         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1327         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1328         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1329         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1330         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1331         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1332         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1333         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1334         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1335         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1336         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1337         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1338         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1339         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1340         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1341         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1342         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1343         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1344         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1345         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1346         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1347         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1348
1349         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1350         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1351         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1352         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1353         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1354         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1355 };
1356
1357 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1358 static unsigned num_msrs_to_save;
1359
1360 static const u32 emulated_msrs_all[] = {
1361         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1362         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1363         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1364         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1365         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1366         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1367         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1368         HV_X64_MSR_RESET,
1369         HV_X64_MSR_VP_INDEX,
1370         HV_X64_MSR_VP_RUNTIME,
1371         HV_X64_MSR_SCONTROL,
1372         HV_X64_MSR_STIMER0_CONFIG,
1373         HV_X64_MSR_VP_ASSIST_PAGE,
1374         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1375         HV_X64_MSR_TSC_EMULATION_STATUS,
1376         HV_X64_MSR_SYNDBG_OPTIONS,
1377         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1378         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1379         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1380
1381         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1382         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1383
1384         MSR_IA32_TSC_ADJUST,
1385         MSR_IA32_TSC_DEADLINE,
1386         MSR_IA32_ARCH_CAPABILITIES,
1387         MSR_IA32_PERF_CAPABILITIES,
1388         MSR_IA32_MISC_ENABLE,
1389         MSR_IA32_MCG_STATUS,
1390         MSR_IA32_MCG_CTL,
1391         MSR_IA32_MCG_EXT_CTL,
1392         MSR_IA32_SMBASE,
1393         MSR_SMI_COUNT,
1394         MSR_PLATFORM_INFO,
1395         MSR_MISC_FEATURES_ENABLES,
1396         MSR_AMD64_VIRT_SPEC_CTRL,
1397         MSR_IA32_POWER_CTL,
1398         MSR_IA32_UCODE_REV,
1399
1400         /*
1401          * The following list leaves out MSRs whose values are determined
1402          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1403          * We always support the "true" VMX control MSRs, even if the host
1404          * processor does not, so I am putting these registers here rather
1405          * than in msrs_to_save_all.
1406          */
1407         MSR_IA32_VMX_BASIC,
1408         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1409         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1410         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1411         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1412         MSR_IA32_VMX_MISC,
1413         MSR_IA32_VMX_CR0_FIXED0,
1414         MSR_IA32_VMX_CR4_FIXED0,
1415         MSR_IA32_VMX_VMCS_ENUM,
1416         MSR_IA32_VMX_PROCBASED_CTLS2,
1417         MSR_IA32_VMX_EPT_VPID_CAP,
1418         MSR_IA32_VMX_VMFUNC,
1419
1420         MSR_K7_HWCR,
1421         MSR_KVM_POLL_CONTROL,
1422 };
1423
1424 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1425 static unsigned num_emulated_msrs;
1426
1427 /*
1428  * List of msr numbers which are used to expose MSR-based features that
1429  * can be used by a hypervisor to validate requested CPU features.
1430  */
1431 static const u32 msr_based_features_all[] = {
1432         MSR_IA32_VMX_BASIC,
1433         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1434         MSR_IA32_VMX_PINBASED_CTLS,
1435         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1436         MSR_IA32_VMX_PROCBASED_CTLS,
1437         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1438         MSR_IA32_VMX_EXIT_CTLS,
1439         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1440         MSR_IA32_VMX_ENTRY_CTLS,
1441         MSR_IA32_VMX_MISC,
1442         MSR_IA32_VMX_CR0_FIXED0,
1443         MSR_IA32_VMX_CR0_FIXED1,
1444         MSR_IA32_VMX_CR4_FIXED0,
1445         MSR_IA32_VMX_CR4_FIXED1,
1446         MSR_IA32_VMX_VMCS_ENUM,
1447         MSR_IA32_VMX_PROCBASED_CTLS2,
1448         MSR_IA32_VMX_EPT_VPID_CAP,
1449         MSR_IA32_VMX_VMFUNC,
1450
1451         MSR_F10H_DECFG,
1452         MSR_IA32_UCODE_REV,
1453         MSR_IA32_ARCH_CAPABILITIES,
1454         MSR_IA32_PERF_CAPABILITIES,
1455 };
1456
1457 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1458 static unsigned int num_msr_based_features;
1459
1460 static u64 kvm_get_arch_capabilities(void)
1461 {
1462         u64 data = 0;
1463
1464         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1465                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1466
1467         /*
1468          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1469          * the nested hypervisor runs with NX huge pages.  If it is not,
1470          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1471          * L1 guests, so it need not worry about its own (L2) guests.
1472          */
1473         data |= ARCH_CAP_PSCHANGE_MC_NO;
1474
1475         /*
1476          * If we're doing cache flushes (either "always" or "cond")
1477          * we will do one whenever the guest does a vmlaunch/vmresume.
1478          * If an outer hypervisor is doing the cache flush for us
1479          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1480          * capability to the guest too, and if EPT is disabled we're not
1481          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1482          * require a nested hypervisor to do a flush of its own.
1483          */
1484         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1485                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1486
1487         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1488                 data |= ARCH_CAP_RDCL_NO;
1489         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1490                 data |= ARCH_CAP_SSB_NO;
1491         if (!boot_cpu_has_bug(X86_BUG_MDS))
1492                 data |= ARCH_CAP_MDS_NO;
1493
1494         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1495                 /*
1496                  * If RTM=0 because the kernel has disabled TSX, the host might
1497                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1498                  * and therefore knows that there cannot be TAA) but keep
1499                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1500                  * and we want to allow migrating those guests to tsx=off hosts.
1501                  */
1502                 data &= ~ARCH_CAP_TAA_NO;
1503         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1504                 data |= ARCH_CAP_TAA_NO;
1505         } else {
1506                 /*
1507                  * Nothing to do here; we emulate TSX_CTRL if present on the
1508                  * host so the guest can choose between disabling TSX or
1509                  * using VERW to clear CPU buffers.
1510                  */
1511         }
1512
1513         /* Guests don't need to know "Fill buffer clear control" exists */
1514         data &= ~ARCH_CAP_FB_CLEAR_CTRL;
1515
1516         return data;
1517 }
1518
1519 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1520 {
1521         switch (msr->index) {
1522         case MSR_IA32_ARCH_CAPABILITIES:
1523                 msr->data = kvm_get_arch_capabilities();
1524                 break;
1525         case MSR_IA32_UCODE_REV:
1526                 rdmsrl_safe(msr->index, &msr->data);
1527                 break;
1528         default:
1529                 return static_call(kvm_x86_get_msr_feature)(msr);
1530         }
1531         return 0;
1532 }
1533
1534 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1535 {
1536         struct kvm_msr_entry msr;
1537         int r;
1538
1539         msr.index = index;
1540         r = kvm_get_msr_feature(&msr);
1541
1542         if (r == KVM_MSR_RET_INVALID) {
1543                 /* Unconditionally clear the output for simplicity */
1544                 *data = 0;
1545                 if (kvm_msr_ignored_check(index, 0, false))
1546                         r = 0;
1547         }
1548
1549         if (r)
1550                 return r;
1551
1552         *data = msr.data;
1553
1554         return 0;
1555 }
1556
1557 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1558 {
1559         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1560                 return false;
1561
1562         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1563                 return false;
1564
1565         if (efer & (EFER_LME | EFER_LMA) &&
1566             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1567                 return false;
1568
1569         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1570                 return false;
1571
1572         return true;
1573
1574 }
1575 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1576 {
1577         if (efer & efer_reserved_bits)
1578                 return false;
1579
1580         return __kvm_valid_efer(vcpu, efer);
1581 }
1582 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1583
1584 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1585 {
1586         u64 old_efer = vcpu->arch.efer;
1587         u64 efer = msr_info->data;
1588         int r;
1589
1590         if (efer & efer_reserved_bits)
1591                 return 1;
1592
1593         if (!msr_info->host_initiated) {
1594                 if (!__kvm_valid_efer(vcpu, efer))
1595                         return 1;
1596
1597                 if (is_paging(vcpu) &&
1598                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1599                         return 1;
1600         }
1601
1602         efer &= ~EFER_LMA;
1603         efer |= vcpu->arch.efer & EFER_LMA;
1604
1605         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1606         if (r) {
1607                 WARN_ON(r > 0);
1608                 return r;
1609         }
1610
1611         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1612                 kvm_mmu_reset_context(vcpu);
1613
1614         return 0;
1615 }
1616
1617 void kvm_enable_efer_bits(u64 mask)
1618 {
1619        efer_reserved_bits &= ~mask;
1620 }
1621 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1622
1623 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1624 {
1625         struct kvm_x86_msr_filter *msr_filter;
1626         struct msr_bitmap_range *ranges;
1627         struct kvm *kvm = vcpu->kvm;
1628         bool allowed;
1629         int idx;
1630         u32 i;
1631
1632         /* x2APIC MSRs do not support filtering. */
1633         if (index >= 0x800 && index <= 0x8ff)
1634                 return true;
1635
1636         idx = srcu_read_lock(&kvm->srcu);
1637
1638         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1639         if (!msr_filter) {
1640                 allowed = true;
1641                 goto out;
1642         }
1643
1644         allowed = msr_filter->default_allow;
1645         ranges = msr_filter->ranges;
1646
1647         for (i = 0; i < msr_filter->count; i++) {
1648                 u32 start = ranges[i].base;
1649                 u32 end = start + ranges[i].nmsrs;
1650                 u32 flags = ranges[i].flags;
1651                 unsigned long *bitmap = ranges[i].bitmap;
1652
1653                 if ((index >= start) && (index < end) && (flags & type)) {
1654                         allowed = !!test_bit(index - start, bitmap);
1655                         break;
1656                 }
1657         }
1658
1659 out:
1660         srcu_read_unlock(&kvm->srcu, idx);
1661
1662         return allowed;
1663 }
1664 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1665
1666 /*
1667  * Write @data into the MSR specified by @index.  Select MSR specific fault
1668  * checks are bypassed if @host_initiated is %true.
1669  * Returns 0 on success, non-0 otherwise.
1670  * Assumes vcpu_load() was already called.
1671  */
1672 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1673                          bool host_initiated)
1674 {
1675         struct msr_data msr;
1676
1677         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1678                 return KVM_MSR_RET_FILTERED;
1679
1680         switch (index) {
1681         case MSR_FS_BASE:
1682         case MSR_GS_BASE:
1683         case MSR_KERNEL_GS_BASE:
1684         case MSR_CSTAR:
1685         case MSR_LSTAR:
1686                 if (is_noncanonical_address(data, vcpu))
1687                         return 1;
1688                 break;
1689         case MSR_IA32_SYSENTER_EIP:
1690         case MSR_IA32_SYSENTER_ESP:
1691                 /*
1692                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1693                  * non-canonical address is written on Intel but not on
1694                  * AMD (which ignores the top 32-bits, because it does
1695                  * not implement 64-bit SYSENTER).
1696                  *
1697                  * 64-bit code should hence be able to write a non-canonical
1698                  * value on AMD.  Making the address canonical ensures that
1699                  * vmentry does not fail on Intel after writing a non-canonical
1700                  * value, and that something deterministic happens if the guest
1701                  * invokes 64-bit SYSENTER.
1702                  */
1703                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1704                 break;
1705         case MSR_TSC_AUX:
1706                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1707                         return 1;
1708
1709                 if (!host_initiated &&
1710                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1711                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1712                         return 1;
1713
1714                 /*
1715                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1716                  * incomplete and conflicting architectural behavior.  Current
1717                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1718                  * reserved and always read as zeros.  Enforce Intel's reserved
1719                  * bits check if and only if the guest CPU is Intel, and clear
1720                  * the bits in all other cases.  This ensures cross-vendor
1721                  * migration will provide consistent behavior for the guest.
1722                  */
1723                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1724                         return 1;
1725
1726                 data = (u32)data;
1727                 break;
1728         }
1729
1730         msr.data = data;
1731         msr.index = index;
1732         msr.host_initiated = host_initiated;
1733
1734         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1735 }
1736
1737 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1738                                      u32 index, u64 data, bool host_initiated)
1739 {
1740         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1741
1742         if (ret == KVM_MSR_RET_INVALID)
1743                 if (kvm_msr_ignored_check(index, data, true))
1744                         ret = 0;
1745
1746         return ret;
1747 }
1748
1749 /*
1750  * Read the MSR specified by @index into @data.  Select MSR specific fault
1751  * checks are bypassed if @host_initiated is %true.
1752  * Returns 0 on success, non-0 otherwise.
1753  * Assumes vcpu_load() was already called.
1754  */
1755 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1756                   bool host_initiated)
1757 {
1758         struct msr_data msr;
1759         int ret;
1760
1761         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1762                 return KVM_MSR_RET_FILTERED;
1763
1764         switch (index) {
1765         case MSR_TSC_AUX:
1766                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1767                         return 1;
1768
1769                 if (!host_initiated &&
1770                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1771                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1772                         return 1;
1773                 break;
1774         }
1775
1776         msr.index = index;
1777         msr.host_initiated = host_initiated;
1778
1779         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1780         if (!ret)
1781                 *data = msr.data;
1782         return ret;
1783 }
1784
1785 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1786                                      u32 index, u64 *data, bool host_initiated)
1787 {
1788         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1789
1790         if (ret == KVM_MSR_RET_INVALID) {
1791                 /* Unconditionally clear *data for simplicity */
1792                 *data = 0;
1793                 if (kvm_msr_ignored_check(index, 0, false))
1794                         ret = 0;
1795         }
1796
1797         return ret;
1798 }
1799
1800 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1801 {
1802         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1803 }
1804 EXPORT_SYMBOL_GPL(kvm_get_msr);
1805
1806 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1807 {
1808         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1809 }
1810 EXPORT_SYMBOL_GPL(kvm_set_msr);
1811
1812 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1813 {
1814         int err = vcpu->run->msr.error;
1815         if (!err) {
1816                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1817                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1818         }
1819
1820         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1821 }
1822
1823 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1824 {
1825         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1826 }
1827
1828 static u64 kvm_msr_reason(int r)
1829 {
1830         switch (r) {
1831         case KVM_MSR_RET_INVALID:
1832                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1833         case KVM_MSR_RET_FILTERED:
1834                 return KVM_MSR_EXIT_REASON_FILTER;
1835         default:
1836                 return KVM_MSR_EXIT_REASON_INVAL;
1837         }
1838 }
1839
1840 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1841                               u32 exit_reason, u64 data,
1842                               int (*completion)(struct kvm_vcpu *vcpu),
1843                               int r)
1844 {
1845         u64 msr_reason = kvm_msr_reason(r);
1846
1847         /* Check if the user wanted to know about this MSR fault */
1848         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1849                 return 0;
1850
1851         vcpu->run->exit_reason = exit_reason;
1852         vcpu->run->msr.error = 0;
1853         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1854         vcpu->run->msr.reason = msr_reason;
1855         vcpu->run->msr.index = index;
1856         vcpu->run->msr.data = data;
1857         vcpu->arch.complete_userspace_io = completion;
1858
1859         return 1;
1860 }
1861
1862 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1863 {
1864         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1865                                    complete_emulated_rdmsr, r);
1866 }
1867
1868 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1869 {
1870         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1871                                    complete_emulated_wrmsr, r);
1872 }
1873
1874 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1875 {
1876         u32 ecx = kvm_rcx_read(vcpu);
1877         u64 data;
1878         int r;
1879
1880         r = kvm_get_msr(vcpu, ecx, &data);
1881
1882         /* MSR read failed? See if we should ask user space */
1883         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1884                 /* Bounce to user space */
1885                 return 0;
1886         }
1887
1888         if (!r) {
1889                 trace_kvm_msr_read(ecx, data);
1890
1891                 kvm_rax_write(vcpu, data & -1u);
1892                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1893         } else {
1894                 trace_kvm_msr_read_ex(ecx);
1895         }
1896
1897         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1898 }
1899 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1900
1901 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1902 {
1903         u32 ecx = kvm_rcx_read(vcpu);
1904         u64 data = kvm_read_edx_eax(vcpu);
1905         int r;
1906
1907         r = kvm_set_msr(vcpu, ecx, data);
1908
1909         /* MSR write failed? See if we should ask user space */
1910         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1911                 /* Bounce to user space */
1912                 return 0;
1913
1914         /* Signal all other negative errors to userspace */
1915         if (r < 0)
1916                 return r;
1917
1918         if (!r)
1919                 trace_kvm_msr_write(ecx, data);
1920         else
1921                 trace_kvm_msr_write_ex(ecx, data);
1922
1923         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1924 }
1925 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1926
1927 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1928 {
1929         return kvm_skip_emulated_instruction(vcpu);
1930 }
1931 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1932
1933 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1934 {
1935         /* Treat an INVD instruction as a NOP and just skip it. */
1936         return kvm_emulate_as_nop(vcpu);
1937 }
1938 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1939
1940 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1941 {
1942         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1943         return kvm_emulate_as_nop(vcpu);
1944 }
1945 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1946
1947 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1948 {
1949         kvm_queue_exception(vcpu, UD_VECTOR);
1950         return 1;
1951 }
1952 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1953
1954 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1955 {
1956         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1957         return kvm_emulate_as_nop(vcpu);
1958 }
1959 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1960
1961 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1962 {
1963         xfer_to_guest_mode_prepare();
1964         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1965                 xfer_to_guest_mode_work_pending();
1966 }
1967
1968 /*
1969  * The fast path for frequent and performance sensitive wrmsr emulation,
1970  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1971  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1972  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1973  * other cases which must be called after interrupts are enabled on the host.
1974  */
1975 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1976 {
1977         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1978                 return 1;
1979
1980         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1981                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1982                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1983                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1984
1985                 data &= ~(1 << 12);
1986                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1987                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1988                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1989                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1990                 return 0;
1991         }
1992
1993         return 1;
1994 }
1995
1996 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1997 {
1998         if (!kvm_can_use_hv_timer(vcpu))
1999                 return 1;
2000
2001         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2002         return 0;
2003 }
2004
2005 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2006 {
2007         u32 msr = kvm_rcx_read(vcpu);
2008         u64 data;
2009         fastpath_t ret = EXIT_FASTPATH_NONE;
2010
2011         switch (msr) {
2012         case APIC_BASE_MSR + (APIC_ICR >> 4):
2013                 data = kvm_read_edx_eax(vcpu);
2014                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2015                         kvm_skip_emulated_instruction(vcpu);
2016                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2017                 }
2018                 break;
2019         case MSR_IA32_TSC_DEADLINE:
2020                 data = kvm_read_edx_eax(vcpu);
2021                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2022                         kvm_skip_emulated_instruction(vcpu);
2023                         ret = EXIT_FASTPATH_REENTER_GUEST;
2024                 }
2025                 break;
2026         default:
2027                 break;
2028         }
2029
2030         if (ret != EXIT_FASTPATH_NONE)
2031                 trace_kvm_msr_write(msr, data);
2032
2033         return ret;
2034 }
2035 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2036
2037 /*
2038  * Adapt set_msr() to msr_io()'s calling convention
2039  */
2040 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2041 {
2042         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2043 }
2044
2045 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2046 {
2047         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2048 }
2049
2050 #ifdef CONFIG_X86_64
2051 struct pvclock_clock {
2052         int vclock_mode;
2053         u64 cycle_last;
2054         u64 mask;
2055         u32 mult;
2056         u32 shift;
2057         u64 base_cycles;
2058         u64 offset;
2059 };
2060
2061 struct pvclock_gtod_data {
2062         seqcount_t      seq;
2063
2064         struct pvclock_clock clock; /* extract of a clocksource struct */
2065         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2066
2067         ktime_t         offs_boot;
2068         u64             wall_time_sec;
2069 };
2070
2071 static struct pvclock_gtod_data pvclock_gtod_data;
2072
2073 static void update_pvclock_gtod(struct timekeeper *tk)
2074 {
2075         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2076
2077         write_seqcount_begin(&vdata->seq);
2078
2079         /* copy pvclock gtod data */
2080         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2081         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2082         vdata->clock.mask               = tk->tkr_mono.mask;
2083         vdata->clock.mult               = tk->tkr_mono.mult;
2084         vdata->clock.shift              = tk->tkr_mono.shift;
2085         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2086         vdata->clock.offset             = tk->tkr_mono.base;
2087
2088         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2089         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2090         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2091         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2092         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2093         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2094         vdata->raw_clock.offset         = tk->tkr_raw.base;
2095
2096         vdata->wall_time_sec            = tk->xtime_sec;
2097
2098         vdata->offs_boot                = tk->offs_boot;
2099
2100         write_seqcount_end(&vdata->seq);
2101 }
2102
2103 static s64 get_kvmclock_base_ns(void)
2104 {
2105         /* Count up from boot time, but with the frequency of the raw clock.  */
2106         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2107 }
2108 #else
2109 static s64 get_kvmclock_base_ns(void)
2110 {
2111         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2112         return ktime_get_boottime_ns();
2113 }
2114 #endif
2115
2116 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2117 {
2118         int version;
2119         int r;
2120         struct pvclock_wall_clock wc;
2121         u32 wc_sec_hi;
2122         u64 wall_nsec;
2123
2124         if (!wall_clock)
2125                 return;
2126
2127         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2128         if (r)
2129                 return;
2130
2131         if (version & 1)
2132                 ++version;  /* first time write, random junk */
2133
2134         ++version;
2135
2136         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2137                 return;
2138
2139         /*
2140          * The guest calculates current wall clock time by adding
2141          * system time (updated by kvm_guest_time_update below) to the
2142          * wall clock specified here.  We do the reverse here.
2143          */
2144         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2145
2146         wc.nsec = do_div(wall_nsec, 1000000000);
2147         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2148         wc.version = version;
2149
2150         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2151
2152         if (sec_hi_ofs) {
2153                 wc_sec_hi = wall_nsec >> 32;
2154                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2155                                 &wc_sec_hi, sizeof(wc_sec_hi));
2156         }
2157
2158         version++;
2159         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2160 }
2161
2162 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2163                                   bool old_msr, bool host_initiated)
2164 {
2165         struct kvm_arch *ka = &vcpu->kvm->arch;
2166
2167         if (vcpu->vcpu_id == 0 && !host_initiated) {
2168                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2169                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2170
2171                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2172         }
2173
2174         vcpu->arch.time = system_time;
2175         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2176
2177         /* we verify if the enable bit is set... */
2178         vcpu->arch.pv_time_enabled = false;
2179         if (!(system_time & 1))
2180                 return;
2181
2182         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2183                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2184                                        sizeof(struct pvclock_vcpu_time_info)))
2185                 vcpu->arch.pv_time_enabled = true;
2186
2187         return;
2188 }
2189
2190 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2191 {
2192         do_shl32_div32(dividend, divisor);
2193         return dividend;
2194 }
2195
2196 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2197                                s8 *pshift, u32 *pmultiplier)
2198 {
2199         uint64_t scaled64;
2200         int32_t  shift = 0;
2201         uint64_t tps64;
2202         uint32_t tps32;
2203
2204         tps64 = base_hz;
2205         scaled64 = scaled_hz;
2206         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2207                 tps64 >>= 1;
2208                 shift--;
2209         }
2210
2211         tps32 = (uint32_t)tps64;
2212         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2213                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2214                         scaled64 >>= 1;
2215                 else
2216                         tps32 <<= 1;
2217                 shift++;
2218         }
2219
2220         *pshift = shift;
2221         *pmultiplier = div_frac(scaled64, tps32);
2222 }
2223
2224 #ifdef CONFIG_X86_64
2225 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2226 #endif
2227
2228 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2229 static unsigned long max_tsc_khz;
2230
2231 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2232 {
2233         u64 v = (u64)khz * (1000000 + ppm);
2234         do_div(v, 1000000);
2235         return v;
2236 }
2237
2238 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2239
2240 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2241 {
2242         u64 ratio;
2243
2244         /* Guest TSC same frequency as host TSC? */
2245         if (!scale) {
2246                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2247                 return 0;
2248         }
2249
2250         /* TSC scaling supported? */
2251         if (!kvm_has_tsc_control) {
2252                 if (user_tsc_khz > tsc_khz) {
2253                         vcpu->arch.tsc_catchup = 1;
2254                         vcpu->arch.tsc_always_catchup = 1;
2255                         return 0;
2256                 } else {
2257                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2258                         return -1;
2259                 }
2260         }
2261
2262         /* TSC scaling required  - calculate ratio */
2263         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2264                                 user_tsc_khz, tsc_khz);
2265
2266         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2267                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2268                                     user_tsc_khz);
2269                 return -1;
2270         }
2271
2272         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2273         return 0;
2274 }
2275
2276 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2277 {
2278         u32 thresh_lo, thresh_hi;
2279         int use_scaling = 0;
2280
2281         /* tsc_khz can be zero if TSC calibration fails */
2282         if (user_tsc_khz == 0) {
2283                 /* set tsc_scaling_ratio to a safe value */
2284                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2285                 return -1;
2286         }
2287
2288         /* Compute a scale to convert nanoseconds in TSC cycles */
2289         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2290                            &vcpu->arch.virtual_tsc_shift,
2291                            &vcpu->arch.virtual_tsc_mult);
2292         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2293
2294         /*
2295          * Compute the variation in TSC rate which is acceptable
2296          * within the range of tolerance and decide if the
2297          * rate being applied is within that bounds of the hardware
2298          * rate.  If so, no scaling or compensation need be done.
2299          */
2300         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2301         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2302         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2303                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2304                 use_scaling = 1;
2305         }
2306         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2307 }
2308
2309 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2310 {
2311         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2312                                       vcpu->arch.virtual_tsc_mult,
2313                                       vcpu->arch.virtual_tsc_shift);
2314         tsc += vcpu->arch.this_tsc_write;
2315         return tsc;
2316 }
2317
2318 static inline int gtod_is_based_on_tsc(int mode)
2319 {
2320         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2321 }
2322
2323 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2324 {
2325 #ifdef CONFIG_X86_64
2326         bool vcpus_matched;
2327         struct kvm_arch *ka = &vcpu->kvm->arch;
2328         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2329
2330         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2331                          atomic_read(&vcpu->kvm->online_vcpus));
2332
2333         /*
2334          * Once the masterclock is enabled, always perform request in
2335          * order to update it.
2336          *
2337          * In order to enable masterclock, the host clocksource must be TSC
2338          * and the vcpus need to have matched TSCs.  When that happens,
2339          * perform request to enable masterclock.
2340          */
2341         if (ka->use_master_clock ||
2342             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2343                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2344
2345         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2346                             atomic_read(&vcpu->kvm->online_vcpus),
2347                             ka->use_master_clock, gtod->clock.vclock_mode);
2348 #endif
2349 }
2350
2351 /*
2352  * Multiply tsc by a fixed point number represented by ratio.
2353  *
2354  * The most significant 64-N bits (mult) of ratio represent the
2355  * integral part of the fixed point number; the remaining N bits
2356  * (frac) represent the fractional part, ie. ratio represents a fixed
2357  * point number (mult + frac * 2^(-N)).
2358  *
2359  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2360  */
2361 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2362 {
2363         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2364 }
2365
2366 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2367 {
2368         u64 _tsc = tsc;
2369
2370         if (ratio != kvm_default_tsc_scaling_ratio)
2371                 _tsc = __scale_tsc(ratio, tsc);
2372
2373         return _tsc;
2374 }
2375 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2376
2377 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2378 {
2379         u64 tsc;
2380
2381         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2382
2383         return target_tsc - tsc;
2384 }
2385
2386 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2387 {
2388         return vcpu->arch.l1_tsc_offset +
2389                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2390 }
2391 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2392
2393 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2394 {
2395         u64 nested_offset;
2396
2397         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2398                 nested_offset = l1_offset;
2399         else
2400                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2401                                                 kvm_tsc_scaling_ratio_frac_bits);
2402
2403         nested_offset += l2_offset;
2404         return nested_offset;
2405 }
2406 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2407
2408 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2409 {
2410         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2411                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2412                                        kvm_tsc_scaling_ratio_frac_bits);
2413
2414         return l1_multiplier;
2415 }
2416 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2417
2418 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2419 {
2420         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2421                                    vcpu->arch.l1_tsc_offset,
2422                                    l1_offset);
2423
2424         vcpu->arch.l1_tsc_offset = l1_offset;
2425
2426         /*
2427          * If we are here because L1 chose not to trap WRMSR to TSC then
2428          * according to the spec this should set L1's TSC (as opposed to
2429          * setting L1's offset for L2).
2430          */
2431         if (is_guest_mode(vcpu))
2432                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2433                         l1_offset,
2434                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2435                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2436         else
2437                 vcpu->arch.tsc_offset = l1_offset;
2438
2439         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2440 }
2441
2442 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2443 {
2444         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2445
2446         /* Userspace is changing the multiplier while L2 is active */
2447         if (is_guest_mode(vcpu))
2448                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2449                         l1_multiplier,
2450                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2451         else
2452                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2453
2454         if (kvm_has_tsc_control)
2455                 static_call(kvm_x86_write_tsc_multiplier)(
2456                         vcpu, vcpu->arch.tsc_scaling_ratio);
2457 }
2458
2459 static inline bool kvm_check_tsc_unstable(void)
2460 {
2461 #ifdef CONFIG_X86_64
2462         /*
2463          * TSC is marked unstable when we're running on Hyper-V,
2464          * 'TSC page' clocksource is good.
2465          */
2466         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2467                 return false;
2468 #endif
2469         return check_tsc_unstable();
2470 }
2471
2472 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2473 {
2474         struct kvm *kvm = vcpu->kvm;
2475         u64 offset, ns, elapsed;
2476         unsigned long flags;
2477         bool matched;
2478         bool already_matched;
2479         bool synchronizing = false;
2480
2481         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2482         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2483         ns = get_kvmclock_base_ns();
2484         elapsed = ns - kvm->arch.last_tsc_nsec;
2485
2486         if (vcpu->arch.virtual_tsc_khz) {
2487                 if (data == 0) {
2488                         /*
2489                          * detection of vcpu initialization -- need to sync
2490                          * with other vCPUs. This particularly helps to keep
2491                          * kvm_clock stable after CPU hotplug
2492                          */
2493                         synchronizing = true;
2494                 } else {
2495                         u64 tsc_exp = kvm->arch.last_tsc_write +
2496                                                 nsec_to_cycles(vcpu, elapsed);
2497                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2498                         /*
2499                          * Special case: TSC write with a small delta (1 second)
2500                          * of virtual cycle time against real time is
2501                          * interpreted as an attempt to synchronize the CPU.
2502                          */
2503                         synchronizing = data < tsc_exp + tsc_hz &&
2504                                         data + tsc_hz > tsc_exp;
2505                 }
2506         }
2507
2508         /*
2509          * For a reliable TSC, we can match TSC offsets, and for an unstable
2510          * TSC, we add elapsed time in this computation.  We could let the
2511          * compensation code attempt to catch up if we fall behind, but
2512          * it's better to try to match offsets from the beginning.
2513          */
2514         if (synchronizing &&
2515             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2516                 if (!kvm_check_tsc_unstable()) {
2517                         offset = kvm->arch.cur_tsc_offset;
2518                 } else {
2519                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2520                         data += delta;
2521                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2522                 }
2523                 matched = true;
2524                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2525         } else {
2526                 /*
2527                  * We split periods of matched TSC writes into generations.
2528                  * For each generation, we track the original measured
2529                  * nanosecond time, offset, and write, so if TSCs are in
2530                  * sync, we can match exact offset, and if not, we can match
2531                  * exact software computation in compute_guest_tsc()
2532                  *
2533                  * These values are tracked in kvm->arch.cur_xxx variables.
2534                  */
2535                 kvm->arch.cur_tsc_generation++;
2536                 kvm->arch.cur_tsc_nsec = ns;
2537                 kvm->arch.cur_tsc_write = data;
2538                 kvm->arch.cur_tsc_offset = offset;
2539                 matched = false;
2540         }
2541
2542         /*
2543          * We also track th most recent recorded KHZ, write and time to
2544          * allow the matching interval to be extended at each write.
2545          */
2546         kvm->arch.last_tsc_nsec = ns;
2547         kvm->arch.last_tsc_write = data;
2548         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2549
2550         vcpu->arch.last_guest_tsc = data;
2551
2552         /* Keep track of which generation this VCPU has synchronized to */
2553         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2554         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2555         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2556
2557         kvm_vcpu_write_tsc_offset(vcpu, offset);
2558         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2559
2560         raw_spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2561         if (!matched) {
2562                 kvm->arch.nr_vcpus_matched_tsc = 0;
2563         } else if (!already_matched) {
2564                 kvm->arch.nr_vcpus_matched_tsc++;
2565         }
2566
2567         kvm_track_tsc_matching(vcpu);
2568         raw_spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2569 }
2570
2571 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2572                                            s64 adjustment)
2573 {
2574         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2575         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2576 }
2577
2578 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2579 {
2580         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2581                 WARN_ON(adjustment < 0);
2582         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2583                                    vcpu->arch.l1_tsc_scaling_ratio);
2584         adjust_tsc_offset_guest(vcpu, adjustment);
2585 }
2586
2587 #ifdef CONFIG_X86_64
2588
2589 static u64 read_tsc(void)
2590 {
2591         u64 ret = (u64)rdtsc_ordered();
2592         u64 last = pvclock_gtod_data.clock.cycle_last;
2593
2594         if (likely(ret >= last))
2595                 return ret;
2596
2597         /*
2598          * GCC likes to generate cmov here, but this branch is extremely
2599          * predictable (it's just a function of time and the likely is
2600          * very likely) and there's a data dependence, so force GCC
2601          * to generate a branch instead.  I don't barrier() because
2602          * we don't actually need a barrier, and if this function
2603          * ever gets inlined it will generate worse code.
2604          */
2605         asm volatile ("");
2606         return last;
2607 }
2608
2609 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2610                           int *mode)
2611 {
2612         long v;
2613         u64 tsc_pg_val;
2614
2615         switch (clock->vclock_mode) {
2616         case VDSO_CLOCKMODE_HVCLOCK:
2617                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2618                                                   tsc_timestamp);
2619                 if (tsc_pg_val != U64_MAX) {
2620                         /* TSC page valid */
2621                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2622                         v = (tsc_pg_val - clock->cycle_last) &
2623                                 clock->mask;
2624                 } else {
2625                         /* TSC page invalid */
2626                         *mode = VDSO_CLOCKMODE_NONE;
2627                 }
2628                 break;
2629         case VDSO_CLOCKMODE_TSC:
2630                 *mode = VDSO_CLOCKMODE_TSC;
2631                 *tsc_timestamp = read_tsc();
2632                 v = (*tsc_timestamp - clock->cycle_last) &
2633                         clock->mask;
2634                 break;
2635         default:
2636                 *mode = VDSO_CLOCKMODE_NONE;
2637         }
2638
2639         if (*mode == VDSO_CLOCKMODE_NONE)
2640                 *tsc_timestamp = v = 0;
2641
2642         return v * clock->mult;
2643 }
2644
2645 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2646 {
2647         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2648         unsigned long seq;
2649         int mode;
2650         u64 ns;
2651
2652         do {
2653                 seq = read_seqcount_begin(&gtod->seq);
2654                 ns = gtod->raw_clock.base_cycles;
2655                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2656                 ns >>= gtod->raw_clock.shift;
2657                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2658         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2659         *t = ns;
2660
2661         return mode;
2662 }
2663
2664 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2665 {
2666         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2667         unsigned long seq;
2668         int mode;
2669         u64 ns;
2670
2671         do {
2672                 seq = read_seqcount_begin(&gtod->seq);
2673                 ts->tv_sec = gtod->wall_time_sec;
2674                 ns = gtod->clock.base_cycles;
2675                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2676                 ns >>= gtod->clock.shift;
2677         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2678
2679         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2680         ts->tv_nsec = ns;
2681
2682         return mode;
2683 }
2684
2685 /* returns true if host is using TSC based clocksource */
2686 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2687 {
2688         /* checked again under seqlock below */
2689         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2690                 return false;
2691
2692         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2693                                                       tsc_timestamp));
2694 }
2695
2696 /* returns true if host is using TSC based clocksource */
2697 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2698                                            u64 *tsc_timestamp)
2699 {
2700         /* checked again under seqlock below */
2701         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2702                 return false;
2703
2704         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2705 }
2706 #endif
2707
2708 /*
2709  *
2710  * Assuming a stable TSC across physical CPUS, and a stable TSC
2711  * across virtual CPUs, the following condition is possible.
2712  * Each numbered line represents an event visible to both
2713  * CPUs at the next numbered event.
2714  *
2715  * "timespecX" represents host monotonic time. "tscX" represents
2716  * RDTSC value.
2717  *
2718  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2719  *
2720  * 1.  read timespec0,tsc0
2721  * 2.                                   | timespec1 = timespec0 + N
2722  *                                      | tsc1 = tsc0 + M
2723  * 3. transition to guest               | transition to guest
2724  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2725  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2726  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2727  *
2728  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2729  *
2730  *      - ret0 < ret1
2731  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2732  *              ...
2733  *      - 0 < N - M => M < N
2734  *
2735  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2736  * always the case (the difference between two distinct xtime instances
2737  * might be smaller then the difference between corresponding TSC reads,
2738  * when updating guest vcpus pvclock areas).
2739  *
2740  * To avoid that problem, do not allow visibility of distinct
2741  * system_timestamp/tsc_timestamp values simultaneously: use a master
2742  * copy of host monotonic time values. Update that master copy
2743  * in lockstep.
2744  *
2745  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2746  *
2747  */
2748
2749 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2750 {
2751 #ifdef CONFIG_X86_64
2752         struct kvm_arch *ka = &kvm->arch;
2753         int vclock_mode;
2754         bool host_tsc_clocksource, vcpus_matched;
2755
2756         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2757                         atomic_read(&kvm->online_vcpus));
2758
2759         /*
2760          * If the host uses TSC clock, then passthrough TSC as stable
2761          * to the guest.
2762          */
2763         host_tsc_clocksource = kvm_get_time_and_clockread(
2764                                         &ka->master_kernel_ns,
2765                                         &ka->master_cycle_now);
2766
2767         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2768                                 && !ka->backwards_tsc_observed
2769                                 && !ka->boot_vcpu_runs_old_kvmclock;
2770
2771         if (ka->use_master_clock)
2772                 atomic_set(&kvm_guest_has_master_clock, 1);
2773
2774         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2775         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2776                                         vcpus_matched);
2777 #endif
2778 }
2779
2780 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2781 {
2782         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2783 }
2784
2785 static void kvm_gen_update_masterclock(struct kvm *kvm)
2786 {
2787 #ifdef CONFIG_X86_64
2788         int i;
2789         struct kvm_vcpu *vcpu;
2790         struct kvm_arch *ka = &kvm->arch;
2791         unsigned long flags;
2792
2793         kvm_hv_invalidate_tsc_page(kvm);
2794
2795         kvm_make_mclock_inprogress_request(kvm);
2796
2797         /* no guest entries from this point */
2798         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2799         pvclock_update_vm_gtod_copy(kvm);
2800         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2801
2802         kvm_for_each_vcpu(i, vcpu, kvm)
2803                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2804
2805         /* guest entries allowed */
2806         kvm_for_each_vcpu(i, vcpu, kvm)
2807                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2808 #endif
2809 }
2810
2811 u64 get_kvmclock_ns(struct kvm *kvm)
2812 {
2813         struct kvm_arch *ka = &kvm->arch;
2814         struct pvclock_vcpu_time_info hv_clock;
2815         unsigned long flags;
2816         u64 ret;
2817
2818         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2819         if (!ka->use_master_clock) {
2820                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2821                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2822         }
2823
2824         hv_clock.tsc_timestamp = ka->master_cycle_now;
2825         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2826         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2827
2828         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2829         get_cpu();
2830
2831         if (__this_cpu_read(cpu_tsc_khz)) {
2832                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2833                                    &hv_clock.tsc_shift,
2834                                    &hv_clock.tsc_to_system_mul);
2835                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2836         } else
2837                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2838
2839         put_cpu();
2840
2841         return ret;
2842 }
2843
2844 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2845                                    struct gfn_to_hva_cache *cache,
2846                                    unsigned int offset)
2847 {
2848         struct kvm_vcpu_arch *vcpu = &v->arch;
2849         struct pvclock_vcpu_time_info guest_hv_clock;
2850
2851         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2852                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2853                 return;
2854
2855         /* This VCPU is paused, but it's legal for a guest to read another
2856          * VCPU's kvmclock, so we really have to follow the specification where
2857          * it says that version is odd if data is being modified, and even after
2858          * it is consistent.
2859          *
2860          * Version field updates must be kept separate.  This is because
2861          * kvm_write_guest_cached might use a "rep movs" instruction, and
2862          * writes within a string instruction are weakly ordered.  So there
2863          * are three writes overall.
2864          *
2865          * As a small optimization, only write the version field in the first
2866          * and third write.  The vcpu->pv_time cache is still valid, because the
2867          * version field is the first in the struct.
2868          */
2869         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2870
2871         if (guest_hv_clock.version & 1)
2872                 ++guest_hv_clock.version;  /* first time write, random junk */
2873
2874         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2875         kvm_write_guest_offset_cached(v->kvm, cache,
2876                                       &vcpu->hv_clock, offset,
2877                                       sizeof(vcpu->hv_clock.version));
2878
2879         smp_wmb();
2880
2881         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2882         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2883
2884         if (vcpu->pvclock_set_guest_stopped_request) {
2885                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2886                 vcpu->pvclock_set_guest_stopped_request = false;
2887         }
2888
2889         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2890
2891         kvm_write_guest_offset_cached(v->kvm, cache,
2892                                       &vcpu->hv_clock, offset,
2893                                       sizeof(vcpu->hv_clock));
2894
2895         smp_wmb();
2896
2897         vcpu->hv_clock.version++;
2898         kvm_write_guest_offset_cached(v->kvm, cache,
2899                                      &vcpu->hv_clock, offset,
2900                                      sizeof(vcpu->hv_clock.version));
2901 }
2902
2903 static int kvm_guest_time_update(struct kvm_vcpu *v)
2904 {
2905         unsigned long flags, tgt_tsc_khz;
2906         struct kvm_vcpu_arch *vcpu = &v->arch;
2907         struct kvm_arch *ka = &v->kvm->arch;
2908         s64 kernel_ns;
2909         u64 tsc_timestamp, host_tsc;
2910         u8 pvclock_flags;
2911         bool use_master_clock;
2912
2913         kernel_ns = 0;
2914         host_tsc = 0;
2915
2916         /*
2917          * If the host uses TSC clock, then passthrough TSC as stable
2918          * to the guest.
2919          */
2920         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2921         use_master_clock = ka->use_master_clock;
2922         if (use_master_clock) {
2923                 host_tsc = ka->master_cycle_now;
2924                 kernel_ns = ka->master_kernel_ns;
2925         }
2926         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2927
2928         /* Keep irq disabled to prevent changes to the clock */
2929         local_irq_save(flags);
2930         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2931         if (unlikely(tgt_tsc_khz == 0)) {
2932                 local_irq_restore(flags);
2933                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2934                 return 1;
2935         }
2936         if (!use_master_clock) {
2937                 host_tsc = rdtsc();
2938                 kernel_ns = get_kvmclock_base_ns();
2939         }
2940
2941         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2942
2943         /*
2944          * We may have to catch up the TSC to match elapsed wall clock
2945          * time for two reasons, even if kvmclock is used.
2946          *   1) CPU could have been running below the maximum TSC rate
2947          *   2) Broken TSC compensation resets the base at each VCPU
2948          *      entry to avoid unknown leaps of TSC even when running
2949          *      again on the same CPU.  This may cause apparent elapsed
2950          *      time to disappear, and the guest to stand still or run
2951          *      very slowly.
2952          */
2953         if (vcpu->tsc_catchup) {
2954                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2955                 if (tsc > tsc_timestamp) {
2956                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2957                         tsc_timestamp = tsc;
2958                 }
2959         }
2960
2961         local_irq_restore(flags);
2962
2963         /* With all the info we got, fill in the values */
2964
2965         if (kvm_has_tsc_control)
2966                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2967                                             v->arch.l1_tsc_scaling_ratio);
2968
2969         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2970                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2971                                    &vcpu->hv_clock.tsc_shift,
2972                                    &vcpu->hv_clock.tsc_to_system_mul);
2973                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2974         }
2975
2976         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2977         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2978         vcpu->last_guest_tsc = tsc_timestamp;
2979
2980         /* If the host uses TSC clocksource, then it is stable */
2981         pvclock_flags = 0;
2982         if (use_master_clock)
2983                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2984
2985         vcpu->hv_clock.flags = pvclock_flags;
2986
2987         if (vcpu->pv_time_enabled)
2988                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2989         if (vcpu->xen.vcpu_info_set)
2990                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2991                                        offsetof(struct compat_vcpu_info, time));
2992         if (vcpu->xen.vcpu_time_info_set)
2993                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2994         if (!v->vcpu_idx)
2995                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2996         return 0;
2997 }
2998
2999 /*
3000  * kvmclock updates which are isolated to a given vcpu, such as
3001  * vcpu->cpu migration, should not allow system_timestamp from
3002  * the rest of the vcpus to remain static. Otherwise ntp frequency
3003  * correction applies to one vcpu's system_timestamp but not
3004  * the others.
3005  *
3006  * So in those cases, request a kvmclock update for all vcpus.
3007  * We need to rate-limit these requests though, as they can
3008  * considerably slow guests that have a large number of vcpus.
3009  * The time for a remote vcpu to update its kvmclock is bound
3010  * by the delay we use to rate-limit the updates.
3011  */
3012
3013 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3014
3015 static void kvmclock_update_fn(struct work_struct *work)
3016 {
3017         int i;
3018         struct delayed_work *dwork = to_delayed_work(work);
3019         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3020                                            kvmclock_update_work);
3021         struct kvm *kvm = container_of(ka, struct kvm, arch);
3022         struct kvm_vcpu *vcpu;
3023
3024         kvm_for_each_vcpu(i, vcpu, kvm) {
3025                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3026                 kvm_vcpu_kick(vcpu);
3027         }
3028 }
3029
3030 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3031 {
3032         struct kvm *kvm = v->kvm;
3033
3034         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3035         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3036                                         KVMCLOCK_UPDATE_DELAY);
3037 }
3038
3039 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3040
3041 static void kvmclock_sync_fn(struct work_struct *work)
3042 {
3043         struct delayed_work *dwork = to_delayed_work(work);
3044         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3045                                            kvmclock_sync_work);
3046         struct kvm *kvm = container_of(ka, struct kvm, arch);
3047
3048         if (!kvmclock_periodic_sync)
3049                 return;
3050
3051         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3052         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3053                                         KVMCLOCK_SYNC_PERIOD);
3054 }
3055
3056 /*
3057  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3058  */
3059 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3060 {
3061         /* McStatusWrEn enabled? */
3062         if (guest_cpuid_is_amd_or_hygon(vcpu))
3063                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3064
3065         return false;
3066 }
3067
3068 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3069 {
3070         u64 mcg_cap = vcpu->arch.mcg_cap;
3071         unsigned bank_num = mcg_cap & 0xff;
3072         u32 msr = msr_info->index;
3073         u64 data = msr_info->data;
3074
3075         switch (msr) {
3076         case MSR_IA32_MCG_STATUS:
3077                 vcpu->arch.mcg_status = data;
3078                 break;
3079         case MSR_IA32_MCG_CTL:
3080                 if (!(mcg_cap & MCG_CTL_P) &&
3081                     (data || !msr_info->host_initiated))
3082                         return 1;
3083                 if (data != 0 && data != ~(u64)0)
3084                         return 1;
3085                 vcpu->arch.mcg_ctl = data;
3086                 break;
3087         default:
3088                 if (msr >= MSR_IA32_MC0_CTL &&
3089                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3090                         u32 offset = array_index_nospec(
3091                                 msr - MSR_IA32_MC0_CTL,
3092                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3093
3094                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3095                          * some Linux kernels though clear bit 10 in bank 4 to
3096                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3097                          * this to avoid an uncatched #GP in the guest
3098                          */
3099                         if ((offset & 0x3) == 0 &&
3100                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3101                                 return -1;
3102
3103                         /* MCi_STATUS */
3104                         if (!msr_info->host_initiated &&
3105                             (offset & 0x3) == 1 && data != 0) {
3106                                 if (!can_set_mci_status(vcpu))
3107                                         return -1;
3108                         }
3109
3110                         vcpu->arch.mce_banks[offset] = data;
3111                         break;
3112                 }
3113                 return 1;
3114         }
3115         return 0;
3116 }
3117
3118 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3119 {
3120         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3121
3122         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3123 }
3124
3125 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3126 {
3127         gpa_t gpa = data & ~0x3f;
3128
3129         /* Bits 4:5 are reserved, Should be zero */
3130         if (data & 0x30)
3131                 return 1;
3132
3133         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3134             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3135                 return 1;
3136
3137         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3138             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3139                 return 1;
3140
3141         if (!lapic_in_kernel(vcpu))
3142                 return data ? 1 : 0;
3143
3144         vcpu->arch.apf.msr_en_val = data;
3145
3146         if (!kvm_pv_async_pf_enabled(vcpu)) {
3147                 kvm_clear_async_pf_completion_queue(vcpu);
3148                 kvm_async_pf_hash_reset(vcpu);
3149                 return 0;
3150         }
3151
3152         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3153                                         sizeof(u64)))
3154                 return 1;
3155
3156         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3157         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3158
3159         kvm_async_pf_wakeup_all(vcpu);
3160
3161         return 0;
3162 }
3163
3164 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3165 {
3166         /* Bits 8-63 are reserved */
3167         if (data >> 8)
3168                 return 1;
3169
3170         if (!lapic_in_kernel(vcpu))
3171                 return 1;
3172
3173         vcpu->arch.apf.msr_int_val = data;
3174
3175         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3176
3177         return 0;
3178 }
3179
3180 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3181 {
3182         vcpu->arch.pv_time_enabled = false;
3183         vcpu->arch.time = 0;
3184 }
3185
3186 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3187 {
3188         ++vcpu->stat.tlb_flush;
3189         static_call(kvm_x86_tlb_flush_all)(vcpu);
3190 }
3191
3192 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3193 {
3194         ++vcpu->stat.tlb_flush;
3195
3196         if (!tdp_enabled) {
3197                /*
3198                  * A TLB flush on behalf of the guest is equivalent to
3199                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3200                  * a forced sync of the shadow page tables.  Unload the
3201                  * entire MMU here and the subsequent load will sync the
3202                  * shadow page tables, and also flush the TLB.
3203                  */
3204                 kvm_mmu_unload(vcpu);
3205                 return;
3206         }
3207
3208         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3209 }
3210
3211
3212 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3213 {
3214         ++vcpu->stat.tlb_flush;
3215         static_call(kvm_x86_tlb_flush_current)(vcpu);
3216 }
3217
3218 /*
3219  * Service "local" TLB flush requests, which are specific to the current MMU
3220  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3221  * TLB flushes that are targeted at an MMU context also need to be serviced
3222  * prior before nested VM-Enter/VM-Exit.
3223  */
3224 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3225 {
3226         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3227                 kvm_vcpu_flush_tlb_current(vcpu);
3228
3229         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3230                 kvm_vcpu_flush_tlb_guest(vcpu);
3231 }
3232 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3233
3234 static void record_steal_time(struct kvm_vcpu *vcpu)
3235 {
3236         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3237         struct kvm_steal_time __user *st;
3238         struct kvm_memslots *slots;
3239         u64 steal;
3240         u32 version;
3241
3242         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3243                 kvm_xen_runstate_set_running(vcpu);
3244                 return;
3245         }
3246
3247         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3248                 return;
3249
3250         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3251                 return;
3252
3253         slots = kvm_memslots(vcpu->kvm);
3254
3255         if (unlikely(slots->generation != ghc->generation ||
3256                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3257                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3258
3259                 /* We rely on the fact that it fits in a single page. */
3260                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3261
3262                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3263                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3264                         return;
3265         }
3266
3267         st = (struct kvm_steal_time __user *)ghc->hva;
3268         /*
3269          * Doing a TLB flush here, on the guest's behalf, can avoid
3270          * expensive IPIs.
3271          */
3272         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3273                 u8 st_preempted = 0;
3274                 int err = -EFAULT;
3275
3276                 if (!user_access_begin(st, sizeof(*st)))
3277                         return;
3278
3279                 asm volatile("1: xchgb %0, %2\n"
3280                              "xor %1, %1\n"
3281                              "2:\n"
3282                              _ASM_EXTABLE_UA(1b, 2b)
3283                              : "+q" (st_preempted),
3284                                "+&r" (err),
3285                                "+m" (st->preempted));
3286                 if (err)
3287                         goto out;
3288
3289                 user_access_end();
3290
3291                 vcpu->arch.st.preempted = 0;
3292
3293                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3294                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3295                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3296                         kvm_vcpu_flush_tlb_guest(vcpu);
3297
3298                 if (!user_access_begin(st, sizeof(*st)))
3299                         goto dirty;
3300         } else {
3301                 if (!user_access_begin(st, sizeof(*st)))
3302                         return;
3303
3304                 unsafe_put_user(0, &st->preempted, out);
3305                 vcpu->arch.st.preempted = 0;
3306         }
3307
3308         unsafe_get_user(version, &st->version, out);
3309         if (version & 1)
3310                 version += 1;  /* first time write, random junk */
3311
3312         version += 1;
3313         unsafe_put_user(version, &st->version, out);
3314
3315         smp_wmb();
3316
3317         unsafe_get_user(steal, &st->steal, out);
3318         steal += current->sched_info.run_delay -
3319                 vcpu->arch.st.last_steal;
3320         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3321         unsafe_put_user(steal, &st->steal, out);
3322
3323         version += 1;
3324         unsafe_put_user(version, &st->version, out);
3325
3326  out:
3327         user_access_end();
3328  dirty:
3329         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3330 }
3331
3332 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3333 {
3334         bool pr = false;
3335         u32 msr = msr_info->index;
3336         u64 data = msr_info->data;
3337
3338         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3339                 return kvm_xen_write_hypercall_page(vcpu, data);
3340
3341         switch (msr) {
3342         case MSR_AMD64_NB_CFG:
3343         case MSR_IA32_UCODE_WRITE:
3344         case MSR_VM_HSAVE_PA:
3345         case MSR_AMD64_PATCH_LOADER:
3346         case MSR_AMD64_BU_CFG2:
3347         case MSR_AMD64_DC_CFG:
3348         case MSR_F15H_EX_CFG:
3349                 break;
3350
3351         case MSR_IA32_UCODE_REV:
3352                 if (msr_info->host_initiated)
3353                         vcpu->arch.microcode_version = data;
3354                 break;
3355         case MSR_IA32_ARCH_CAPABILITIES:
3356                 if (!msr_info->host_initiated)
3357                         return 1;
3358                 vcpu->arch.arch_capabilities = data;
3359                 break;
3360         case MSR_IA32_PERF_CAPABILITIES: {
3361                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3362
3363                 if (!msr_info->host_initiated)
3364                         return 1;
3365                 if (kvm_get_msr_feature(&msr_ent))
3366                         return 1;
3367                 if (data & ~msr_ent.data)
3368                         return 1;
3369
3370                 vcpu->arch.perf_capabilities = data;
3371
3372                 return 0;
3373                 }
3374         case MSR_EFER:
3375                 return set_efer(vcpu, msr_info);
3376         case MSR_K7_HWCR:
3377                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3378                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3379                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3380
3381                 /* Handle McStatusWrEn */
3382                 if (data == BIT_ULL(18)) {
3383                         vcpu->arch.msr_hwcr = data;
3384                 } else if (data != 0) {
3385                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3386                                     data);
3387                         return 1;
3388                 }
3389                 break;
3390         case MSR_FAM10H_MMIO_CONF_BASE:
3391                 if (data != 0) {
3392                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3393                                     "0x%llx\n", data);
3394                         return 1;
3395                 }
3396                 break;
3397         case 0x200 ... 0x2ff:
3398                 return kvm_mtrr_set_msr(vcpu, msr, data);
3399         case MSR_IA32_APICBASE:
3400                 return kvm_set_apic_base(vcpu, msr_info);
3401         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3402                 return kvm_x2apic_msr_write(vcpu, msr, data);
3403         case MSR_IA32_TSC_DEADLINE:
3404                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3405                 break;
3406         case MSR_IA32_TSC_ADJUST:
3407                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3408                         if (!msr_info->host_initiated) {
3409                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3410                                 adjust_tsc_offset_guest(vcpu, adj);
3411                                 /* Before back to guest, tsc_timestamp must be adjusted
3412                                  * as well, otherwise guest's percpu pvclock time could jump.
3413                                  */
3414                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3415                         }
3416                         vcpu->arch.ia32_tsc_adjust_msr = data;
3417                 }
3418                 break;
3419         case MSR_IA32_MISC_ENABLE:
3420                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3421                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3422                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3423                                 return 1;
3424                         vcpu->arch.ia32_misc_enable_msr = data;
3425                         kvm_update_cpuid_runtime(vcpu);
3426                 } else {
3427                         vcpu->arch.ia32_misc_enable_msr = data;
3428                 }
3429                 break;
3430         case MSR_IA32_SMBASE:
3431                 if (!msr_info->host_initiated)
3432                         return 1;
3433                 vcpu->arch.smbase = data;
3434                 break;
3435         case MSR_IA32_POWER_CTL:
3436                 vcpu->arch.msr_ia32_power_ctl = data;
3437                 break;
3438         case MSR_IA32_TSC:
3439                 if (msr_info->host_initiated) {
3440                         kvm_synchronize_tsc(vcpu, data);
3441                 } else {
3442                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3443                         adjust_tsc_offset_guest(vcpu, adj);
3444                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3445                 }
3446                 break;
3447         case MSR_IA32_XSS:
3448                 if (!msr_info->host_initiated &&
3449                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3450                         return 1;
3451                 /*
3452                  * KVM supports exposing PT to the guest, but does not support
3453                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3454                  * XSAVES/XRSTORS to save/restore PT MSRs.
3455                  */
3456                 if (data & ~supported_xss)
3457                         return 1;
3458                 vcpu->arch.ia32_xss = data;
3459                 kvm_update_cpuid_runtime(vcpu);
3460                 break;
3461         case MSR_SMI_COUNT:
3462                 if (!msr_info->host_initiated)
3463                         return 1;
3464                 vcpu->arch.smi_count = data;
3465                 break;
3466         case MSR_KVM_WALL_CLOCK_NEW:
3467                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3468                         return 1;
3469
3470                 vcpu->kvm->arch.wall_clock = data;
3471                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3472                 break;
3473         case MSR_KVM_WALL_CLOCK:
3474                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3475                         return 1;
3476
3477                 vcpu->kvm->arch.wall_clock = data;
3478                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3479                 break;
3480         case MSR_KVM_SYSTEM_TIME_NEW:
3481                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3482                         return 1;
3483
3484                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3485                 break;
3486         case MSR_KVM_SYSTEM_TIME:
3487                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3488                         return 1;
3489
3490                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3491                 break;
3492         case MSR_KVM_ASYNC_PF_EN:
3493                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3494                         return 1;
3495
3496                 if (kvm_pv_enable_async_pf(vcpu, data))
3497                         return 1;
3498                 break;
3499         case MSR_KVM_ASYNC_PF_INT:
3500                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3501                         return 1;
3502
3503                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3504                         return 1;
3505                 break;
3506         case MSR_KVM_ASYNC_PF_ACK:
3507                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3508                         return 1;
3509                 if (data & 0x1) {
3510                         vcpu->arch.apf.pageready_pending = false;
3511                         kvm_check_async_pf_completion(vcpu);
3512                 }
3513                 break;
3514         case MSR_KVM_STEAL_TIME:
3515                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3516                         return 1;
3517
3518                 if (unlikely(!sched_info_on()))
3519                         return 1;
3520
3521                 if (data & KVM_STEAL_RESERVED_MASK)
3522                         return 1;
3523
3524                 vcpu->arch.st.msr_val = data;
3525
3526                 if (!(data & KVM_MSR_ENABLED))
3527                         break;
3528
3529                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3530
3531                 break;
3532         case MSR_KVM_PV_EOI_EN:
3533                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3534                         return 1;
3535
3536                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3537                         return 1;
3538                 break;
3539
3540         case MSR_KVM_POLL_CONTROL:
3541                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3542                         return 1;
3543
3544                 /* only enable bit supported */
3545                 if (data & (-1ULL << 1))
3546                         return 1;
3547
3548                 vcpu->arch.msr_kvm_poll_control = data;
3549                 break;
3550
3551         case MSR_IA32_MCG_CTL:
3552         case MSR_IA32_MCG_STATUS:
3553         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3554                 return set_msr_mce(vcpu, msr_info);
3555
3556         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3557         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3558                 pr = true;
3559                 fallthrough;
3560         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3561         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3562                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3563                         return kvm_pmu_set_msr(vcpu, msr_info);
3564
3565                 if (pr || data != 0)
3566                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3567                                     "0x%x data 0x%llx\n", msr, data);
3568                 break;
3569         case MSR_K7_CLK_CTL:
3570                 /*
3571                  * Ignore all writes to this no longer documented MSR.
3572                  * Writes are only relevant for old K7 processors,
3573                  * all pre-dating SVM, but a recommended workaround from
3574                  * AMD for these chips. It is possible to specify the
3575                  * affected processor models on the command line, hence
3576                  * the need to ignore the workaround.
3577                  */
3578                 break;
3579         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3580         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3581         case HV_X64_MSR_SYNDBG_OPTIONS:
3582         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3583         case HV_X64_MSR_CRASH_CTL:
3584         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3585         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3586         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3587         case HV_X64_MSR_TSC_EMULATION_STATUS:
3588                 return kvm_hv_set_msr_common(vcpu, msr, data,
3589                                              msr_info->host_initiated);
3590         case MSR_IA32_BBL_CR_CTL3:
3591                 /* Drop writes to this legacy MSR -- see rdmsr
3592                  * counterpart for further detail.
3593                  */
3594                 if (report_ignored_msrs)
3595                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3596                                 msr, data);
3597                 break;
3598         case MSR_AMD64_OSVW_ID_LENGTH:
3599                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3600                         return 1;
3601                 vcpu->arch.osvw.length = data;
3602                 break;
3603         case MSR_AMD64_OSVW_STATUS:
3604                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3605                         return 1;
3606                 vcpu->arch.osvw.status = data;
3607                 break;
3608         case MSR_PLATFORM_INFO:
3609                 if (!msr_info->host_initiated ||
3610                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3611                      cpuid_fault_enabled(vcpu)))
3612                         return 1;
3613                 vcpu->arch.msr_platform_info = data;
3614                 break;
3615         case MSR_MISC_FEATURES_ENABLES:
3616                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3617                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3618                      !supports_cpuid_fault(vcpu)))
3619                         return 1;
3620                 vcpu->arch.msr_misc_features_enables = data;
3621                 break;
3622         default:
3623                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3624                         return kvm_pmu_set_msr(vcpu, msr_info);
3625                 return KVM_MSR_RET_INVALID;
3626         }
3627         return 0;
3628 }
3629 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3630
3631 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3632 {
3633         u64 data;
3634         u64 mcg_cap = vcpu->arch.mcg_cap;
3635         unsigned bank_num = mcg_cap & 0xff;
3636
3637         switch (msr) {
3638         case MSR_IA32_P5_MC_ADDR:
3639         case MSR_IA32_P5_MC_TYPE:
3640                 data = 0;
3641                 break;
3642         case MSR_IA32_MCG_CAP:
3643                 data = vcpu->arch.mcg_cap;
3644                 break;
3645         case MSR_IA32_MCG_CTL:
3646                 if (!(mcg_cap & MCG_CTL_P) && !host)
3647                         return 1;
3648                 data = vcpu->arch.mcg_ctl;
3649                 break;
3650         case MSR_IA32_MCG_STATUS:
3651                 data = vcpu->arch.mcg_status;
3652                 break;
3653         default:
3654                 if (msr >= MSR_IA32_MC0_CTL &&
3655                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3656                         u32 offset = array_index_nospec(
3657                                 msr - MSR_IA32_MC0_CTL,
3658                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3659
3660                         data = vcpu->arch.mce_banks[offset];
3661                         break;
3662                 }
3663                 return 1;
3664         }
3665         *pdata = data;
3666         return 0;
3667 }
3668
3669 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3670 {
3671         switch (msr_info->index) {
3672         case MSR_IA32_PLATFORM_ID:
3673         case MSR_IA32_EBL_CR_POWERON:
3674         case MSR_IA32_LASTBRANCHFROMIP:
3675         case MSR_IA32_LASTBRANCHTOIP:
3676         case MSR_IA32_LASTINTFROMIP:
3677         case MSR_IA32_LASTINTTOIP:
3678         case MSR_AMD64_SYSCFG:
3679         case MSR_K8_TSEG_ADDR:
3680         case MSR_K8_TSEG_MASK:
3681         case MSR_VM_HSAVE_PA:
3682         case MSR_K8_INT_PENDING_MSG:
3683         case MSR_AMD64_NB_CFG:
3684         case MSR_FAM10H_MMIO_CONF_BASE:
3685         case MSR_AMD64_BU_CFG2:
3686         case MSR_IA32_PERF_CTL:
3687         case MSR_AMD64_DC_CFG:
3688         case MSR_F15H_EX_CFG:
3689         /*
3690          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3691          * limit) MSRs. Just return 0, as we do not want to expose the host
3692          * data here. Do not conditionalize this on CPUID, as KVM does not do
3693          * so for existing CPU-specific MSRs.
3694          */
3695         case MSR_RAPL_POWER_UNIT:
3696         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3697         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3698         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3699         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3700                 msr_info->data = 0;
3701                 break;
3702         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3703                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3704                         return kvm_pmu_get_msr(vcpu, msr_info);
3705                 if (!msr_info->host_initiated)
3706                         return 1;
3707                 msr_info->data = 0;
3708                 break;
3709         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3710         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3711         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3712         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3713                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3714                         return kvm_pmu_get_msr(vcpu, msr_info);
3715                 msr_info->data = 0;
3716                 break;
3717         case MSR_IA32_UCODE_REV:
3718                 msr_info->data = vcpu->arch.microcode_version;
3719                 break;
3720         case MSR_IA32_ARCH_CAPABILITIES:
3721                 if (!msr_info->host_initiated &&
3722                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3723                         return 1;
3724                 msr_info->data = vcpu->arch.arch_capabilities;
3725                 break;
3726         case MSR_IA32_PERF_CAPABILITIES:
3727                 if (!msr_info->host_initiated &&
3728                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3729                         return 1;
3730                 msr_info->data = vcpu->arch.perf_capabilities;
3731                 break;
3732         case MSR_IA32_POWER_CTL:
3733                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3734                 break;
3735         case MSR_IA32_TSC: {
3736                 /*
3737                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3738                  * even when not intercepted. AMD manual doesn't explicitly
3739                  * state this but appears to behave the same.
3740                  *
3741                  * On userspace reads and writes, however, we unconditionally
3742                  * return L1's TSC value to ensure backwards-compatible
3743                  * behavior for migration.
3744                  */
3745                 u64 offset, ratio;
3746
3747                 if (msr_info->host_initiated) {
3748                         offset = vcpu->arch.l1_tsc_offset;
3749                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3750                 } else {
3751                         offset = vcpu->arch.tsc_offset;
3752                         ratio = vcpu->arch.tsc_scaling_ratio;
3753                 }
3754
3755                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3756                 break;
3757         }
3758         case MSR_MTRRcap:
3759         case 0x200 ... 0x2ff:
3760                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3761         case 0xcd: /* fsb frequency */
3762                 msr_info->data = 3;
3763                 break;
3764                 /*
3765                  * MSR_EBC_FREQUENCY_ID
3766                  * Conservative value valid for even the basic CPU models.
3767                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3768                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3769                  * and 266MHz for model 3, or 4. Set Core Clock
3770                  * Frequency to System Bus Frequency Ratio to 1 (bits
3771                  * 31:24) even though these are only valid for CPU
3772                  * models > 2, however guests may end up dividing or
3773                  * multiplying by zero otherwise.
3774                  */
3775         case MSR_EBC_FREQUENCY_ID:
3776                 msr_info->data = 1 << 24;
3777                 break;
3778         case MSR_IA32_APICBASE:
3779                 msr_info->data = kvm_get_apic_base(vcpu);
3780                 break;
3781         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3782                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3783         case MSR_IA32_TSC_DEADLINE:
3784                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3785                 break;
3786         case MSR_IA32_TSC_ADJUST:
3787                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3788                 break;
3789         case MSR_IA32_MISC_ENABLE:
3790                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3791                 break;
3792         case MSR_IA32_SMBASE:
3793                 if (!msr_info->host_initiated)
3794                         return 1;
3795                 msr_info->data = vcpu->arch.smbase;
3796                 break;
3797         case MSR_SMI_COUNT:
3798                 msr_info->data = vcpu->arch.smi_count;
3799                 break;
3800         case MSR_IA32_PERF_STATUS:
3801                 /* TSC increment by tick */
3802                 msr_info->data = 1000ULL;
3803                 /* CPU multiplier */
3804                 msr_info->data |= (((uint64_t)4ULL) << 40);
3805                 break;
3806         case MSR_EFER:
3807                 msr_info->data = vcpu->arch.efer;
3808                 break;
3809         case MSR_KVM_WALL_CLOCK:
3810                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3811                         return 1;
3812
3813                 msr_info->data = vcpu->kvm->arch.wall_clock;
3814                 break;
3815         case MSR_KVM_WALL_CLOCK_NEW:
3816                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3817                         return 1;
3818
3819                 msr_info->data = vcpu->kvm->arch.wall_clock;
3820                 break;
3821         case MSR_KVM_SYSTEM_TIME:
3822                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3823                         return 1;
3824
3825                 msr_info->data = vcpu->arch.time;
3826                 break;
3827         case MSR_KVM_SYSTEM_TIME_NEW:
3828                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3829                         return 1;
3830
3831                 msr_info->data = vcpu->arch.time;
3832                 break;
3833         case MSR_KVM_ASYNC_PF_EN:
3834                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3835                         return 1;
3836
3837                 msr_info->data = vcpu->arch.apf.msr_en_val;
3838                 break;
3839         case MSR_KVM_ASYNC_PF_INT:
3840                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3841                         return 1;
3842
3843                 msr_info->data = vcpu->arch.apf.msr_int_val;
3844                 break;
3845         case MSR_KVM_ASYNC_PF_ACK:
3846                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3847                         return 1;
3848
3849                 msr_info->data = 0;
3850                 break;
3851         case MSR_KVM_STEAL_TIME:
3852                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3853                         return 1;
3854
3855                 msr_info->data = vcpu->arch.st.msr_val;
3856                 break;
3857         case MSR_KVM_PV_EOI_EN:
3858                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3859                         return 1;
3860
3861                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3862                 break;
3863         case MSR_KVM_POLL_CONTROL:
3864                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3865                         return 1;
3866
3867                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3868                 break;
3869         case MSR_IA32_P5_MC_ADDR:
3870         case MSR_IA32_P5_MC_TYPE:
3871         case MSR_IA32_MCG_CAP:
3872         case MSR_IA32_MCG_CTL:
3873         case MSR_IA32_MCG_STATUS:
3874         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3875                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3876                                    msr_info->host_initiated);
3877         case MSR_IA32_XSS:
3878                 if (!msr_info->host_initiated &&
3879                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3880                         return 1;
3881                 msr_info->data = vcpu->arch.ia32_xss;
3882                 break;
3883         case MSR_K7_CLK_CTL:
3884                 /*
3885                  * Provide expected ramp-up count for K7. All other
3886                  * are set to zero, indicating minimum divisors for
3887                  * every field.
3888                  *
3889                  * This prevents guest kernels on AMD host with CPU
3890                  * type 6, model 8 and higher from exploding due to
3891                  * the rdmsr failing.
3892                  */
3893                 msr_info->data = 0x20000000;
3894                 break;
3895         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3896         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3897         case HV_X64_MSR_SYNDBG_OPTIONS:
3898         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3899         case HV_X64_MSR_CRASH_CTL:
3900         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3901         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3902         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3903         case HV_X64_MSR_TSC_EMULATION_STATUS:
3904                 return kvm_hv_get_msr_common(vcpu,
3905                                              msr_info->index, &msr_info->data,
3906                                              msr_info->host_initiated);
3907         case MSR_IA32_BBL_CR_CTL3:
3908                 /* This legacy MSR exists but isn't fully documented in current
3909                  * silicon.  It is however accessed by winxp in very narrow
3910                  * scenarios where it sets bit #19, itself documented as
3911                  * a "reserved" bit.  Best effort attempt to source coherent
3912                  * read data here should the balance of the register be
3913                  * interpreted by the guest:
3914                  *
3915                  * L2 cache control register 3: 64GB range, 256KB size,
3916                  * enabled, latency 0x1, configured
3917                  */
3918                 msr_info->data = 0xbe702111;
3919                 break;
3920         case MSR_AMD64_OSVW_ID_LENGTH:
3921                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3922                         return 1;
3923                 msr_info->data = vcpu->arch.osvw.length;
3924                 break;
3925         case MSR_AMD64_OSVW_STATUS:
3926                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3927                         return 1;
3928                 msr_info->data = vcpu->arch.osvw.status;
3929                 break;
3930         case MSR_PLATFORM_INFO:
3931                 if (!msr_info->host_initiated &&
3932                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3933                         return 1;
3934                 msr_info->data = vcpu->arch.msr_platform_info;
3935                 break;
3936         case MSR_MISC_FEATURES_ENABLES:
3937                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3938                 break;
3939         case MSR_K7_HWCR:
3940                 msr_info->data = vcpu->arch.msr_hwcr;
3941                 break;
3942         default:
3943                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3944                         return kvm_pmu_get_msr(vcpu, msr_info);
3945                 return KVM_MSR_RET_INVALID;
3946         }
3947         return 0;
3948 }
3949 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3950
3951 /*
3952  * Read or write a bunch of msrs. All parameters are kernel addresses.
3953  *
3954  * @return number of msrs set successfully.
3955  */
3956 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3957                     struct kvm_msr_entry *entries,
3958                     int (*do_msr)(struct kvm_vcpu *vcpu,
3959                                   unsigned index, u64 *data))
3960 {
3961         int i;
3962
3963         for (i = 0; i < msrs->nmsrs; ++i)
3964                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3965                         break;
3966
3967         return i;
3968 }
3969
3970 /*
3971  * Read or write a bunch of msrs. Parameters are user addresses.
3972  *
3973  * @return number of msrs set successfully.
3974  */
3975 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3976                   int (*do_msr)(struct kvm_vcpu *vcpu,
3977                                 unsigned index, u64 *data),
3978                   int writeback)
3979 {
3980         struct kvm_msrs msrs;
3981         struct kvm_msr_entry *entries;
3982         int r, n;
3983         unsigned size;
3984
3985         r = -EFAULT;
3986         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3987                 goto out;
3988
3989         r = -E2BIG;
3990         if (msrs.nmsrs >= MAX_IO_MSRS)
3991                 goto out;
3992
3993         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3994         entries = memdup_user(user_msrs->entries, size);
3995         if (IS_ERR(entries)) {
3996                 r = PTR_ERR(entries);
3997                 goto out;
3998         }
3999
4000         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4001         if (r < 0)
4002                 goto out_free;
4003
4004         r = -EFAULT;
4005         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4006                 goto out_free;
4007
4008         r = n;
4009
4010 out_free:
4011         kfree(entries);
4012 out:
4013         return r;
4014 }
4015
4016 static inline bool kvm_can_mwait_in_guest(void)
4017 {
4018         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4019                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4020                 boot_cpu_has(X86_FEATURE_ARAT);
4021 }
4022
4023 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4024                                             struct kvm_cpuid2 __user *cpuid_arg)
4025 {
4026         struct kvm_cpuid2 cpuid;
4027         int r;
4028
4029         r = -EFAULT;
4030         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4031                 return r;
4032
4033         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4034         if (r)
4035                 return r;
4036
4037         r = -EFAULT;
4038         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4039                 return r;
4040
4041         return 0;
4042 }
4043
4044 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4045 {
4046         int r = 0;
4047
4048         switch (ext) {
4049         case KVM_CAP_IRQCHIP:
4050         case KVM_CAP_HLT:
4051         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4052         case KVM_CAP_SET_TSS_ADDR:
4053         case KVM_CAP_EXT_CPUID:
4054         case KVM_CAP_EXT_EMUL_CPUID:
4055         case KVM_CAP_CLOCKSOURCE:
4056         case KVM_CAP_PIT:
4057         case KVM_CAP_NOP_IO_DELAY:
4058         case KVM_CAP_MP_STATE:
4059         case KVM_CAP_SYNC_MMU:
4060         case KVM_CAP_USER_NMI:
4061         case KVM_CAP_REINJECT_CONTROL:
4062         case KVM_CAP_IRQ_INJECT_STATUS:
4063         case KVM_CAP_IOEVENTFD:
4064         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4065         case KVM_CAP_PIT2:
4066         case KVM_CAP_PIT_STATE2:
4067         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4068         case KVM_CAP_VCPU_EVENTS:
4069         case KVM_CAP_HYPERV:
4070         case KVM_CAP_HYPERV_VAPIC:
4071         case KVM_CAP_HYPERV_SPIN:
4072         case KVM_CAP_HYPERV_SYNIC:
4073         case KVM_CAP_HYPERV_SYNIC2:
4074         case KVM_CAP_HYPERV_VP_INDEX:
4075         case KVM_CAP_HYPERV_EVENTFD:
4076         case KVM_CAP_HYPERV_TLBFLUSH:
4077         case KVM_CAP_HYPERV_SEND_IPI:
4078         case KVM_CAP_HYPERV_CPUID:
4079         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4080         case KVM_CAP_SYS_HYPERV_CPUID:
4081         case KVM_CAP_PCI_SEGMENT:
4082         case KVM_CAP_DEBUGREGS:
4083         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4084         case KVM_CAP_XSAVE:
4085         case KVM_CAP_ASYNC_PF:
4086         case KVM_CAP_ASYNC_PF_INT:
4087         case KVM_CAP_GET_TSC_KHZ:
4088         case KVM_CAP_KVMCLOCK_CTRL:
4089         case KVM_CAP_READONLY_MEM:
4090         case KVM_CAP_HYPERV_TIME:
4091         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4092         case KVM_CAP_TSC_DEADLINE_TIMER:
4093         case KVM_CAP_DISABLE_QUIRKS:
4094         case KVM_CAP_SET_BOOT_CPU_ID:
4095         case KVM_CAP_SPLIT_IRQCHIP:
4096         case KVM_CAP_IMMEDIATE_EXIT:
4097         case KVM_CAP_PMU_EVENT_FILTER:
4098         case KVM_CAP_GET_MSR_FEATURES:
4099         case KVM_CAP_MSR_PLATFORM_INFO:
4100         case KVM_CAP_EXCEPTION_PAYLOAD:
4101         case KVM_CAP_SET_GUEST_DEBUG:
4102         case KVM_CAP_LAST_CPU:
4103         case KVM_CAP_X86_USER_SPACE_MSR:
4104         case KVM_CAP_X86_MSR_FILTER:
4105         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4106 #ifdef CONFIG_X86_SGX_KVM
4107         case KVM_CAP_SGX_ATTRIBUTE:
4108 #endif
4109         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4110         case KVM_CAP_SREGS2:
4111         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4112                 r = 1;
4113                 break;
4114         case KVM_CAP_EXIT_HYPERCALL:
4115                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4116                 break;
4117         case KVM_CAP_SET_GUEST_DEBUG2:
4118                 return KVM_GUESTDBG_VALID_MASK;
4119 #ifdef CONFIG_KVM_XEN
4120         case KVM_CAP_XEN_HVM:
4121                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4122                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4123                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4124                 if (sched_info_on())
4125                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4126                 break;
4127 #endif
4128         case KVM_CAP_SYNC_REGS:
4129                 r = KVM_SYNC_X86_VALID_FIELDS;
4130                 break;
4131         case KVM_CAP_ADJUST_CLOCK:
4132                 r = KVM_CLOCK_TSC_STABLE;
4133                 break;
4134         case KVM_CAP_X86_DISABLE_EXITS:
4135                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4136                       KVM_X86_DISABLE_EXITS_CSTATE;
4137                 if(kvm_can_mwait_in_guest())
4138                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4139                 break;
4140         case KVM_CAP_X86_SMM:
4141                 /* SMBASE is usually relocated above 1M on modern chipsets,
4142                  * and SMM handlers might indeed rely on 4G segment limits,
4143                  * so do not report SMM to be available if real mode is
4144                  * emulated via vm86 mode.  Still, do not go to great lengths
4145                  * to avoid userspace's usage of the feature, because it is a
4146                  * fringe case that is not enabled except via specific settings
4147                  * of the module parameters.
4148                  */
4149                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4150                 break;
4151         case KVM_CAP_VAPIC:
4152                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4153                 break;
4154         case KVM_CAP_NR_VCPUS:
4155                 r = KVM_SOFT_MAX_VCPUS;
4156                 break;
4157         case KVM_CAP_MAX_VCPUS:
4158                 r = KVM_MAX_VCPUS;
4159                 break;
4160         case KVM_CAP_MAX_VCPU_ID:
4161                 r = KVM_MAX_VCPU_ID;
4162                 break;
4163         case KVM_CAP_PV_MMU:    /* obsolete */
4164                 r = 0;
4165                 break;
4166         case KVM_CAP_MCE:
4167                 r = KVM_MAX_MCE_BANKS;
4168                 break;
4169         case KVM_CAP_XCRS:
4170                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4171                 break;
4172         case KVM_CAP_TSC_CONTROL:
4173                 r = kvm_has_tsc_control;
4174                 break;
4175         case KVM_CAP_X2APIC_API:
4176                 r = KVM_X2APIC_API_VALID_FLAGS;
4177                 break;
4178         case KVM_CAP_NESTED_STATE:
4179                 r = kvm_x86_ops.nested_ops->get_state ?
4180                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4181                 break;
4182         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4183                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4184                 break;
4185         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4186                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4187                 break;
4188         case KVM_CAP_SMALLER_MAXPHYADDR:
4189                 r = (int) allow_smaller_maxphyaddr;
4190                 break;
4191         case KVM_CAP_STEAL_TIME:
4192                 r = sched_info_on();
4193                 break;
4194         case KVM_CAP_X86_BUS_LOCK_EXIT:
4195                 if (kvm_has_bus_lock_exit)
4196                         r = KVM_BUS_LOCK_DETECTION_OFF |
4197                             KVM_BUS_LOCK_DETECTION_EXIT;
4198                 else
4199                         r = 0;
4200                 break;
4201         default:
4202                 break;
4203         }
4204         return r;
4205
4206 }
4207
4208 long kvm_arch_dev_ioctl(struct file *filp,
4209                         unsigned int ioctl, unsigned long arg)
4210 {
4211         void __user *argp = (void __user *)arg;
4212         long r;
4213
4214         switch (ioctl) {
4215         case KVM_GET_MSR_INDEX_LIST: {
4216                 struct kvm_msr_list __user *user_msr_list = argp;
4217                 struct kvm_msr_list msr_list;
4218                 unsigned n;
4219
4220                 r = -EFAULT;
4221                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4222                         goto out;
4223                 n = msr_list.nmsrs;
4224                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4225                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4226                         goto out;
4227                 r = -E2BIG;
4228                 if (n < msr_list.nmsrs)
4229                         goto out;
4230                 r = -EFAULT;
4231                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4232                                  num_msrs_to_save * sizeof(u32)))
4233                         goto out;
4234                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4235                                  &emulated_msrs,
4236                                  num_emulated_msrs * sizeof(u32)))
4237                         goto out;
4238                 r = 0;
4239                 break;
4240         }
4241         case KVM_GET_SUPPORTED_CPUID:
4242         case KVM_GET_EMULATED_CPUID: {
4243                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4244                 struct kvm_cpuid2 cpuid;
4245
4246                 r = -EFAULT;
4247                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4248                         goto out;
4249
4250                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4251                                             ioctl);
4252                 if (r)
4253                         goto out;
4254
4255                 r = -EFAULT;
4256                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4257                         goto out;
4258                 r = 0;
4259                 break;
4260         }
4261         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4262                 r = -EFAULT;
4263                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4264                                  sizeof(kvm_mce_cap_supported)))
4265                         goto out;
4266                 r = 0;
4267                 break;
4268         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4269                 struct kvm_msr_list __user *user_msr_list = argp;
4270                 struct kvm_msr_list msr_list;
4271                 unsigned int n;
4272
4273                 r = -EFAULT;
4274                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4275                         goto out;
4276                 n = msr_list.nmsrs;
4277                 msr_list.nmsrs = num_msr_based_features;
4278                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4279                         goto out;
4280                 r = -E2BIG;
4281                 if (n < msr_list.nmsrs)
4282                         goto out;
4283                 r = -EFAULT;
4284                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4285                                  num_msr_based_features * sizeof(u32)))
4286                         goto out;
4287                 r = 0;
4288                 break;
4289         }
4290         case KVM_GET_MSRS:
4291                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4292                 break;
4293         case KVM_GET_SUPPORTED_HV_CPUID:
4294                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4295                 break;
4296         default:
4297                 r = -EINVAL;
4298                 break;
4299         }
4300 out:
4301         return r;
4302 }
4303
4304 static void wbinvd_ipi(void *garbage)
4305 {
4306         wbinvd();
4307 }
4308
4309 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4310 {
4311         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4312 }
4313
4314 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4315 {
4316         /* Address WBINVD may be executed by guest */
4317         if (need_emulate_wbinvd(vcpu)) {
4318                 if (static_call(kvm_x86_has_wbinvd_exit)())
4319                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4320                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4321                         smp_call_function_single(vcpu->cpu,
4322                                         wbinvd_ipi, NULL, 1);
4323         }
4324
4325         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4326
4327         /* Save host pkru register if supported */
4328         vcpu->arch.host_pkru = read_pkru();
4329
4330         /* Apply any externally detected TSC adjustments (due to suspend) */
4331         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4332                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4333                 vcpu->arch.tsc_offset_adjustment = 0;
4334                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4335         }
4336
4337         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4338                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4339                                 rdtsc() - vcpu->arch.last_host_tsc;
4340                 if (tsc_delta < 0)
4341                         mark_tsc_unstable("KVM discovered backwards TSC");
4342
4343                 if (kvm_check_tsc_unstable()) {
4344                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4345                                                 vcpu->arch.last_guest_tsc);
4346                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4347                         vcpu->arch.tsc_catchup = 1;
4348                 }
4349
4350                 if (kvm_lapic_hv_timer_in_use(vcpu))
4351                         kvm_lapic_restart_hv_timer(vcpu);
4352
4353                 /*
4354                  * On a host with synchronized TSC, there is no need to update
4355                  * kvmclock on vcpu->cpu migration
4356                  */
4357                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4358                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4359                 if (vcpu->cpu != cpu)
4360                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4361                 vcpu->cpu = cpu;
4362         }
4363
4364         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4365 }
4366
4367 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4368 {
4369         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4370         struct kvm_steal_time __user *st;
4371         struct kvm_memslots *slots;
4372         static const u8 preempted = KVM_VCPU_PREEMPTED;
4373
4374         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4375                 return;
4376
4377         if (vcpu->arch.st.preempted)
4378                 return;
4379
4380         /* This happens on process exit */
4381         if (unlikely(current->mm != vcpu->kvm->mm))
4382                 return;
4383
4384         slots = kvm_memslots(vcpu->kvm);
4385
4386         if (unlikely(slots->generation != ghc->generation ||
4387                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4388                 return;
4389
4390         st = (struct kvm_steal_time __user *)ghc->hva;
4391         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4392
4393         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4394                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4395
4396         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4397 }
4398
4399 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4400 {
4401         int idx;
4402
4403         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4404                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4405
4406         /*
4407          * Take the srcu lock as memslots will be accessed to check the gfn
4408          * cache generation against the memslots generation.
4409          */
4410         idx = srcu_read_lock(&vcpu->kvm->srcu);
4411         if (kvm_xen_msr_enabled(vcpu->kvm))
4412                 kvm_xen_runstate_set_preempted(vcpu);
4413         else
4414                 kvm_steal_time_set_preempted(vcpu);
4415         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4416
4417         static_call(kvm_x86_vcpu_put)(vcpu);
4418         vcpu->arch.last_host_tsc = rdtsc();
4419 }
4420
4421 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4422                                     struct kvm_lapic_state *s)
4423 {
4424         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4425
4426         return kvm_apic_get_state(vcpu, s);
4427 }
4428
4429 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4430                                     struct kvm_lapic_state *s)
4431 {
4432         int r;
4433
4434         r = kvm_apic_set_state(vcpu, s);
4435         if (r)
4436                 return r;
4437         update_cr8_intercept(vcpu);
4438
4439         return 0;
4440 }
4441
4442 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4443 {
4444         /*
4445          * We can accept userspace's request for interrupt injection
4446          * as long as we have a place to store the interrupt number.
4447          * The actual injection will happen when the CPU is able to
4448          * deliver the interrupt.
4449          */
4450         if (kvm_cpu_has_extint(vcpu))
4451                 return false;
4452
4453         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4454         return (!lapic_in_kernel(vcpu) ||
4455                 kvm_apic_accept_pic_intr(vcpu));
4456 }
4457
4458 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4459 {
4460         /*
4461          * Do not cause an interrupt window exit if an exception
4462          * is pending or an event needs reinjection; userspace
4463          * might want to inject the interrupt manually using KVM_SET_REGS
4464          * or KVM_SET_SREGS.  For that to work, we must be at an
4465          * instruction boundary and with no events half-injected.
4466          */
4467         return (kvm_arch_interrupt_allowed(vcpu) &&
4468                 kvm_cpu_accept_dm_intr(vcpu) &&
4469                 !kvm_event_needs_reinjection(vcpu) &&
4470                 !vcpu->arch.exception.pending);
4471 }
4472
4473 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4474                                     struct kvm_interrupt *irq)
4475 {
4476         if (irq->irq >= KVM_NR_INTERRUPTS)
4477                 return -EINVAL;
4478
4479         if (!irqchip_in_kernel(vcpu->kvm)) {
4480                 kvm_queue_interrupt(vcpu, irq->irq, false);
4481                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4482                 return 0;
4483         }
4484
4485         /*
4486          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4487          * fail for in-kernel 8259.
4488          */
4489         if (pic_in_kernel(vcpu->kvm))
4490                 return -ENXIO;
4491
4492         if (vcpu->arch.pending_external_vector != -1)
4493                 return -EEXIST;
4494
4495         vcpu->arch.pending_external_vector = irq->irq;
4496         kvm_make_request(KVM_REQ_EVENT, vcpu);
4497         return 0;
4498 }
4499
4500 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4501 {
4502         kvm_inject_nmi(vcpu);
4503
4504         return 0;
4505 }
4506
4507 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4508 {
4509         kvm_make_request(KVM_REQ_SMI, vcpu);
4510
4511         return 0;
4512 }
4513
4514 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4515                                            struct kvm_tpr_access_ctl *tac)
4516 {
4517         if (tac->flags)
4518                 return -EINVAL;
4519         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4520         return 0;
4521 }
4522
4523 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4524                                         u64 mcg_cap)
4525 {
4526         int r;
4527         unsigned bank_num = mcg_cap & 0xff, bank;
4528
4529         r = -EINVAL;
4530         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4531                 goto out;
4532         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4533                 goto out;
4534         r = 0;
4535         vcpu->arch.mcg_cap = mcg_cap;
4536         /* Init IA32_MCG_CTL to all 1s */
4537         if (mcg_cap & MCG_CTL_P)
4538                 vcpu->arch.mcg_ctl = ~(u64)0;
4539         /* Init IA32_MCi_CTL to all 1s */
4540         for (bank = 0; bank < bank_num; bank++)
4541                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4542
4543         static_call(kvm_x86_setup_mce)(vcpu);
4544 out:
4545         return r;
4546 }
4547
4548 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4549                                       struct kvm_x86_mce *mce)
4550 {
4551         u64 mcg_cap = vcpu->arch.mcg_cap;
4552         unsigned bank_num = mcg_cap & 0xff;
4553         u64 *banks = vcpu->arch.mce_banks;
4554
4555         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4556                 return -EINVAL;
4557         /*
4558          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4559          * reporting is disabled
4560          */
4561         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4562             vcpu->arch.mcg_ctl != ~(u64)0)
4563                 return 0;
4564         banks += 4 * mce->bank;
4565         /*
4566          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4567          * reporting is disabled for the bank
4568          */
4569         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4570                 return 0;
4571         if (mce->status & MCI_STATUS_UC) {
4572                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4573                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4574                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4575                         return 0;
4576                 }
4577                 if (banks[1] & MCI_STATUS_VAL)
4578                         mce->status |= MCI_STATUS_OVER;
4579                 banks[2] = mce->addr;
4580                 banks[3] = mce->misc;
4581                 vcpu->arch.mcg_status = mce->mcg_status;
4582                 banks[1] = mce->status;
4583                 kvm_queue_exception(vcpu, MC_VECTOR);
4584         } else if (!(banks[1] & MCI_STATUS_VAL)
4585                    || !(banks[1] & MCI_STATUS_UC)) {
4586                 if (banks[1] & MCI_STATUS_VAL)
4587                         mce->status |= MCI_STATUS_OVER;
4588                 banks[2] = mce->addr;
4589                 banks[3] = mce->misc;
4590                 banks[1] = mce->status;
4591         } else
4592                 banks[1] |= MCI_STATUS_OVER;
4593         return 0;
4594 }
4595
4596 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4597                                                struct kvm_vcpu_events *events)
4598 {
4599         process_nmi(vcpu);
4600
4601         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4602                 process_smi(vcpu);
4603
4604         /*
4605          * In guest mode, payload delivery should be deferred,
4606          * so that the L1 hypervisor can intercept #PF before
4607          * CR2 is modified (or intercept #DB before DR6 is
4608          * modified under nVMX). Unless the per-VM capability,
4609          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4610          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4611          * opportunistically defer the exception payload, deliver it if the
4612          * capability hasn't been requested before processing a
4613          * KVM_GET_VCPU_EVENTS.
4614          */
4615         if (!vcpu->kvm->arch.exception_payload_enabled &&
4616             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4617                 kvm_deliver_exception_payload(vcpu);
4618
4619         /*
4620          * The API doesn't provide the instruction length for software
4621          * exceptions, so don't report them. As long as the guest RIP
4622          * isn't advanced, we should expect to encounter the exception
4623          * again.
4624          */
4625         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4626                 events->exception.injected = 0;
4627                 events->exception.pending = 0;
4628         } else {
4629                 events->exception.injected = vcpu->arch.exception.injected;
4630                 events->exception.pending = vcpu->arch.exception.pending;
4631                 /*
4632                  * For ABI compatibility, deliberately conflate
4633                  * pending and injected exceptions when
4634                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4635                  */
4636                 if (!vcpu->kvm->arch.exception_payload_enabled)
4637                         events->exception.injected |=
4638                                 vcpu->arch.exception.pending;
4639         }
4640         events->exception.nr = vcpu->arch.exception.nr;
4641         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4642         events->exception.error_code = vcpu->arch.exception.error_code;
4643         events->exception_has_payload = vcpu->arch.exception.has_payload;
4644         events->exception_payload = vcpu->arch.exception.payload;
4645
4646         events->interrupt.injected =
4647                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4648         events->interrupt.nr = vcpu->arch.interrupt.nr;
4649         events->interrupt.soft = 0;
4650         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4651
4652         events->nmi.injected = vcpu->arch.nmi_injected;
4653         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4654         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4655         events->nmi.pad = 0;
4656
4657         events->sipi_vector = 0; /* never valid when reporting to user space */
4658
4659         events->smi.smm = is_smm(vcpu);
4660         events->smi.pending = vcpu->arch.smi_pending;
4661         events->smi.smm_inside_nmi =
4662                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4663         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4664
4665         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4666                          | KVM_VCPUEVENT_VALID_SHADOW
4667                          | KVM_VCPUEVENT_VALID_SMM);
4668         if (vcpu->kvm->arch.exception_payload_enabled)
4669                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4670
4671         memset(&events->reserved, 0, sizeof(events->reserved));
4672 }
4673
4674 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4675
4676 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4677                                               struct kvm_vcpu_events *events)
4678 {
4679         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4680                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4681                               | KVM_VCPUEVENT_VALID_SHADOW
4682                               | KVM_VCPUEVENT_VALID_SMM
4683                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4684                 return -EINVAL;
4685
4686         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4687                 if (!vcpu->kvm->arch.exception_payload_enabled)
4688                         return -EINVAL;
4689                 if (events->exception.pending)
4690                         events->exception.injected = 0;
4691                 else
4692                         events->exception_has_payload = 0;
4693         } else {
4694                 events->exception.pending = 0;
4695                 events->exception_has_payload = 0;
4696         }
4697
4698         if ((events->exception.injected || events->exception.pending) &&
4699             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4700                 return -EINVAL;
4701
4702         /* INITs are latched while in SMM */
4703         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4704             (events->smi.smm || events->smi.pending) &&
4705             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4706                 return -EINVAL;
4707
4708         process_nmi(vcpu);
4709         vcpu->arch.exception.injected = events->exception.injected;
4710         vcpu->arch.exception.pending = events->exception.pending;
4711         vcpu->arch.exception.nr = events->exception.nr;
4712         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4713         vcpu->arch.exception.error_code = events->exception.error_code;
4714         vcpu->arch.exception.has_payload = events->exception_has_payload;
4715         vcpu->arch.exception.payload = events->exception_payload;
4716
4717         vcpu->arch.interrupt.injected = events->interrupt.injected;
4718         vcpu->arch.interrupt.nr = events->interrupt.nr;
4719         vcpu->arch.interrupt.soft = events->interrupt.soft;
4720         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4721                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4722                                                 events->interrupt.shadow);
4723
4724         vcpu->arch.nmi_injected = events->nmi.injected;
4725         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4726                 vcpu->arch.nmi_pending = events->nmi.pending;
4727         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4728
4729         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4730             lapic_in_kernel(vcpu))
4731                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4732
4733         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4734                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4735                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4736                         kvm_smm_changed(vcpu, events->smi.smm);
4737                 }
4738
4739                 vcpu->arch.smi_pending = events->smi.pending;
4740
4741                 if (events->smi.smm) {
4742                         if (events->smi.smm_inside_nmi)
4743                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4744                         else
4745                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4746                 }
4747
4748                 if (lapic_in_kernel(vcpu)) {
4749                         if (events->smi.latched_init)
4750                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4751                         else
4752                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4753                 }
4754         }
4755
4756         kvm_make_request(KVM_REQ_EVENT, vcpu);
4757
4758         return 0;
4759 }
4760
4761 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4762                                              struct kvm_debugregs *dbgregs)
4763 {
4764         unsigned long val;
4765
4766         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4767         kvm_get_dr(vcpu, 6, &val);
4768         dbgregs->dr6 = val;
4769         dbgregs->dr7 = vcpu->arch.dr7;
4770         dbgregs->flags = 0;
4771         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4772 }
4773
4774 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4775                                             struct kvm_debugregs *dbgregs)
4776 {
4777         if (dbgregs->flags)
4778                 return -EINVAL;
4779
4780         if (!kvm_dr6_valid(dbgregs->dr6))
4781                 return -EINVAL;
4782         if (!kvm_dr7_valid(dbgregs->dr7))
4783                 return -EINVAL;
4784
4785         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4786         kvm_update_dr0123(vcpu);
4787         vcpu->arch.dr6 = dbgregs->dr6;
4788         vcpu->arch.dr7 = dbgregs->dr7;
4789         kvm_update_dr7(vcpu);
4790
4791         return 0;
4792 }
4793
4794 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4795
4796 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4797 {
4798         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4799         u64 xstate_bv = xsave->header.xfeatures;
4800         u64 valid;
4801
4802         /*
4803          * Copy legacy XSAVE area, to avoid complications with CPUID
4804          * leaves 0 and 1 in the loop below.
4805          */
4806         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4807
4808         /* Set XSTATE_BV */
4809         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4810         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4811
4812         /*
4813          * Copy each region from the possibly compacted offset to the
4814          * non-compacted offset.
4815          */
4816         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4817         while (valid) {
4818                 u32 size, offset, ecx, edx;
4819                 u64 xfeature_mask = valid & -valid;
4820                 int xfeature_nr = fls64(xfeature_mask) - 1;
4821                 void *src;
4822
4823                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4824                             &size, &offset, &ecx, &edx);
4825
4826                 if (xfeature_nr == XFEATURE_PKRU) {
4827                         memcpy(dest + offset, &vcpu->arch.pkru,
4828                                sizeof(vcpu->arch.pkru));
4829                 } else {
4830                         src = get_xsave_addr(xsave, xfeature_nr);
4831                         if (src)
4832                                 memcpy(dest + offset, src, size);
4833                 }
4834
4835                 valid -= xfeature_mask;
4836         }
4837 }
4838
4839 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4840 {
4841         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4842         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4843         u64 valid;
4844
4845         /*
4846          * Copy legacy XSAVE area, to avoid complications with CPUID
4847          * leaves 0 and 1 in the loop below.
4848          */
4849         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4850
4851         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4852         xsave->header.xfeatures = xstate_bv;
4853         if (boot_cpu_has(X86_FEATURE_XSAVES))
4854                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4855
4856         /*
4857          * Copy each region from the non-compacted offset to the
4858          * possibly compacted offset.
4859          */
4860         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4861         while (valid) {
4862                 u32 size, offset, ecx, edx;
4863                 u64 xfeature_mask = valid & -valid;
4864                 int xfeature_nr = fls64(xfeature_mask) - 1;
4865
4866                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4867                             &size, &offset, &ecx, &edx);
4868
4869                 if (xfeature_nr == XFEATURE_PKRU) {
4870                         memcpy(&vcpu->arch.pkru, src + offset,
4871                                sizeof(vcpu->arch.pkru));
4872                 } else {
4873                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4874
4875                         if (dest)
4876                                 memcpy(dest, src + offset, size);
4877                 }
4878
4879                 valid -= xfeature_mask;
4880         }
4881 }
4882
4883 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4884                                          struct kvm_xsave *guest_xsave)
4885 {
4886         if (!vcpu->arch.guest_fpu)
4887                 return;
4888
4889         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4890                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4891                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4892         } else {
4893                 memcpy(guest_xsave->region,
4894                         &vcpu->arch.guest_fpu->state.fxsave,
4895                         sizeof(struct fxregs_state));
4896                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4897                         XFEATURE_MASK_FPSSE;
4898         }
4899 }
4900
4901 #define XSAVE_MXCSR_OFFSET 24
4902
4903 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4904                                         struct kvm_xsave *guest_xsave)
4905 {
4906         u64 xstate_bv;
4907         u32 mxcsr;
4908
4909         if (!vcpu->arch.guest_fpu)
4910                 return 0;
4911
4912         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4913         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4914
4915         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4916                 /*
4917                  * Here we allow setting states that are not present in
4918                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4919                  * with old userspace.
4920                  */
4921                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4922                         return -EINVAL;
4923                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4924         } else {
4925                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4926                         mxcsr & ~mxcsr_feature_mask)
4927                         return -EINVAL;
4928                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4929                         guest_xsave->region, sizeof(struct fxregs_state));
4930         }
4931         return 0;
4932 }
4933
4934 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4935                                         struct kvm_xcrs *guest_xcrs)
4936 {
4937         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4938                 guest_xcrs->nr_xcrs = 0;
4939                 return;
4940         }
4941
4942         guest_xcrs->nr_xcrs = 1;
4943         guest_xcrs->flags = 0;
4944         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4945         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4946 }
4947
4948 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4949                                        struct kvm_xcrs *guest_xcrs)
4950 {
4951         int i, r = 0;
4952
4953         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4954                 return -EINVAL;
4955
4956         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4957                 return -EINVAL;
4958
4959         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4960                 /* Only support XCR0 currently */
4961                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4962                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4963                                 guest_xcrs->xcrs[i].value);
4964                         break;
4965                 }
4966         if (r)
4967                 r = -EINVAL;
4968         return r;
4969 }
4970
4971 /*
4972  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4973  * stopped by the hypervisor.  This function will be called from the host only.
4974  * EINVAL is returned when the host attempts to set the flag for a guest that
4975  * does not support pv clocks.
4976  */
4977 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4978 {
4979         if (!vcpu->arch.pv_time_enabled)
4980                 return -EINVAL;
4981         vcpu->arch.pvclock_set_guest_stopped_request = true;
4982         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4983         return 0;
4984 }
4985
4986 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4987                                      struct kvm_enable_cap *cap)
4988 {
4989         int r;
4990         uint16_t vmcs_version;
4991         void __user *user_ptr;
4992
4993         if (cap->flags)
4994                 return -EINVAL;
4995
4996         switch (cap->cap) {
4997         case KVM_CAP_HYPERV_SYNIC2:
4998                 if (cap->args[0])
4999                         return -EINVAL;
5000                 fallthrough;
5001
5002         case KVM_CAP_HYPERV_SYNIC:
5003                 if (!irqchip_in_kernel(vcpu->kvm))
5004                         return -EINVAL;
5005                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5006                                              KVM_CAP_HYPERV_SYNIC2);
5007         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5008                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5009                         return -ENOTTY;
5010                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5011                 if (!r) {
5012                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5013                         if (copy_to_user(user_ptr, &vmcs_version,
5014                                          sizeof(vmcs_version)))
5015                                 r = -EFAULT;
5016                 }
5017                 return r;
5018         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5019                 if (!kvm_x86_ops.enable_direct_tlbflush)
5020                         return -ENOTTY;
5021
5022                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5023
5024         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5025                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5026
5027         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5028                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5029                 if (vcpu->arch.pv_cpuid.enforce)
5030                         kvm_update_pv_runtime(vcpu);
5031
5032                 return 0;
5033         default:
5034                 return -EINVAL;
5035         }
5036 }
5037
5038 long kvm_arch_vcpu_ioctl(struct file *filp,
5039                          unsigned int ioctl, unsigned long arg)
5040 {
5041         struct kvm_vcpu *vcpu = filp->private_data;
5042         void __user *argp = (void __user *)arg;
5043         int r;
5044         union {
5045                 struct kvm_sregs2 *sregs2;
5046                 struct kvm_lapic_state *lapic;
5047                 struct kvm_xsave *xsave;
5048                 struct kvm_xcrs *xcrs;
5049                 void *buffer;
5050         } u;
5051
5052         vcpu_load(vcpu);
5053
5054         u.buffer = NULL;
5055         switch (ioctl) {
5056         case KVM_GET_LAPIC: {
5057                 r = -EINVAL;
5058                 if (!lapic_in_kernel(vcpu))
5059                         goto out;
5060                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5061                                 GFP_KERNEL_ACCOUNT);
5062
5063                 r = -ENOMEM;
5064                 if (!u.lapic)
5065                         goto out;
5066                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5067                 if (r)
5068                         goto out;
5069                 r = -EFAULT;
5070                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5071                         goto out;
5072                 r = 0;
5073                 break;
5074         }
5075         case KVM_SET_LAPIC: {
5076                 r = -EINVAL;
5077                 if (!lapic_in_kernel(vcpu))
5078                         goto out;
5079                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5080                 if (IS_ERR(u.lapic)) {
5081                         r = PTR_ERR(u.lapic);
5082                         goto out_nofree;
5083                 }
5084
5085                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5086                 break;
5087         }
5088         case KVM_INTERRUPT: {
5089                 struct kvm_interrupt irq;
5090
5091                 r = -EFAULT;
5092                 if (copy_from_user(&irq, argp, sizeof(irq)))
5093                         goto out;
5094                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5095                 break;
5096         }
5097         case KVM_NMI: {
5098                 r = kvm_vcpu_ioctl_nmi(vcpu);
5099                 break;
5100         }
5101         case KVM_SMI: {
5102                 r = kvm_vcpu_ioctl_smi(vcpu);
5103                 break;
5104         }
5105         case KVM_SET_CPUID: {
5106                 struct kvm_cpuid __user *cpuid_arg = argp;
5107                 struct kvm_cpuid cpuid;
5108
5109                 r = -EFAULT;
5110                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5111                         goto out;
5112                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5113                 break;
5114         }
5115         case KVM_SET_CPUID2: {
5116                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5117                 struct kvm_cpuid2 cpuid;
5118
5119                 r = -EFAULT;
5120                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5121                         goto out;
5122                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5123                                               cpuid_arg->entries);
5124                 break;
5125         }
5126         case KVM_GET_CPUID2: {
5127                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5128                 struct kvm_cpuid2 cpuid;
5129
5130                 r = -EFAULT;
5131                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5132                         goto out;
5133                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5134                                               cpuid_arg->entries);
5135                 if (r)
5136                         goto out;
5137                 r = -EFAULT;
5138                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5139                         goto out;
5140                 r = 0;
5141                 break;
5142         }
5143         case KVM_GET_MSRS: {
5144                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5145                 r = msr_io(vcpu, argp, do_get_msr, 1);
5146                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5147                 break;
5148         }
5149         case KVM_SET_MSRS: {
5150                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5151                 r = msr_io(vcpu, argp, do_set_msr, 0);
5152                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5153                 break;
5154         }
5155         case KVM_TPR_ACCESS_REPORTING: {
5156                 struct kvm_tpr_access_ctl tac;
5157
5158                 r = -EFAULT;
5159                 if (copy_from_user(&tac, argp, sizeof(tac)))
5160                         goto out;
5161                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5162                 if (r)
5163                         goto out;
5164                 r = -EFAULT;
5165                 if (copy_to_user(argp, &tac, sizeof(tac)))
5166                         goto out;
5167                 r = 0;
5168                 break;
5169         };
5170         case KVM_SET_VAPIC_ADDR: {
5171                 struct kvm_vapic_addr va;
5172                 int idx;
5173
5174                 r = -EINVAL;
5175                 if (!lapic_in_kernel(vcpu))
5176                         goto out;
5177                 r = -EFAULT;
5178                 if (copy_from_user(&va, argp, sizeof(va)))
5179                         goto out;
5180                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5181                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5182                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5183                 break;
5184         }
5185         case KVM_X86_SETUP_MCE: {
5186                 u64 mcg_cap;
5187
5188                 r = -EFAULT;
5189                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5190                         goto out;
5191                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5192                 break;
5193         }
5194         case KVM_X86_SET_MCE: {
5195                 struct kvm_x86_mce mce;
5196
5197                 r = -EFAULT;
5198                 if (copy_from_user(&mce, argp, sizeof(mce)))
5199                         goto out;
5200                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5201                 break;
5202         }
5203         case KVM_GET_VCPU_EVENTS: {
5204                 struct kvm_vcpu_events events;
5205
5206                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5207
5208                 r = -EFAULT;
5209                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5210                         break;
5211                 r = 0;
5212                 break;
5213         }
5214         case KVM_SET_VCPU_EVENTS: {
5215                 struct kvm_vcpu_events events;
5216
5217                 r = -EFAULT;
5218                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5219                         break;
5220
5221                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5222                 break;
5223         }
5224         case KVM_GET_DEBUGREGS: {
5225                 struct kvm_debugregs dbgregs;
5226
5227                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5228
5229                 r = -EFAULT;
5230                 if (copy_to_user(argp, &dbgregs,
5231                                  sizeof(struct kvm_debugregs)))
5232                         break;
5233                 r = 0;
5234                 break;
5235         }
5236         case KVM_SET_DEBUGREGS: {
5237                 struct kvm_debugregs dbgregs;
5238
5239                 r = -EFAULT;
5240                 if (copy_from_user(&dbgregs, argp,
5241                                    sizeof(struct kvm_debugregs)))
5242                         break;
5243
5244                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5245                 break;
5246         }
5247         case KVM_GET_XSAVE: {
5248                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5249                 r = -ENOMEM;
5250                 if (!u.xsave)
5251                         break;
5252
5253                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5254
5255                 r = -EFAULT;
5256                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5257                         break;
5258                 r = 0;
5259                 break;
5260         }
5261         case KVM_SET_XSAVE: {
5262                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5263                 if (IS_ERR(u.xsave)) {
5264                         r = PTR_ERR(u.xsave);
5265                         goto out_nofree;
5266                 }
5267
5268                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5269                 break;
5270         }
5271         case KVM_GET_XCRS: {
5272                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5273                 r = -ENOMEM;
5274                 if (!u.xcrs)
5275                         break;
5276
5277                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5278
5279                 r = -EFAULT;
5280                 if (copy_to_user(argp, u.xcrs,
5281                                  sizeof(struct kvm_xcrs)))
5282                         break;
5283                 r = 0;
5284                 break;
5285         }
5286         case KVM_SET_XCRS: {
5287                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5288                 if (IS_ERR(u.xcrs)) {
5289                         r = PTR_ERR(u.xcrs);
5290                         goto out_nofree;
5291                 }
5292
5293                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5294                 break;
5295         }
5296         case KVM_SET_TSC_KHZ: {
5297                 u32 user_tsc_khz;
5298
5299                 r = -EINVAL;
5300                 user_tsc_khz = (u32)arg;
5301
5302                 if (kvm_has_tsc_control &&
5303                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5304                         goto out;
5305
5306                 if (user_tsc_khz == 0)
5307                         user_tsc_khz = tsc_khz;
5308
5309                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5310                         r = 0;
5311
5312                 goto out;
5313         }
5314         case KVM_GET_TSC_KHZ: {
5315                 r = vcpu->arch.virtual_tsc_khz;
5316                 goto out;
5317         }
5318         case KVM_KVMCLOCK_CTRL: {
5319                 r = kvm_set_guest_paused(vcpu);
5320                 goto out;
5321         }
5322         case KVM_ENABLE_CAP: {
5323                 struct kvm_enable_cap cap;
5324
5325                 r = -EFAULT;
5326                 if (copy_from_user(&cap, argp, sizeof(cap)))
5327                         goto out;
5328                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5329                 break;
5330         }
5331         case KVM_GET_NESTED_STATE: {
5332                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5333                 u32 user_data_size;
5334
5335                 r = -EINVAL;
5336                 if (!kvm_x86_ops.nested_ops->get_state)
5337                         break;
5338
5339                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5340                 r = -EFAULT;
5341                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5342                         break;
5343
5344                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5345                                                      user_data_size);
5346                 if (r < 0)
5347                         break;
5348
5349                 if (r > user_data_size) {
5350                         if (put_user(r, &user_kvm_nested_state->size))
5351                                 r = -EFAULT;
5352                         else
5353                                 r = -E2BIG;
5354                         break;
5355                 }
5356
5357                 r = 0;
5358                 break;
5359         }
5360         case KVM_SET_NESTED_STATE: {
5361                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5362                 struct kvm_nested_state kvm_state;
5363                 int idx;
5364
5365                 r = -EINVAL;
5366                 if (!kvm_x86_ops.nested_ops->set_state)
5367                         break;
5368
5369                 r = -EFAULT;
5370                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5371                         break;
5372
5373                 r = -EINVAL;
5374                 if (kvm_state.size < sizeof(kvm_state))
5375                         break;
5376
5377                 if (kvm_state.flags &
5378                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5379                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5380                       | KVM_STATE_NESTED_GIF_SET))
5381                         break;
5382
5383                 /* nested_run_pending implies guest_mode.  */
5384                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5385                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5386                         break;
5387
5388                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5389                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5390                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5391                 break;
5392         }
5393         case KVM_GET_SUPPORTED_HV_CPUID:
5394                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5395                 break;
5396 #ifdef CONFIG_KVM_XEN
5397         case KVM_XEN_VCPU_GET_ATTR: {
5398                 struct kvm_xen_vcpu_attr xva;
5399
5400                 r = -EFAULT;
5401                 if (copy_from_user(&xva, argp, sizeof(xva)))
5402                         goto out;
5403                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5404                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5405                         r = -EFAULT;
5406                 break;
5407         }
5408         case KVM_XEN_VCPU_SET_ATTR: {
5409                 struct kvm_xen_vcpu_attr xva;
5410
5411                 r = -EFAULT;
5412                 if (copy_from_user(&xva, argp, sizeof(xva)))
5413                         goto out;
5414                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5415                 break;
5416         }
5417 #endif
5418         case KVM_GET_SREGS2: {
5419                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5420                 r = -ENOMEM;
5421                 if (!u.sregs2)
5422                         goto out;
5423                 __get_sregs2(vcpu, u.sregs2);
5424                 r = -EFAULT;
5425                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5426                         goto out;
5427                 r = 0;
5428                 break;
5429         }
5430         case KVM_SET_SREGS2: {
5431                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5432                 if (IS_ERR(u.sregs2)) {
5433                         r = PTR_ERR(u.sregs2);
5434                         u.sregs2 = NULL;
5435                         goto out;
5436                 }
5437                 r = __set_sregs2(vcpu, u.sregs2);
5438                 break;
5439         }
5440         default:
5441                 r = -EINVAL;
5442         }
5443 out:
5444         kfree(u.buffer);
5445 out_nofree:
5446         vcpu_put(vcpu);
5447         return r;
5448 }
5449
5450 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5451 {
5452         return VM_FAULT_SIGBUS;
5453 }
5454
5455 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5456 {
5457         int ret;
5458
5459         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5460                 return -EINVAL;
5461         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5462         return ret;
5463 }
5464
5465 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5466                                               u64 ident_addr)
5467 {
5468         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5469 }
5470
5471 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5472                                          unsigned long kvm_nr_mmu_pages)
5473 {
5474         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5475                 return -EINVAL;
5476
5477         mutex_lock(&kvm->slots_lock);
5478
5479         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5480         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5481
5482         mutex_unlock(&kvm->slots_lock);
5483         return 0;
5484 }
5485
5486 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5487 {
5488         return kvm->arch.n_max_mmu_pages;
5489 }
5490
5491 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5492 {
5493         struct kvm_pic *pic = kvm->arch.vpic;
5494         int r;
5495
5496         r = 0;
5497         switch (chip->chip_id) {
5498         case KVM_IRQCHIP_PIC_MASTER:
5499                 memcpy(&chip->chip.pic, &pic->pics[0],
5500                         sizeof(struct kvm_pic_state));
5501                 break;
5502         case KVM_IRQCHIP_PIC_SLAVE:
5503                 memcpy(&chip->chip.pic, &pic->pics[1],
5504                         sizeof(struct kvm_pic_state));
5505                 break;
5506         case KVM_IRQCHIP_IOAPIC:
5507                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5508                 break;
5509         default:
5510                 r = -EINVAL;
5511                 break;
5512         }
5513         return r;
5514 }
5515
5516 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5517 {
5518         struct kvm_pic *pic = kvm->arch.vpic;
5519         int r;
5520
5521         r = 0;
5522         switch (chip->chip_id) {
5523         case KVM_IRQCHIP_PIC_MASTER:
5524                 spin_lock(&pic->lock);
5525                 memcpy(&pic->pics[0], &chip->chip.pic,
5526                         sizeof(struct kvm_pic_state));
5527                 spin_unlock(&pic->lock);
5528                 break;
5529         case KVM_IRQCHIP_PIC_SLAVE:
5530                 spin_lock(&pic->lock);
5531                 memcpy(&pic->pics[1], &chip->chip.pic,
5532                         sizeof(struct kvm_pic_state));
5533                 spin_unlock(&pic->lock);
5534                 break;
5535         case KVM_IRQCHIP_IOAPIC:
5536                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5537                 break;
5538         default:
5539                 r = -EINVAL;
5540                 break;
5541         }
5542         kvm_pic_update_irq(pic);
5543         return r;
5544 }
5545
5546 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5547 {
5548         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5549
5550         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5551
5552         mutex_lock(&kps->lock);
5553         memcpy(ps, &kps->channels, sizeof(*ps));
5554         mutex_unlock(&kps->lock);
5555         return 0;
5556 }
5557
5558 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5559 {
5560         int i;
5561         struct kvm_pit *pit = kvm->arch.vpit;
5562
5563         mutex_lock(&pit->pit_state.lock);
5564         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5565         for (i = 0; i < 3; i++)
5566                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5567         mutex_unlock(&pit->pit_state.lock);
5568         return 0;
5569 }
5570
5571 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5572 {
5573         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5574         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5575                 sizeof(ps->channels));
5576         ps->flags = kvm->arch.vpit->pit_state.flags;
5577         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5578         memset(&ps->reserved, 0, sizeof(ps->reserved));
5579         return 0;
5580 }
5581
5582 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5583 {
5584         int start = 0;
5585         int i;
5586         u32 prev_legacy, cur_legacy;
5587         struct kvm_pit *pit = kvm->arch.vpit;
5588
5589         mutex_lock(&pit->pit_state.lock);
5590         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5591         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5592         if (!prev_legacy && cur_legacy)
5593                 start = 1;
5594         memcpy(&pit->pit_state.channels, &ps->channels,
5595                sizeof(pit->pit_state.channels));
5596         pit->pit_state.flags = ps->flags;
5597         for (i = 0; i < 3; i++)
5598                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5599                                    start && i == 0);
5600         mutex_unlock(&pit->pit_state.lock);
5601         return 0;
5602 }
5603
5604 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5605                                  struct kvm_reinject_control *control)
5606 {
5607         struct kvm_pit *pit = kvm->arch.vpit;
5608
5609         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5610          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5611          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5612          */
5613         mutex_lock(&pit->pit_state.lock);
5614         kvm_pit_set_reinject(pit, control->pit_reinject);
5615         mutex_unlock(&pit->pit_state.lock);
5616
5617         return 0;
5618 }
5619
5620 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5621 {
5622
5623         /*
5624          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5625          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5626          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5627          * VM-Exit.
5628          */
5629         struct kvm_vcpu *vcpu;
5630         int i;
5631
5632         kvm_for_each_vcpu(i, vcpu, kvm)
5633                 kvm_vcpu_kick(vcpu);
5634 }
5635
5636 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5637                         bool line_status)
5638 {
5639         if (!irqchip_in_kernel(kvm))
5640                 return -ENXIO;
5641
5642         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5643                                         irq_event->irq, irq_event->level,
5644                                         line_status);
5645         return 0;
5646 }
5647
5648 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5649                             struct kvm_enable_cap *cap)
5650 {
5651         int r;
5652
5653         if (cap->flags)
5654                 return -EINVAL;
5655
5656         switch (cap->cap) {
5657         case KVM_CAP_DISABLE_QUIRKS:
5658                 kvm->arch.disabled_quirks = cap->args[0];
5659                 r = 0;
5660                 break;
5661         case KVM_CAP_SPLIT_IRQCHIP: {
5662                 mutex_lock(&kvm->lock);
5663                 r = -EINVAL;
5664                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5665                         goto split_irqchip_unlock;
5666                 r = -EEXIST;
5667                 if (irqchip_in_kernel(kvm))
5668                         goto split_irqchip_unlock;
5669                 if (kvm->created_vcpus)
5670                         goto split_irqchip_unlock;
5671                 r = kvm_setup_empty_irq_routing(kvm);
5672                 if (r)
5673                         goto split_irqchip_unlock;
5674                 /* Pairs with irqchip_in_kernel. */
5675                 smp_wmb();
5676                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5677                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5678                 r = 0;
5679 split_irqchip_unlock:
5680                 mutex_unlock(&kvm->lock);
5681                 break;
5682         }
5683         case KVM_CAP_X2APIC_API:
5684                 r = -EINVAL;
5685                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5686                         break;
5687
5688                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5689                         kvm->arch.x2apic_format = true;
5690                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5691                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5692
5693                 r = 0;
5694                 break;
5695         case KVM_CAP_X86_DISABLE_EXITS:
5696                 r = -EINVAL;
5697                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5698                         break;
5699
5700                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5701                         kvm_can_mwait_in_guest())
5702                         kvm->arch.mwait_in_guest = true;
5703                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5704                         kvm->arch.hlt_in_guest = true;
5705                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5706                         kvm->arch.pause_in_guest = true;
5707                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5708                         kvm->arch.cstate_in_guest = true;
5709                 r = 0;
5710                 break;
5711         case KVM_CAP_MSR_PLATFORM_INFO:
5712                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5713                 r = 0;
5714                 break;
5715         case KVM_CAP_EXCEPTION_PAYLOAD:
5716                 kvm->arch.exception_payload_enabled = cap->args[0];
5717                 r = 0;
5718                 break;
5719         case KVM_CAP_X86_USER_SPACE_MSR:
5720                 kvm->arch.user_space_msr_mask = cap->args[0];
5721                 r = 0;
5722                 break;
5723         case KVM_CAP_X86_BUS_LOCK_EXIT:
5724                 r = -EINVAL;
5725                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5726                         break;
5727
5728                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5729                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5730                         break;
5731
5732                 if (kvm_has_bus_lock_exit &&
5733                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5734                         kvm->arch.bus_lock_detection_enabled = true;
5735                 r = 0;
5736                 break;
5737 #ifdef CONFIG_X86_SGX_KVM
5738         case KVM_CAP_SGX_ATTRIBUTE: {
5739                 unsigned long allowed_attributes = 0;
5740
5741                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5742                 if (r)
5743                         break;
5744
5745                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5746                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5747                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5748                         kvm->arch.sgx_provisioning_allowed = true;
5749                 else
5750                         r = -EINVAL;
5751                 break;
5752         }
5753 #endif
5754         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5755                 r = -EINVAL;
5756                 if (kvm_x86_ops.vm_copy_enc_context_from)
5757                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5758                 return r;
5759         case KVM_CAP_EXIT_HYPERCALL:
5760                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5761                         r = -EINVAL;
5762                         break;
5763                 }
5764                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5765                 r = 0;
5766                 break;
5767         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5768                 r = -EINVAL;
5769                 if (cap->args[0] & ~1)
5770                         break;
5771                 kvm->arch.exit_on_emulation_error = cap->args[0];
5772                 r = 0;
5773                 break;
5774         default:
5775                 r = -EINVAL;
5776                 break;
5777         }
5778         return r;
5779 }
5780
5781 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5782 {
5783         struct kvm_x86_msr_filter *msr_filter;
5784
5785         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5786         if (!msr_filter)
5787                 return NULL;
5788
5789         msr_filter->default_allow = default_allow;
5790         return msr_filter;
5791 }
5792
5793 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5794 {
5795         u32 i;
5796
5797         if (!msr_filter)
5798                 return;
5799
5800         for (i = 0; i < msr_filter->count; i++)
5801                 kfree(msr_filter->ranges[i].bitmap);
5802
5803         kfree(msr_filter);
5804 }
5805
5806 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5807                               struct kvm_msr_filter_range *user_range)
5808 {
5809         unsigned long *bitmap = NULL;
5810         size_t bitmap_size;
5811
5812         if (!user_range->nmsrs)
5813                 return 0;
5814
5815         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5816                 return -EINVAL;
5817
5818         if (!user_range->flags)
5819                 return -EINVAL;
5820
5821         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5822         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5823                 return -EINVAL;
5824
5825         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5826         if (IS_ERR(bitmap))
5827                 return PTR_ERR(bitmap);
5828
5829         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5830                 .flags = user_range->flags,
5831                 .base = user_range->base,
5832                 .nmsrs = user_range->nmsrs,
5833                 .bitmap = bitmap,
5834         };
5835
5836         msr_filter->count++;
5837         return 0;
5838 }
5839
5840 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5841 {
5842         struct kvm_msr_filter __user *user_msr_filter = argp;
5843         struct kvm_x86_msr_filter *new_filter, *old_filter;
5844         struct kvm_msr_filter filter;
5845         bool default_allow;
5846         bool empty = true;
5847         int r = 0;
5848         u32 i;
5849
5850         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5851                 return -EFAULT;
5852
5853         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5854                 empty &= !filter.ranges[i].nmsrs;
5855
5856         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5857         if (empty && !default_allow)
5858                 return -EINVAL;
5859
5860         new_filter = kvm_alloc_msr_filter(default_allow);
5861         if (!new_filter)
5862                 return -ENOMEM;
5863
5864         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5865                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5866                 if (r) {
5867                         kvm_free_msr_filter(new_filter);
5868                         return r;
5869                 }
5870         }
5871
5872         mutex_lock(&kvm->lock);
5873
5874         /* The per-VM filter is protected by kvm->lock... */
5875         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5876
5877         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5878         synchronize_srcu(&kvm->srcu);
5879
5880         kvm_free_msr_filter(old_filter);
5881
5882         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5883         mutex_unlock(&kvm->lock);
5884
5885         return 0;
5886 }
5887
5888 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5889 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5890 {
5891         struct kvm_vcpu *vcpu;
5892         int i, ret = 0;
5893
5894         mutex_lock(&kvm->lock);
5895         kvm_for_each_vcpu(i, vcpu, kvm) {
5896                 if (!vcpu->arch.pv_time_enabled)
5897                         continue;
5898
5899                 ret = kvm_set_guest_paused(vcpu);
5900                 if (ret) {
5901                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5902                                 vcpu->vcpu_id, ret);
5903                         break;
5904                 }
5905         }
5906         mutex_unlock(&kvm->lock);
5907
5908         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5909 }
5910
5911 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5912 {
5913         switch (state) {
5914         case PM_HIBERNATION_PREPARE:
5915         case PM_SUSPEND_PREPARE:
5916                 return kvm_arch_suspend_notifier(kvm);
5917         }
5918
5919         return NOTIFY_DONE;
5920 }
5921 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5922
5923 long kvm_arch_vm_ioctl(struct file *filp,
5924                        unsigned int ioctl, unsigned long arg)
5925 {
5926         struct kvm *kvm = filp->private_data;
5927         void __user *argp = (void __user *)arg;
5928         int r = -ENOTTY;
5929         /*
5930          * This union makes it completely explicit to gcc-3.x
5931          * that these two variables' stack usage should be
5932          * combined, not added together.
5933          */
5934         union {
5935                 struct kvm_pit_state ps;
5936                 struct kvm_pit_state2 ps2;
5937                 struct kvm_pit_config pit_config;
5938         } u;
5939
5940         switch (ioctl) {
5941         case KVM_SET_TSS_ADDR:
5942                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5943                 break;
5944         case KVM_SET_IDENTITY_MAP_ADDR: {
5945                 u64 ident_addr;
5946
5947                 mutex_lock(&kvm->lock);
5948                 r = -EINVAL;
5949                 if (kvm->created_vcpus)
5950                         goto set_identity_unlock;
5951                 r = -EFAULT;
5952                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5953                         goto set_identity_unlock;
5954                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5955 set_identity_unlock:
5956                 mutex_unlock(&kvm->lock);
5957                 break;
5958         }
5959         case KVM_SET_NR_MMU_PAGES:
5960                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5961                 break;
5962         case KVM_GET_NR_MMU_PAGES:
5963                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5964                 break;
5965         case KVM_CREATE_IRQCHIP: {
5966                 mutex_lock(&kvm->lock);
5967
5968                 r = -EEXIST;
5969                 if (irqchip_in_kernel(kvm))
5970                         goto create_irqchip_unlock;
5971
5972                 r = -EINVAL;
5973                 if (kvm->created_vcpus)
5974                         goto create_irqchip_unlock;
5975
5976                 r = kvm_pic_init(kvm);
5977                 if (r)
5978                         goto create_irqchip_unlock;
5979
5980                 r = kvm_ioapic_init(kvm);
5981                 if (r) {
5982                         kvm_pic_destroy(kvm);
5983                         goto create_irqchip_unlock;
5984                 }
5985
5986                 r = kvm_setup_default_irq_routing(kvm);
5987                 if (r) {
5988                         kvm_ioapic_destroy(kvm);
5989                         kvm_pic_destroy(kvm);
5990                         goto create_irqchip_unlock;
5991                 }
5992                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5993                 smp_wmb();
5994                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5995         create_irqchip_unlock:
5996                 mutex_unlock(&kvm->lock);
5997                 break;
5998         }
5999         case KVM_CREATE_PIT:
6000                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6001                 goto create_pit;
6002         case KVM_CREATE_PIT2:
6003                 r = -EFAULT;
6004                 if (copy_from_user(&u.pit_config, argp,
6005                                    sizeof(struct kvm_pit_config)))
6006                         goto out;
6007         create_pit:
6008                 mutex_lock(&kvm->lock);
6009                 r = -EEXIST;
6010                 if (kvm->arch.vpit)
6011                         goto create_pit_unlock;
6012                 r = -ENOMEM;
6013                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6014                 if (kvm->arch.vpit)
6015                         r = 0;
6016         create_pit_unlock:
6017                 mutex_unlock(&kvm->lock);
6018                 break;
6019         case KVM_GET_IRQCHIP: {
6020                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6021                 struct kvm_irqchip *chip;
6022
6023                 chip = memdup_user(argp, sizeof(*chip));
6024                 if (IS_ERR(chip)) {
6025                         r = PTR_ERR(chip);
6026                         goto out;
6027                 }
6028
6029                 r = -ENXIO;
6030                 if (!irqchip_kernel(kvm))
6031                         goto get_irqchip_out;
6032                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6033                 if (r)
6034                         goto get_irqchip_out;
6035                 r = -EFAULT;
6036                 if (copy_to_user(argp, chip, sizeof(*chip)))
6037                         goto get_irqchip_out;
6038                 r = 0;
6039         get_irqchip_out:
6040                 kfree(chip);
6041                 break;
6042         }
6043         case KVM_SET_IRQCHIP: {
6044                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6045                 struct kvm_irqchip *chip;
6046
6047                 chip = memdup_user(argp, sizeof(*chip));
6048                 if (IS_ERR(chip)) {
6049                         r = PTR_ERR(chip);
6050                         goto out;
6051                 }
6052
6053                 r = -ENXIO;
6054                 if (!irqchip_kernel(kvm))
6055                         goto set_irqchip_out;
6056                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6057         set_irqchip_out:
6058                 kfree(chip);
6059                 break;
6060         }
6061         case KVM_GET_PIT: {
6062                 r = -EFAULT;
6063                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6064                         goto out;
6065                 r = -ENXIO;
6066                 if (!kvm->arch.vpit)
6067                         goto out;
6068                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6069                 if (r)
6070                         goto out;
6071                 r = -EFAULT;
6072                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6073                         goto out;
6074                 r = 0;
6075                 break;
6076         }
6077         case KVM_SET_PIT: {
6078                 r = -EFAULT;
6079                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6080                         goto out;
6081                 mutex_lock(&kvm->lock);
6082                 r = -ENXIO;
6083                 if (!kvm->arch.vpit)
6084                         goto set_pit_out;
6085                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6086 set_pit_out:
6087                 mutex_unlock(&kvm->lock);
6088                 break;
6089         }
6090         case KVM_GET_PIT2: {
6091                 r = -ENXIO;
6092                 if (!kvm->arch.vpit)
6093                         goto out;
6094                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6095                 if (r)
6096                         goto out;
6097                 r = -EFAULT;
6098                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6099                         goto out;
6100                 r = 0;
6101                 break;
6102         }
6103         case KVM_SET_PIT2: {
6104                 r = -EFAULT;
6105                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6106                         goto out;
6107                 mutex_lock(&kvm->lock);
6108                 r = -ENXIO;
6109                 if (!kvm->arch.vpit)
6110                         goto set_pit2_out;
6111                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6112 set_pit2_out:
6113                 mutex_unlock(&kvm->lock);
6114                 break;
6115         }
6116         case KVM_REINJECT_CONTROL: {
6117                 struct kvm_reinject_control control;
6118                 r =  -EFAULT;
6119                 if (copy_from_user(&control, argp, sizeof(control)))
6120                         goto out;
6121                 r = -ENXIO;
6122                 if (!kvm->arch.vpit)
6123                         goto out;
6124                 r = kvm_vm_ioctl_reinject(kvm, &control);
6125                 break;
6126         }
6127         case KVM_SET_BOOT_CPU_ID:
6128                 r = 0;
6129                 mutex_lock(&kvm->lock);
6130                 if (kvm->created_vcpus)
6131                         r = -EBUSY;
6132                 else
6133                         kvm->arch.bsp_vcpu_id = arg;
6134                 mutex_unlock(&kvm->lock);
6135                 break;
6136 #ifdef CONFIG_KVM_XEN
6137         case KVM_XEN_HVM_CONFIG: {
6138                 struct kvm_xen_hvm_config xhc;
6139                 r = -EFAULT;
6140                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6141                         goto out;
6142                 r = kvm_xen_hvm_config(kvm, &xhc);
6143                 break;
6144         }
6145         case KVM_XEN_HVM_GET_ATTR: {
6146                 struct kvm_xen_hvm_attr xha;
6147
6148                 r = -EFAULT;
6149                 if (copy_from_user(&xha, argp, sizeof(xha)))
6150                         goto out;
6151                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6152                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6153                         r = -EFAULT;
6154                 break;
6155         }
6156         case KVM_XEN_HVM_SET_ATTR: {
6157                 struct kvm_xen_hvm_attr xha;
6158
6159                 r = -EFAULT;
6160                 if (copy_from_user(&xha, argp, sizeof(xha)))
6161                         goto out;
6162                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6163                 break;
6164         }
6165 #endif
6166         case KVM_SET_CLOCK: {
6167                 struct kvm_arch *ka = &kvm->arch;
6168                 struct kvm_clock_data user_ns;
6169                 u64 now_ns;
6170
6171                 r = -EFAULT;
6172                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6173                         goto out;
6174
6175                 r = -EINVAL;
6176                 if (user_ns.flags)
6177                         goto out;
6178
6179                 r = 0;
6180                 /*
6181                  * TODO: userspace has to take care of races with VCPU_RUN, so
6182                  * kvm_gen_update_masterclock() can be cut down to locked
6183                  * pvclock_update_vm_gtod_copy().
6184                  */
6185                 kvm_gen_update_masterclock(kvm);
6186
6187                 /*
6188                  * This pairs with kvm_guest_time_update(): when masterclock is
6189                  * in use, we use master_kernel_ns + kvmclock_offset to set
6190                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6191                  * is slightly ahead) here we risk going negative on unsigned
6192                  * 'system_time' when 'user_ns.clock' is very small.
6193                  */
6194                 raw_spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6195                 if (kvm->arch.use_master_clock)
6196                         now_ns = ka->master_kernel_ns;
6197                 else
6198                         now_ns = get_kvmclock_base_ns();
6199                 ka->kvmclock_offset = user_ns.clock - now_ns;
6200                 raw_spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6201
6202                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6203                 break;
6204         }
6205         case KVM_GET_CLOCK: {
6206                 struct kvm_clock_data user_ns;
6207                 u64 now_ns;
6208
6209                 now_ns = get_kvmclock_ns(kvm);
6210                 user_ns.clock = now_ns;
6211                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6212                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6213
6214                 r = -EFAULT;
6215                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6216                         goto out;
6217                 r = 0;
6218                 break;
6219         }
6220         case KVM_MEMORY_ENCRYPT_OP: {
6221                 r = -ENOTTY;
6222                 if (kvm_x86_ops.mem_enc_op)
6223                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6224                 break;
6225         }
6226         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6227                 struct kvm_enc_region region;
6228
6229                 r = -EFAULT;
6230                 if (copy_from_user(&region, argp, sizeof(region)))
6231                         goto out;
6232
6233                 r = -ENOTTY;
6234                 if (kvm_x86_ops.mem_enc_reg_region)
6235                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6236                 break;
6237         }
6238         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6239                 struct kvm_enc_region region;
6240
6241                 r = -EFAULT;
6242                 if (copy_from_user(&region, argp, sizeof(region)))
6243                         goto out;
6244
6245                 r = -ENOTTY;
6246                 if (kvm_x86_ops.mem_enc_unreg_region)
6247                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6248                 break;
6249         }
6250         case KVM_HYPERV_EVENTFD: {
6251                 struct kvm_hyperv_eventfd hvevfd;
6252
6253                 r = -EFAULT;
6254                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6255                         goto out;
6256                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6257                 break;
6258         }
6259         case KVM_SET_PMU_EVENT_FILTER:
6260                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6261                 break;
6262         case KVM_X86_SET_MSR_FILTER:
6263                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6264                 break;
6265         default:
6266                 r = -ENOTTY;
6267         }
6268 out:
6269         return r;
6270 }
6271
6272 static void kvm_init_msr_list(void)
6273 {
6274         struct x86_pmu_capability x86_pmu;
6275         u32 dummy[2];
6276         unsigned i;
6277
6278         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6279                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6280
6281         perf_get_x86_pmu_capability(&x86_pmu);
6282
6283         num_msrs_to_save = 0;
6284         num_emulated_msrs = 0;
6285         num_msr_based_features = 0;
6286
6287         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6288                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6289                         continue;
6290
6291                 /*
6292                  * Even MSRs that are valid in the host may not be exposed
6293                  * to the guests in some cases.
6294                  */
6295                 switch (msrs_to_save_all[i]) {
6296                 case MSR_IA32_BNDCFGS:
6297                         if (!kvm_mpx_supported())
6298                                 continue;
6299                         break;
6300                 case MSR_TSC_AUX:
6301                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6302                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6303                                 continue;
6304                         break;
6305                 case MSR_IA32_UMWAIT_CONTROL:
6306                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6307                                 continue;
6308                         break;
6309                 case MSR_IA32_RTIT_CTL:
6310                 case MSR_IA32_RTIT_STATUS:
6311                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6312                                 continue;
6313                         break;
6314                 case MSR_IA32_RTIT_CR3_MATCH:
6315                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6316                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6317                                 continue;
6318                         break;
6319                 case MSR_IA32_RTIT_OUTPUT_BASE:
6320                 case MSR_IA32_RTIT_OUTPUT_MASK:
6321                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6322                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6323                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6324                                 continue;
6325                         break;
6326                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6327                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6328                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6329                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6330                                 continue;
6331                         break;
6332                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6333                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6334                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6335                                 continue;
6336                         break;
6337                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6338                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6339                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6340                                 continue;
6341                         break;
6342                 default:
6343                         break;
6344                 }
6345
6346                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6347         }
6348
6349         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6350                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6351                         continue;
6352
6353                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6354         }
6355
6356         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6357                 struct kvm_msr_entry msr;
6358
6359                 msr.index = msr_based_features_all[i];
6360                 if (kvm_get_msr_feature(&msr))
6361                         continue;
6362
6363                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6364         }
6365 }
6366
6367 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6368                            const void *v)
6369 {
6370         int handled = 0;
6371         int n;
6372
6373         do {
6374                 n = min(len, 8);
6375                 if (!(lapic_in_kernel(vcpu) &&
6376                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6377                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6378                         break;
6379                 handled += n;
6380                 addr += n;
6381                 len -= n;
6382                 v += n;
6383         } while (len);
6384
6385         return handled;
6386 }
6387
6388 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6389 {
6390         int handled = 0;
6391         int n;
6392
6393         do {
6394                 n = min(len, 8);
6395                 if (!(lapic_in_kernel(vcpu) &&
6396                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6397                                          addr, n, v))
6398                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6399                         break;
6400                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6401                 handled += n;
6402                 addr += n;
6403                 len -= n;
6404                 v += n;
6405         } while (len);
6406
6407         return handled;
6408 }
6409
6410 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6411                         struct kvm_segment *var, int seg)
6412 {
6413         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6414 }
6415
6416 void kvm_get_segment(struct kvm_vcpu *vcpu,
6417                      struct kvm_segment *var, int seg)
6418 {
6419         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6420 }
6421
6422 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6423                            struct x86_exception *exception)
6424 {
6425         gpa_t t_gpa;
6426
6427         BUG_ON(!mmu_is_nested(vcpu));
6428
6429         /* NPT walks are always user-walks */
6430         access |= PFERR_USER_MASK;
6431         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6432
6433         return t_gpa;
6434 }
6435
6436 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6437                               struct x86_exception *exception)
6438 {
6439         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6440         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6441 }
6442 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6443
6444  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6445                                 struct x86_exception *exception)
6446 {
6447         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6448         access |= PFERR_FETCH_MASK;
6449         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6450 }
6451
6452 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6453                                struct x86_exception *exception)
6454 {
6455         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6456         access |= PFERR_WRITE_MASK;
6457         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6458 }
6459 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6460
6461 /* uses this to access any guest's mapped memory without checking CPL */
6462 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6463                                 struct x86_exception *exception)
6464 {
6465         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6466 }
6467
6468 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6469                                       struct kvm_vcpu *vcpu, u32 access,
6470                                       struct x86_exception *exception)
6471 {
6472         void *data = val;
6473         int r = X86EMUL_CONTINUE;
6474
6475         while (bytes) {
6476                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6477                                                             exception);
6478                 unsigned offset = addr & (PAGE_SIZE-1);
6479                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6480                 int ret;
6481
6482                 if (gpa == UNMAPPED_GVA)
6483                         return X86EMUL_PROPAGATE_FAULT;
6484                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6485                                                offset, toread);
6486                 if (ret < 0) {
6487                         r = X86EMUL_IO_NEEDED;
6488                         goto out;
6489                 }
6490
6491                 bytes -= toread;
6492                 data += toread;
6493                 addr += toread;
6494         }
6495 out:
6496         return r;
6497 }
6498
6499 /* used for instruction fetching */
6500 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6501                                 gva_t addr, void *val, unsigned int bytes,
6502                                 struct x86_exception *exception)
6503 {
6504         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6505         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6506         unsigned offset;
6507         int ret;
6508
6509         /* Inline kvm_read_guest_virt_helper for speed.  */
6510         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6511                                                     exception);
6512         if (unlikely(gpa == UNMAPPED_GVA))
6513                 return X86EMUL_PROPAGATE_FAULT;
6514
6515         offset = addr & (PAGE_SIZE-1);
6516         if (WARN_ON(offset + bytes > PAGE_SIZE))
6517                 bytes = (unsigned)PAGE_SIZE - offset;
6518         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6519                                        offset, bytes);
6520         if (unlikely(ret < 0))
6521                 return X86EMUL_IO_NEEDED;
6522
6523         return X86EMUL_CONTINUE;
6524 }
6525
6526 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6527                                gva_t addr, void *val, unsigned int bytes,
6528                                struct x86_exception *exception)
6529 {
6530         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6531
6532         /*
6533          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6534          * is returned, but our callers are not ready for that and they blindly
6535          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6536          * uninitialized kernel stack memory into cr2 and error code.
6537          */
6538         memset(exception, 0, sizeof(*exception));
6539         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6540                                           exception);
6541 }
6542 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6543
6544 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6545                              gva_t addr, void *val, unsigned int bytes,
6546                              struct x86_exception *exception, bool system)
6547 {
6548         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6549         u32 access = 0;
6550
6551         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6552                 access |= PFERR_USER_MASK;
6553
6554         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6555 }
6556
6557 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6558                 unsigned long addr, void *val, unsigned int bytes)
6559 {
6560         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6561         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6562
6563         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6564 }
6565
6566 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6567                                       struct kvm_vcpu *vcpu, u32 access,
6568                                       struct x86_exception *exception)
6569 {
6570         void *data = val;
6571         int r = X86EMUL_CONTINUE;
6572
6573         while (bytes) {
6574                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6575                                                              access,
6576                                                              exception);
6577                 unsigned offset = addr & (PAGE_SIZE-1);
6578                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6579                 int ret;
6580
6581                 if (gpa == UNMAPPED_GVA)
6582                         return X86EMUL_PROPAGATE_FAULT;
6583                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6584                 if (ret < 0) {
6585                         r = X86EMUL_IO_NEEDED;
6586                         goto out;
6587                 }
6588
6589                 bytes -= towrite;
6590                 data += towrite;
6591                 addr += towrite;
6592         }
6593 out:
6594         return r;
6595 }
6596
6597 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6598                               unsigned int bytes, struct x86_exception *exception,
6599                               bool system)
6600 {
6601         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6602         u32 access = PFERR_WRITE_MASK;
6603
6604         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6605                 access |= PFERR_USER_MASK;
6606
6607         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6608                                            access, exception);
6609 }
6610
6611 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6612                                 unsigned int bytes, struct x86_exception *exception)
6613 {
6614         /* kvm_write_guest_virt_system can pull in tons of pages. */
6615         vcpu->arch.l1tf_flush_l1d = true;
6616
6617         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6618                                            PFERR_WRITE_MASK, exception);
6619 }
6620 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6621
6622 int handle_ud(struct kvm_vcpu *vcpu)
6623 {
6624         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6625         int emul_type = EMULTYPE_TRAP_UD;
6626         char sig[5]; /* ud2; .ascii "kvm" */
6627         struct x86_exception e;
6628
6629         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6630                 return 1;
6631
6632         if (force_emulation_prefix &&
6633             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6634                                 sig, sizeof(sig), &e) == 0 &&
6635             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6636                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6637                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6638         }
6639
6640         return kvm_emulate_instruction(vcpu, emul_type);
6641 }
6642 EXPORT_SYMBOL_GPL(handle_ud);
6643
6644 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6645                             gpa_t gpa, bool write)
6646 {
6647         /* For APIC access vmexit */
6648         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6649                 return 1;
6650
6651         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6652                 trace_vcpu_match_mmio(gva, gpa, write, true);
6653                 return 1;
6654         }
6655
6656         return 0;
6657 }
6658
6659 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6660                                 gpa_t *gpa, struct x86_exception *exception,
6661                                 bool write)
6662 {
6663         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6664                 | (write ? PFERR_WRITE_MASK : 0);
6665
6666         /*
6667          * currently PKRU is only applied to ept enabled guest so
6668          * there is no pkey in EPT page table for L1 guest or EPT
6669          * shadow page table for L2 guest.
6670          */
6671         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6672             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6673                               vcpu->arch.mmio_access, 0, access))) {
6674                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6675                                         (gva & (PAGE_SIZE - 1));
6676                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6677                 return 1;
6678         }
6679
6680         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6681
6682         if (*gpa == UNMAPPED_GVA)
6683                 return -1;
6684
6685         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6686 }
6687
6688 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6689                         const void *val, int bytes)
6690 {
6691         int ret;
6692
6693         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6694         if (ret < 0)
6695                 return 0;
6696         kvm_page_track_write(vcpu, gpa, val, bytes);
6697         return 1;
6698 }
6699
6700 struct read_write_emulator_ops {
6701         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6702                                   int bytes);
6703         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6704                                   void *val, int bytes);
6705         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6706                                int bytes, void *val);
6707         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6708                                     void *val, int bytes);
6709         bool write;
6710 };
6711
6712 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6713 {
6714         if (vcpu->mmio_read_completed) {
6715                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6716                                vcpu->mmio_fragments[0].gpa, val);
6717                 vcpu->mmio_read_completed = 0;
6718                 return 1;
6719         }
6720
6721         return 0;
6722 }
6723
6724 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6725                         void *val, int bytes)
6726 {
6727         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6728 }
6729
6730 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6731                          void *val, int bytes)
6732 {
6733         return emulator_write_phys(vcpu, gpa, val, bytes);
6734 }
6735
6736 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6737 {
6738         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6739         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6740 }
6741
6742 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6743                           void *val, int bytes)
6744 {
6745         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6746         return X86EMUL_IO_NEEDED;
6747 }
6748
6749 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6750                            void *val, int bytes)
6751 {
6752         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6753
6754         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6755         return X86EMUL_CONTINUE;
6756 }
6757
6758 static const struct read_write_emulator_ops read_emultor = {
6759         .read_write_prepare = read_prepare,
6760         .read_write_emulate = read_emulate,
6761         .read_write_mmio = vcpu_mmio_read,
6762         .read_write_exit_mmio = read_exit_mmio,
6763 };
6764
6765 static const struct read_write_emulator_ops write_emultor = {
6766         .read_write_emulate = write_emulate,
6767         .read_write_mmio = write_mmio,
6768         .read_write_exit_mmio = write_exit_mmio,
6769         .write = true,
6770 };
6771
6772 static int emulator_read_write_onepage(unsigned long addr, void *val,
6773                                        unsigned int bytes,
6774                                        struct x86_exception *exception,
6775                                        struct kvm_vcpu *vcpu,
6776                                        const struct read_write_emulator_ops *ops)
6777 {
6778         gpa_t gpa;
6779         int handled, ret;
6780         bool write = ops->write;
6781         struct kvm_mmio_fragment *frag;
6782         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6783
6784         /*
6785          * If the exit was due to a NPF we may already have a GPA.
6786          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6787          * Note, this cannot be used on string operations since string
6788          * operation using rep will only have the initial GPA from the NPF
6789          * occurred.
6790          */
6791         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6792             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6793                 gpa = ctxt->gpa_val;
6794                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6795         } else {
6796                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6797                 if (ret < 0)
6798                         return X86EMUL_PROPAGATE_FAULT;
6799         }
6800
6801         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6802                 return X86EMUL_CONTINUE;
6803
6804         /*
6805          * Is this MMIO handled locally?
6806          */
6807         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6808         if (handled == bytes)
6809                 return X86EMUL_CONTINUE;
6810
6811         gpa += handled;
6812         bytes -= handled;
6813         val += handled;
6814
6815         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6816         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6817         frag->gpa = gpa;
6818         frag->data = val;
6819         frag->len = bytes;
6820         return X86EMUL_CONTINUE;
6821 }
6822
6823 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6824                         unsigned long addr,
6825                         void *val, unsigned int bytes,
6826                         struct x86_exception *exception,
6827                         const struct read_write_emulator_ops *ops)
6828 {
6829         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6830         gpa_t gpa;
6831         int rc;
6832
6833         if (ops->read_write_prepare &&
6834                   ops->read_write_prepare(vcpu, val, bytes))
6835                 return X86EMUL_CONTINUE;
6836
6837         vcpu->mmio_nr_fragments = 0;
6838
6839         /* Crossing a page boundary? */
6840         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6841                 int now;
6842
6843                 now = -addr & ~PAGE_MASK;
6844                 rc = emulator_read_write_onepage(addr, val, now, exception,
6845                                                  vcpu, ops);
6846
6847                 if (rc != X86EMUL_CONTINUE)
6848                         return rc;
6849                 addr += now;
6850                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6851                         addr = (u32)addr;
6852                 val += now;
6853                 bytes -= now;
6854         }
6855
6856         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6857                                          vcpu, ops);
6858         if (rc != X86EMUL_CONTINUE)
6859                 return rc;
6860
6861         if (!vcpu->mmio_nr_fragments)
6862                 return rc;
6863
6864         gpa = vcpu->mmio_fragments[0].gpa;
6865
6866         vcpu->mmio_needed = 1;
6867         vcpu->mmio_cur_fragment = 0;
6868
6869         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6870         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6871         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6872         vcpu->run->mmio.phys_addr = gpa;
6873
6874         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6875 }
6876
6877 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6878                                   unsigned long addr,
6879                                   void *val,
6880                                   unsigned int bytes,
6881                                   struct x86_exception *exception)
6882 {
6883         return emulator_read_write(ctxt, addr, val, bytes,
6884                                    exception, &read_emultor);
6885 }
6886
6887 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6888                             unsigned long addr,
6889                             const void *val,
6890                             unsigned int bytes,
6891                             struct x86_exception *exception)
6892 {
6893         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6894                                    exception, &write_emultor);
6895 }
6896
6897 #define CMPXCHG_TYPE(t, ptr, old, new) \
6898         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6899
6900 #ifdef CONFIG_X86_64
6901 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6902 #else
6903 #  define CMPXCHG64(ptr, old, new) \
6904         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6905 #endif
6906
6907 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6908                                      unsigned long addr,
6909                                      const void *old,
6910                                      const void *new,
6911                                      unsigned int bytes,
6912                                      struct x86_exception *exception)
6913 {
6914         struct kvm_host_map map;
6915         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6916         u64 page_line_mask;
6917         gpa_t gpa;
6918         char *kaddr;
6919         bool exchanged;
6920
6921         /* guests cmpxchg8b have to be emulated atomically */
6922         if (bytes > 8 || (bytes & (bytes - 1)))
6923                 goto emul_write;
6924
6925         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6926
6927         if (gpa == UNMAPPED_GVA ||
6928             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6929                 goto emul_write;
6930
6931         /*
6932          * Emulate the atomic as a straight write to avoid #AC if SLD is
6933          * enabled in the host and the access splits a cache line.
6934          */
6935         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6936                 page_line_mask = ~(cache_line_size() - 1);
6937         else
6938                 page_line_mask = PAGE_MASK;
6939
6940         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6941                 goto emul_write;
6942
6943         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6944                 goto emul_write;
6945
6946         kaddr = map.hva + offset_in_page(gpa);
6947
6948         switch (bytes) {
6949         case 1:
6950                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6951                 break;
6952         case 2:
6953                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6954                 break;
6955         case 4:
6956                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6957                 break;
6958         case 8:
6959                 exchanged = CMPXCHG64(kaddr, old, new);
6960                 break;
6961         default:
6962                 BUG();
6963         }
6964
6965         kvm_vcpu_unmap(vcpu, &map, true);
6966
6967         if (!exchanged)
6968                 return X86EMUL_CMPXCHG_FAILED;
6969
6970         kvm_page_track_write(vcpu, gpa, new, bytes);
6971
6972         return X86EMUL_CONTINUE;
6973
6974 emul_write:
6975         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6976
6977         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6978 }
6979
6980 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6981 {
6982         int r = 0, i;
6983
6984         for (i = 0; i < vcpu->arch.pio.count; i++) {
6985                 if (vcpu->arch.pio.in)
6986                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6987                                             vcpu->arch.pio.size, pd);
6988                 else
6989                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6990                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6991                                              pd);
6992                 if (r)
6993                         break;
6994                 pd += vcpu->arch.pio.size;
6995         }
6996         return r;
6997 }
6998
6999 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7000                                unsigned short port,
7001                                unsigned int count, bool in)
7002 {
7003         vcpu->arch.pio.port = port;
7004         vcpu->arch.pio.in = in;
7005         vcpu->arch.pio.count  = count;
7006         vcpu->arch.pio.size = size;
7007
7008         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7009                 return 1;
7010
7011         vcpu->run->exit_reason = KVM_EXIT_IO;
7012         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7013         vcpu->run->io.size = size;
7014         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7015         vcpu->run->io.count = count;
7016         vcpu->run->io.port = port;
7017
7018         return 0;
7019 }
7020
7021 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7022                              unsigned short port, unsigned int count)
7023 {
7024         WARN_ON(vcpu->arch.pio.count);
7025         memset(vcpu->arch.pio_data, 0, size * count);
7026         return emulator_pio_in_out(vcpu, size, port, count, true);
7027 }
7028
7029 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7030 {
7031         int size = vcpu->arch.pio.size;
7032         unsigned count = vcpu->arch.pio.count;
7033         memcpy(val, vcpu->arch.pio_data, size * count);
7034         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7035         vcpu->arch.pio.count = 0;
7036 }
7037
7038 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7039                            unsigned short port, void *val, unsigned int count)
7040 {
7041         if (vcpu->arch.pio.count) {
7042                 /*
7043                  * Complete a previous iteration that required userspace I/O.
7044                  * Note, @count isn't guaranteed to match pio.count as userspace
7045                  * can modify ECX before rerunning the vCPU.  Ignore any such
7046                  * shenanigans as KVM doesn't support modifying the rep count,
7047                  * and the emulator ensures @count doesn't overflow the buffer.
7048                  */
7049         } else {
7050                 int r = __emulator_pio_in(vcpu, size, port, count);
7051                 if (!r)
7052                         return r;
7053
7054                 /* Results already available, fall through.  */
7055         }
7056
7057         complete_emulator_pio_in(vcpu, val);
7058         return 1;
7059 }
7060
7061 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7062                                     int size, unsigned short port, void *val,
7063                                     unsigned int count)
7064 {
7065         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7066
7067 }
7068
7069 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7070                             unsigned short port, const void *val,
7071                             unsigned int count)
7072 {
7073         int ret;
7074
7075         memcpy(vcpu->arch.pio_data, val, size * count);
7076         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7077         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7078         if (ret)
7079                 vcpu->arch.pio.count = 0;
7080
7081         return ret;
7082 }
7083
7084 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7085                                      int size, unsigned short port,
7086                                      const void *val, unsigned int count)
7087 {
7088         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7089 }
7090
7091 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7092 {
7093         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7094 }
7095
7096 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7097 {
7098         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7099 }
7100
7101 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7102 {
7103         if (!need_emulate_wbinvd(vcpu))
7104                 return X86EMUL_CONTINUE;
7105
7106         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7107                 int cpu = get_cpu();
7108
7109                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7110                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7111                                 wbinvd_ipi, NULL, 1);
7112                 put_cpu();
7113                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7114         } else
7115                 wbinvd();
7116         return X86EMUL_CONTINUE;
7117 }
7118
7119 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7120 {
7121         kvm_emulate_wbinvd_noskip(vcpu);
7122         return kvm_skip_emulated_instruction(vcpu);
7123 }
7124 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7125
7126
7127
7128 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7129 {
7130         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7131 }
7132
7133 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7134                             unsigned long *dest)
7135 {
7136         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7137 }
7138
7139 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7140                            unsigned long value)
7141 {
7142
7143         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7144 }
7145
7146 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7147 {
7148         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7149 }
7150
7151 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7152 {
7153         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7154         unsigned long value;
7155
7156         switch (cr) {
7157         case 0:
7158                 value = kvm_read_cr0(vcpu);
7159                 break;
7160         case 2:
7161                 value = vcpu->arch.cr2;
7162                 break;
7163         case 3:
7164                 value = kvm_read_cr3(vcpu);
7165                 break;
7166         case 4:
7167                 value = kvm_read_cr4(vcpu);
7168                 break;
7169         case 8:
7170                 value = kvm_get_cr8(vcpu);
7171                 break;
7172         default:
7173                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7174                 return 0;
7175         }
7176
7177         return value;
7178 }
7179
7180 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7181 {
7182         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7183         int res = 0;
7184
7185         switch (cr) {
7186         case 0:
7187                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7188                 break;
7189         case 2:
7190                 vcpu->arch.cr2 = val;
7191                 break;
7192         case 3:
7193                 res = kvm_set_cr3(vcpu, val);
7194                 break;
7195         case 4:
7196                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7197                 break;
7198         case 8:
7199                 res = kvm_set_cr8(vcpu, val);
7200                 break;
7201         default:
7202                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7203                 res = -1;
7204         }
7205
7206         return res;
7207 }
7208
7209 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7210 {
7211         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7212 }
7213
7214 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7215 {
7216         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7217 }
7218
7219 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7220 {
7221         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7222 }
7223
7224 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7225 {
7226         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7227 }
7228
7229 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7230 {
7231         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7232 }
7233
7234 static unsigned long emulator_get_cached_segment_base(
7235         struct x86_emulate_ctxt *ctxt, int seg)
7236 {
7237         return get_segment_base(emul_to_vcpu(ctxt), seg);
7238 }
7239
7240 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7241                                  struct desc_struct *desc, u32 *base3,
7242                                  int seg)
7243 {
7244         struct kvm_segment var;
7245
7246         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7247         *selector = var.selector;
7248
7249         if (var.unusable) {
7250                 memset(desc, 0, sizeof(*desc));
7251                 if (base3)
7252                         *base3 = 0;
7253                 return false;
7254         }
7255
7256         if (var.g)
7257                 var.limit >>= 12;
7258         set_desc_limit(desc, var.limit);
7259         set_desc_base(desc, (unsigned long)var.base);
7260 #ifdef CONFIG_X86_64
7261         if (base3)
7262                 *base3 = var.base >> 32;
7263 #endif
7264         desc->type = var.type;
7265         desc->s = var.s;
7266         desc->dpl = var.dpl;
7267         desc->p = var.present;
7268         desc->avl = var.avl;
7269         desc->l = var.l;
7270         desc->d = var.db;
7271         desc->g = var.g;
7272
7273         return true;
7274 }
7275
7276 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7277                                  struct desc_struct *desc, u32 base3,
7278                                  int seg)
7279 {
7280         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7281         struct kvm_segment var;
7282
7283         var.selector = selector;
7284         var.base = get_desc_base(desc);
7285 #ifdef CONFIG_X86_64
7286         var.base |= ((u64)base3) << 32;
7287 #endif
7288         var.limit = get_desc_limit(desc);
7289         if (desc->g)
7290                 var.limit = (var.limit << 12) | 0xfff;
7291         var.type = desc->type;
7292         var.dpl = desc->dpl;
7293         var.db = desc->d;
7294         var.s = desc->s;
7295         var.l = desc->l;
7296         var.g = desc->g;
7297         var.avl = desc->avl;
7298         var.present = desc->p;
7299         var.unusable = !var.present;
7300         var.padding = 0;
7301
7302         kvm_set_segment(vcpu, &var, seg);
7303         return;
7304 }
7305
7306 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7307                             u32 msr_index, u64 *pdata)
7308 {
7309         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7310         int r;
7311
7312         r = kvm_get_msr(vcpu, msr_index, pdata);
7313
7314         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7315                 /* Bounce to user space */
7316                 return X86EMUL_IO_NEEDED;
7317         }
7318
7319         return r;
7320 }
7321
7322 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7323                             u32 msr_index, u64 data)
7324 {
7325         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7326         int r;
7327
7328         r = kvm_set_msr(vcpu, msr_index, data);
7329
7330         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7331                 /* Bounce to user space */
7332                 return X86EMUL_IO_NEEDED;
7333         }
7334
7335         return r;
7336 }
7337
7338 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7339 {
7340         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7341
7342         return vcpu->arch.smbase;
7343 }
7344
7345 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7346 {
7347         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7348
7349         vcpu->arch.smbase = smbase;
7350 }
7351
7352 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7353                               u32 pmc)
7354 {
7355         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7356 }
7357
7358 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7359                              u32 pmc, u64 *pdata)
7360 {
7361         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7362 }
7363
7364 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7365 {
7366         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7367 }
7368
7369 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7370                               struct x86_instruction_info *info,
7371                               enum x86_intercept_stage stage)
7372 {
7373         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7374                                             &ctxt->exception);
7375 }
7376
7377 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7378                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7379                               bool exact_only)
7380 {
7381         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7382 }
7383
7384 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7385 {
7386         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7387 }
7388
7389 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7390 {
7391         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7392 }
7393
7394 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7395 {
7396         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7397 }
7398
7399 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7400 {
7401         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7402 }
7403
7404 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7405 {
7406         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7407 }
7408
7409 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7410 {
7411         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7412 }
7413
7414 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7415 {
7416         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7417 }
7418
7419 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7420 {
7421         return emul_to_vcpu(ctxt)->arch.hflags;
7422 }
7423
7424 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7425 {
7426         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7427
7428         kvm_smm_changed(vcpu, false);
7429 }
7430
7431 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7432                                   const char *smstate)
7433 {
7434         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7435 }
7436
7437 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7438 {
7439         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7440 }
7441
7442 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7443 {
7444         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7445 }
7446
7447 static const struct x86_emulate_ops emulate_ops = {
7448         .read_gpr            = emulator_read_gpr,
7449         .write_gpr           = emulator_write_gpr,
7450         .read_std            = emulator_read_std,
7451         .write_std           = emulator_write_std,
7452         .read_phys           = kvm_read_guest_phys_system,
7453         .fetch               = kvm_fetch_guest_virt,
7454         .read_emulated       = emulator_read_emulated,
7455         .write_emulated      = emulator_write_emulated,
7456         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7457         .invlpg              = emulator_invlpg,
7458         .pio_in_emulated     = emulator_pio_in_emulated,
7459         .pio_out_emulated    = emulator_pio_out_emulated,
7460         .get_segment         = emulator_get_segment,
7461         .set_segment         = emulator_set_segment,
7462         .get_cached_segment_base = emulator_get_cached_segment_base,
7463         .get_gdt             = emulator_get_gdt,
7464         .get_idt             = emulator_get_idt,
7465         .set_gdt             = emulator_set_gdt,
7466         .set_idt             = emulator_set_idt,
7467         .get_cr              = emulator_get_cr,
7468         .set_cr              = emulator_set_cr,
7469         .cpl                 = emulator_get_cpl,
7470         .get_dr              = emulator_get_dr,
7471         .set_dr              = emulator_set_dr,
7472         .get_smbase          = emulator_get_smbase,
7473         .set_smbase          = emulator_set_smbase,
7474         .set_msr             = emulator_set_msr,
7475         .get_msr             = emulator_get_msr,
7476         .check_pmc           = emulator_check_pmc,
7477         .read_pmc            = emulator_read_pmc,
7478         .halt                = emulator_halt,
7479         .wbinvd              = emulator_wbinvd,
7480         .fix_hypercall       = emulator_fix_hypercall,
7481         .intercept           = emulator_intercept,
7482         .get_cpuid           = emulator_get_cpuid,
7483         .guest_has_long_mode = emulator_guest_has_long_mode,
7484         .guest_has_movbe     = emulator_guest_has_movbe,
7485         .guest_has_fxsr      = emulator_guest_has_fxsr,
7486         .guest_has_rdpid     = emulator_guest_has_rdpid,
7487         .set_nmi_mask        = emulator_set_nmi_mask,
7488         .get_hflags          = emulator_get_hflags,
7489         .exiting_smm         = emulator_exiting_smm,
7490         .leave_smm           = emulator_leave_smm,
7491         .triple_fault        = emulator_triple_fault,
7492         .set_xcr             = emulator_set_xcr,
7493 };
7494
7495 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7496 {
7497         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7498         /*
7499          * an sti; sti; sequence only disable interrupts for the first
7500          * instruction. So, if the last instruction, be it emulated or
7501          * not, left the system with the INT_STI flag enabled, it
7502          * means that the last instruction is an sti. We should not
7503          * leave the flag on in this case. The same goes for mov ss
7504          */
7505         if (int_shadow & mask)
7506                 mask = 0;
7507         if (unlikely(int_shadow || mask)) {
7508                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7509                 if (!mask)
7510                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7511         }
7512 }
7513
7514 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7515 {
7516         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7517         if (ctxt->exception.vector == PF_VECTOR)
7518                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7519
7520         if (ctxt->exception.error_code_valid)
7521                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7522                                       ctxt->exception.error_code);
7523         else
7524                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7525         return false;
7526 }
7527
7528 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7529 {
7530         struct x86_emulate_ctxt *ctxt;
7531
7532         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7533         if (!ctxt) {
7534                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7535                 return NULL;
7536         }
7537
7538         ctxt->vcpu = vcpu;
7539         ctxt->ops = &emulate_ops;
7540         vcpu->arch.emulate_ctxt = ctxt;
7541
7542         return ctxt;
7543 }
7544
7545 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7546 {
7547         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7548         int cs_db, cs_l;
7549
7550         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7551
7552         ctxt->gpa_available = false;
7553         ctxt->eflags = kvm_get_rflags(vcpu);
7554         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7555
7556         ctxt->eip = kvm_rip_read(vcpu);
7557         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7558                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7559                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7560                      cs_db                              ? X86EMUL_MODE_PROT32 :
7561                                                           X86EMUL_MODE_PROT16;
7562         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7563         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7564         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7565
7566         ctxt->interruptibility = 0;
7567         ctxt->have_exception = false;
7568         ctxt->exception.vector = -1;
7569         ctxt->perm_ok = false;
7570
7571         init_decode_cache(ctxt);
7572         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7573 }
7574
7575 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7576 {
7577         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7578         int ret;
7579
7580         init_emulate_ctxt(vcpu);
7581
7582         ctxt->op_bytes = 2;
7583         ctxt->ad_bytes = 2;
7584         ctxt->_eip = ctxt->eip + inc_eip;
7585         ret = emulate_int_real(ctxt, irq);
7586
7587         if (ret != X86EMUL_CONTINUE) {
7588                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7589         } else {
7590                 ctxt->eip = ctxt->_eip;
7591                 kvm_rip_write(vcpu, ctxt->eip);
7592                 kvm_set_rflags(vcpu, ctxt->eflags);
7593         }
7594 }
7595 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7596
7597 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7598 {
7599         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7600         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7601         struct kvm_run *run = vcpu->run;
7602
7603         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7604         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7605         run->emulation_failure.ndata = 0;
7606         run->emulation_failure.flags = 0;
7607
7608         if (insn_size) {
7609                 run->emulation_failure.ndata = 3;
7610                 run->emulation_failure.flags |=
7611                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7612                 run->emulation_failure.insn_size = insn_size;
7613                 memset(run->emulation_failure.insn_bytes, 0x90,
7614                        sizeof(run->emulation_failure.insn_bytes));
7615                 memcpy(run->emulation_failure.insn_bytes,
7616                        ctxt->fetch.data, insn_size);
7617         }
7618 }
7619
7620 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7621 {
7622         struct kvm *kvm = vcpu->kvm;
7623
7624         ++vcpu->stat.insn_emulation_fail;
7625         trace_kvm_emulate_insn_failed(vcpu);
7626
7627         if (emulation_type & EMULTYPE_VMWARE_GP) {
7628                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7629                 return 1;
7630         }
7631
7632         if (kvm->arch.exit_on_emulation_error ||
7633             (emulation_type & EMULTYPE_SKIP)) {
7634                 prepare_emulation_failure_exit(vcpu);
7635                 return 0;
7636         }
7637
7638         kvm_queue_exception(vcpu, UD_VECTOR);
7639
7640         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7641                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7642                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7643                 vcpu->run->internal.ndata = 0;
7644                 return 0;
7645         }
7646
7647         return 1;
7648 }
7649
7650 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7651                                   bool write_fault_to_shadow_pgtable,
7652                                   int emulation_type)
7653 {
7654         gpa_t gpa = cr2_or_gpa;
7655         kvm_pfn_t pfn;
7656
7657         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7658                 return false;
7659
7660         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7661             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7662                 return false;
7663
7664         if (!vcpu->arch.mmu->direct_map) {
7665                 /*
7666                  * Write permission should be allowed since only
7667                  * write access need to be emulated.
7668                  */
7669                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7670
7671                 /*
7672                  * If the mapping is invalid in guest, let cpu retry
7673                  * it to generate fault.
7674                  */
7675                 if (gpa == UNMAPPED_GVA)
7676                         return true;
7677         }
7678
7679         /*
7680          * Do not retry the unhandleable instruction if it faults on the
7681          * readonly host memory, otherwise it will goto a infinite loop:
7682          * retry instruction -> write #PF -> emulation fail -> retry
7683          * instruction -> ...
7684          */
7685         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7686
7687         /*
7688          * If the instruction failed on the error pfn, it can not be fixed,
7689          * report the error to userspace.
7690          */
7691         if (is_error_noslot_pfn(pfn))
7692                 return false;
7693
7694         kvm_release_pfn_clean(pfn);
7695
7696         /* The instructions are well-emulated on direct mmu. */
7697         if (vcpu->arch.mmu->direct_map) {
7698                 unsigned int indirect_shadow_pages;
7699
7700                 write_lock(&vcpu->kvm->mmu_lock);
7701                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7702                 write_unlock(&vcpu->kvm->mmu_lock);
7703
7704                 if (indirect_shadow_pages)
7705                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7706
7707                 return true;
7708         }
7709
7710         /*
7711          * if emulation was due to access to shadowed page table
7712          * and it failed try to unshadow page and re-enter the
7713          * guest to let CPU execute the instruction.
7714          */
7715         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7716
7717         /*
7718          * If the access faults on its page table, it can not
7719          * be fixed by unprotecting shadow page and it should
7720          * be reported to userspace.
7721          */
7722         return !write_fault_to_shadow_pgtable;
7723 }
7724
7725 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7726                               gpa_t cr2_or_gpa,  int emulation_type)
7727 {
7728         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7729         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7730
7731         last_retry_eip = vcpu->arch.last_retry_eip;
7732         last_retry_addr = vcpu->arch.last_retry_addr;
7733
7734         /*
7735          * If the emulation is caused by #PF and it is non-page_table
7736          * writing instruction, it means the VM-EXIT is caused by shadow
7737          * page protected, we can zap the shadow page and retry this
7738          * instruction directly.
7739          *
7740          * Note: if the guest uses a non-page-table modifying instruction
7741          * on the PDE that points to the instruction, then we will unmap
7742          * the instruction and go to an infinite loop. So, we cache the
7743          * last retried eip and the last fault address, if we meet the eip
7744          * and the address again, we can break out of the potential infinite
7745          * loop.
7746          */
7747         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7748
7749         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7750                 return false;
7751
7752         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7753             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7754                 return false;
7755
7756         if (x86_page_table_writing_insn(ctxt))
7757                 return false;
7758
7759         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7760                 return false;
7761
7762         vcpu->arch.last_retry_eip = ctxt->eip;
7763         vcpu->arch.last_retry_addr = cr2_or_gpa;
7764
7765         if (!vcpu->arch.mmu->direct_map)
7766                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7767
7768         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7769
7770         return true;
7771 }
7772
7773 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7774 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7775
7776 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7777 {
7778         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7779
7780         if (entering_smm) {
7781                 vcpu->arch.hflags |= HF_SMM_MASK;
7782         } else {
7783                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7784
7785                 /* Process a latched INIT or SMI, if any.  */
7786                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7787
7788                 /*
7789                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7790                  * on SMM exit we still need to reload them from
7791                  * guest memory
7792                  */
7793                 vcpu->arch.pdptrs_from_userspace = false;
7794         }
7795
7796         kvm_mmu_reset_context(vcpu);
7797 }
7798
7799 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7800                                 unsigned long *db)
7801 {
7802         u32 dr6 = 0;
7803         int i;
7804         u32 enable, rwlen;
7805
7806         enable = dr7;
7807         rwlen = dr7 >> 16;
7808         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7809                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7810                         dr6 |= (1 << i);
7811         return dr6;
7812 }
7813
7814 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7815 {
7816         struct kvm_run *kvm_run = vcpu->run;
7817
7818         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7819                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7820                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7821                 kvm_run->debug.arch.exception = DB_VECTOR;
7822                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7823                 return 0;
7824         }
7825         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7826         return 1;
7827 }
7828
7829 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7830 {
7831         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7832         int r;
7833
7834         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7835         if (unlikely(!r))
7836                 return 0;
7837
7838         /*
7839          * rflags is the old, "raw" value of the flags.  The new value has
7840          * not been saved yet.
7841          *
7842          * This is correct even for TF set by the guest, because "the
7843          * processor will not generate this exception after the instruction
7844          * that sets the TF flag".
7845          */
7846         if (unlikely(rflags & X86_EFLAGS_TF))
7847                 r = kvm_vcpu_do_singlestep(vcpu);
7848         return r;
7849 }
7850 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7851
7852 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
7853 {
7854         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7855             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7856                 struct kvm_run *kvm_run = vcpu->run;
7857                 unsigned long eip = kvm_get_linear_rip(vcpu);
7858                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7859                                            vcpu->arch.guest_debug_dr7,
7860                                            vcpu->arch.eff_db);
7861
7862                 if (dr6 != 0) {
7863                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7864                         kvm_run->debug.arch.pc = eip;
7865                         kvm_run->debug.arch.exception = DB_VECTOR;
7866                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7867                         *r = 0;
7868                         return true;
7869                 }
7870         }
7871
7872         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7873             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7874                 unsigned long eip = kvm_get_linear_rip(vcpu);
7875                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7876                                            vcpu->arch.dr7,
7877                                            vcpu->arch.db);
7878
7879                 if (dr6 != 0) {
7880                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7881                         *r = 1;
7882                         return true;
7883                 }
7884         }
7885
7886         return false;
7887 }
7888
7889 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7890 {
7891         switch (ctxt->opcode_len) {
7892         case 1:
7893                 switch (ctxt->b) {
7894                 case 0xe4:      /* IN */
7895                 case 0xe5:
7896                 case 0xec:
7897                 case 0xed:
7898                 case 0xe6:      /* OUT */
7899                 case 0xe7:
7900                 case 0xee:
7901                 case 0xef:
7902                 case 0x6c:      /* INS */
7903                 case 0x6d:
7904                 case 0x6e:      /* OUTS */
7905                 case 0x6f:
7906                         return true;
7907                 }
7908                 break;
7909         case 2:
7910                 switch (ctxt->b) {
7911                 case 0x33:      /* RDPMC */
7912                         return true;
7913                 }
7914                 break;
7915         }
7916
7917         return false;
7918 }
7919
7920 /*
7921  * Decode an instruction for emulation.  The caller is responsible for handling
7922  * code breakpoints.  Note, manually detecting code breakpoints is unnecessary
7923  * (and wrong) when emulating on an intercepted fault-like exception[*], as
7924  * code breakpoints have higher priority and thus have already been done by
7925  * hardware.
7926  *
7927  * [*] Except #MC, which is higher priority, but KVM should never emulate in
7928  *     response to a machine check.
7929  */
7930 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7931                                     void *insn, int insn_len)
7932 {
7933         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7934         int r;
7935
7936         init_emulate_ctxt(vcpu);
7937
7938         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7939
7940         trace_kvm_emulate_insn_start(vcpu);
7941         ++vcpu->stat.insn_emulation;
7942
7943         return r;
7944 }
7945 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7946
7947 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7948                             int emulation_type, void *insn, int insn_len)
7949 {
7950         int r;
7951         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7952         bool writeback = true;
7953         bool write_fault_to_spt;
7954
7955         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7956                 return 1;
7957
7958         vcpu->arch.l1tf_flush_l1d = true;
7959
7960         /*
7961          * Clear write_fault_to_shadow_pgtable here to ensure it is
7962          * never reused.
7963          */
7964         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7965         vcpu->arch.write_fault_to_shadow_pgtable = false;
7966
7967         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7968                 kvm_clear_exception_queue(vcpu);
7969
7970                 /*
7971                  * Return immediately if RIP hits a code breakpoint, such #DBs
7972                  * are fault-like and are higher priority than any faults on
7973                  * the code fetch itself.
7974                  */
7975                 if (!(emulation_type & EMULTYPE_SKIP) &&
7976                     kvm_vcpu_check_code_breakpoint(vcpu, &r))
7977                         return r;
7978
7979                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7980                                                     insn, insn_len);
7981                 if (r != EMULATION_OK)  {
7982                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7983                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7984                                 kvm_queue_exception(vcpu, UD_VECTOR);
7985                                 return 1;
7986                         }
7987                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7988                                                   write_fault_to_spt,
7989                                                   emulation_type))
7990                                 return 1;
7991                         if (ctxt->have_exception) {
7992                                 /*
7993                                  * #UD should result in just EMULATION_FAILED, and trap-like
7994                                  * exception should not be encountered during decode.
7995                                  */
7996                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7997                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7998                                 inject_emulated_exception(vcpu);
7999                                 return 1;
8000                         }
8001                         return handle_emulation_failure(vcpu, emulation_type);
8002                 }
8003         }
8004
8005         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8006             !is_vmware_backdoor_opcode(ctxt)) {
8007                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8008                 return 1;
8009         }
8010
8011         /*
8012          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8013          * for kvm_skip_emulated_instruction().  The caller is responsible for
8014          * updating interruptibility state and injecting single-step #DBs.
8015          */
8016         if (emulation_type & EMULTYPE_SKIP) {
8017                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8018                         ctxt->eip = (u32)ctxt->_eip;
8019                 else
8020                         ctxt->eip = ctxt->_eip;
8021
8022                 kvm_rip_write(vcpu, ctxt->eip);
8023                 if (ctxt->eflags & X86_EFLAGS_RF)
8024                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8025                 return 1;
8026         }
8027
8028         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8029                 return 1;
8030
8031         /* this is needed for vmware backdoor interface to work since it
8032            changes registers values  during IO operation */
8033         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8034                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8035                 emulator_invalidate_register_cache(ctxt);
8036         }
8037
8038 restart:
8039         if (emulation_type & EMULTYPE_PF) {
8040                 /* Save the faulting GPA (cr2) in the address field */
8041                 ctxt->exception.address = cr2_or_gpa;
8042
8043                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8044                 if (vcpu->arch.mmu->direct_map) {
8045                         ctxt->gpa_available = true;
8046                         ctxt->gpa_val = cr2_or_gpa;
8047                 }
8048         } else {
8049                 /* Sanitize the address out of an abundance of paranoia. */
8050                 ctxt->exception.address = 0;
8051         }
8052
8053         r = x86_emulate_insn(ctxt);
8054
8055         if (r == EMULATION_INTERCEPTED)
8056                 return 1;
8057
8058         if (r == EMULATION_FAILED) {
8059                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8060                                         emulation_type))
8061                         return 1;
8062
8063                 return handle_emulation_failure(vcpu, emulation_type);
8064         }
8065
8066         if (ctxt->have_exception) {
8067                 r = 1;
8068                 if (inject_emulated_exception(vcpu))
8069                         return r;
8070         } else if (vcpu->arch.pio.count) {
8071                 if (!vcpu->arch.pio.in) {
8072                         /* FIXME: return into emulator if single-stepping.  */
8073                         vcpu->arch.pio.count = 0;
8074                 } else {
8075                         writeback = false;
8076                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8077                 }
8078                 r = 0;
8079         } else if (vcpu->mmio_needed) {
8080                 ++vcpu->stat.mmio_exits;
8081
8082                 if (!vcpu->mmio_is_write)
8083                         writeback = false;
8084                 r = 0;
8085                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8086         } else if (vcpu->arch.complete_userspace_io) {
8087                 writeback = false;
8088                 r = 0;
8089         } else if (r == EMULATION_RESTART)
8090                 goto restart;
8091         else
8092                 r = 1;
8093
8094         if (writeback) {
8095                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8096                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8097                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8098                 if (!ctxt->have_exception ||
8099                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8100                         kvm_rip_write(vcpu, ctxt->eip);
8101                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8102                                 r = kvm_vcpu_do_singlestep(vcpu);
8103                         if (kvm_x86_ops.update_emulated_instruction)
8104                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8105                         __kvm_set_rflags(vcpu, ctxt->eflags);
8106                 }
8107
8108                 /*
8109                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8110                  * do nothing, and it will be requested again as soon as
8111                  * the shadow expires.  But we still need to check here,
8112                  * because POPF has no interrupt shadow.
8113                  */
8114                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8115                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8116         } else
8117                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8118
8119         return r;
8120 }
8121
8122 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8123 {
8124         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8125 }
8126 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8127
8128 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8129                                         void *insn, int insn_len)
8130 {
8131         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8132 }
8133 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8134
8135 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8136 {
8137         vcpu->arch.pio.count = 0;
8138         return 1;
8139 }
8140
8141 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8142 {
8143         vcpu->arch.pio.count = 0;
8144
8145         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8146                 return 1;
8147
8148         return kvm_skip_emulated_instruction(vcpu);
8149 }
8150
8151 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8152                             unsigned short port)
8153 {
8154         unsigned long val = kvm_rax_read(vcpu);
8155         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8156
8157         if (ret)
8158                 return ret;
8159
8160         /*
8161          * Workaround userspace that relies on old KVM behavior of %rip being
8162          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8163          */
8164         if (port == 0x7e &&
8165             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8166                 vcpu->arch.complete_userspace_io =
8167                         complete_fast_pio_out_port_0x7e;
8168                 kvm_skip_emulated_instruction(vcpu);
8169         } else {
8170                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8171                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8172         }
8173         return 0;
8174 }
8175
8176 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8177 {
8178         unsigned long val;
8179
8180         /* We should only ever be called with arch.pio.count equal to 1 */
8181         BUG_ON(vcpu->arch.pio.count != 1);
8182
8183         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8184                 vcpu->arch.pio.count = 0;
8185                 return 1;
8186         }
8187
8188         /* For size less than 4 we merge, else we zero extend */
8189         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8190
8191         /*
8192          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8193          * the copy and tracing
8194          */
8195         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8196         kvm_rax_write(vcpu, val);
8197
8198         return kvm_skip_emulated_instruction(vcpu);
8199 }
8200
8201 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8202                            unsigned short port)
8203 {
8204         unsigned long val;
8205         int ret;
8206
8207         /* For size less than 4 we merge, else we zero extend */
8208         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8209
8210         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8211         if (ret) {
8212                 kvm_rax_write(vcpu, val);
8213                 return ret;
8214         }
8215
8216         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8217         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8218
8219         return 0;
8220 }
8221
8222 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8223 {
8224         int ret;
8225
8226         if (in)
8227                 ret = kvm_fast_pio_in(vcpu, size, port);
8228         else
8229                 ret = kvm_fast_pio_out(vcpu, size, port);
8230         return ret && kvm_skip_emulated_instruction(vcpu);
8231 }
8232 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8233
8234 static int kvmclock_cpu_down_prep(unsigned int cpu)
8235 {
8236         __this_cpu_write(cpu_tsc_khz, 0);
8237         return 0;
8238 }
8239
8240 static void tsc_khz_changed(void *data)
8241 {
8242         struct cpufreq_freqs *freq = data;
8243         unsigned long khz = 0;
8244
8245         if (data)
8246                 khz = freq->new;
8247         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8248                 khz = cpufreq_quick_get(raw_smp_processor_id());
8249         if (!khz)
8250                 khz = tsc_khz;
8251         __this_cpu_write(cpu_tsc_khz, khz);
8252 }
8253
8254 #ifdef CONFIG_X86_64
8255 static void kvm_hyperv_tsc_notifier(void)
8256 {
8257         struct kvm *kvm;
8258         struct kvm_vcpu *vcpu;
8259         int cpu;
8260         unsigned long flags;
8261
8262         mutex_lock(&kvm_lock);
8263         list_for_each_entry(kvm, &vm_list, vm_list)
8264                 kvm_make_mclock_inprogress_request(kvm);
8265
8266         hyperv_stop_tsc_emulation();
8267
8268         /* TSC frequency always matches when on Hyper-V */
8269         for_each_present_cpu(cpu)
8270                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8271         kvm_max_guest_tsc_khz = tsc_khz;
8272
8273         list_for_each_entry(kvm, &vm_list, vm_list) {
8274                 struct kvm_arch *ka = &kvm->arch;
8275
8276                 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8277                 pvclock_update_vm_gtod_copy(kvm);
8278                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8279
8280                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8281                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8282
8283                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8284                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8285         }
8286         mutex_unlock(&kvm_lock);
8287 }
8288 #endif
8289
8290 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8291 {
8292         struct kvm *kvm;
8293         struct kvm_vcpu *vcpu;
8294         int i, send_ipi = 0;
8295
8296         /*
8297          * We allow guests to temporarily run on slowing clocks,
8298          * provided we notify them after, or to run on accelerating
8299          * clocks, provided we notify them before.  Thus time never
8300          * goes backwards.
8301          *
8302          * However, we have a problem.  We can't atomically update
8303          * the frequency of a given CPU from this function; it is
8304          * merely a notifier, which can be called from any CPU.
8305          * Changing the TSC frequency at arbitrary points in time
8306          * requires a recomputation of local variables related to
8307          * the TSC for each VCPU.  We must flag these local variables
8308          * to be updated and be sure the update takes place with the
8309          * new frequency before any guests proceed.
8310          *
8311          * Unfortunately, the combination of hotplug CPU and frequency
8312          * change creates an intractable locking scenario; the order
8313          * of when these callouts happen is undefined with respect to
8314          * CPU hotplug, and they can race with each other.  As such,
8315          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8316          * undefined; you can actually have a CPU frequency change take
8317          * place in between the computation of X and the setting of the
8318          * variable.  To protect against this problem, all updates of
8319          * the per_cpu tsc_khz variable are done in an interrupt
8320          * protected IPI, and all callers wishing to update the value
8321          * must wait for a synchronous IPI to complete (which is trivial
8322          * if the caller is on the CPU already).  This establishes the
8323          * necessary total order on variable updates.
8324          *
8325          * Note that because a guest time update may take place
8326          * anytime after the setting of the VCPU's request bit, the
8327          * correct TSC value must be set before the request.  However,
8328          * to ensure the update actually makes it to any guest which
8329          * starts running in hardware virtualization between the set
8330          * and the acquisition of the spinlock, we must also ping the
8331          * CPU after setting the request bit.
8332          *
8333          */
8334
8335         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8336
8337         mutex_lock(&kvm_lock);
8338         list_for_each_entry(kvm, &vm_list, vm_list) {
8339                 kvm_for_each_vcpu(i, vcpu, kvm) {
8340                         if (vcpu->cpu != cpu)
8341                                 continue;
8342                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8343                         if (vcpu->cpu != raw_smp_processor_id())
8344                                 send_ipi = 1;
8345                 }
8346         }
8347         mutex_unlock(&kvm_lock);
8348
8349         if (freq->old < freq->new && send_ipi) {
8350                 /*
8351                  * We upscale the frequency.  Must make the guest
8352                  * doesn't see old kvmclock values while running with
8353                  * the new frequency, otherwise we risk the guest sees
8354                  * time go backwards.
8355                  *
8356                  * In case we update the frequency for another cpu
8357                  * (which might be in guest context) send an interrupt
8358                  * to kick the cpu out of guest context.  Next time
8359                  * guest context is entered kvmclock will be updated,
8360                  * so the guest will not see stale values.
8361                  */
8362                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8363         }
8364 }
8365
8366 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8367                                      void *data)
8368 {
8369         struct cpufreq_freqs *freq = data;
8370         int cpu;
8371
8372         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8373                 return 0;
8374         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8375                 return 0;
8376
8377         for_each_cpu(cpu, freq->policy->cpus)
8378                 __kvmclock_cpufreq_notifier(freq, cpu);
8379
8380         return 0;
8381 }
8382
8383 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8384         .notifier_call  = kvmclock_cpufreq_notifier
8385 };
8386
8387 static int kvmclock_cpu_online(unsigned int cpu)
8388 {
8389         tsc_khz_changed(NULL);
8390         return 0;
8391 }
8392
8393 static void kvm_timer_init(void)
8394 {
8395         max_tsc_khz = tsc_khz;
8396
8397         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8398 #ifdef CONFIG_CPU_FREQ
8399                 struct cpufreq_policy *policy;
8400                 int cpu;
8401
8402                 cpu = get_cpu();
8403                 policy = cpufreq_cpu_get(cpu);
8404                 if (policy) {
8405                         if (policy->cpuinfo.max_freq)
8406                                 max_tsc_khz = policy->cpuinfo.max_freq;
8407                         cpufreq_cpu_put(policy);
8408                 }
8409                 put_cpu();
8410 #endif
8411                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8412                                           CPUFREQ_TRANSITION_NOTIFIER);
8413         }
8414
8415         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8416                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8417 }
8418
8419 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8420 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8421
8422 int kvm_is_in_guest(void)
8423 {
8424         return __this_cpu_read(current_vcpu) != NULL;
8425 }
8426
8427 static int kvm_is_user_mode(void)
8428 {
8429         int user_mode = 3;
8430
8431         if (__this_cpu_read(current_vcpu))
8432                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8433
8434         return user_mode != 0;
8435 }
8436
8437 static unsigned long kvm_get_guest_ip(void)
8438 {
8439         unsigned long ip = 0;
8440
8441         if (__this_cpu_read(current_vcpu))
8442                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8443
8444         return ip;
8445 }
8446
8447 static void kvm_handle_intel_pt_intr(void)
8448 {
8449         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8450
8451         kvm_make_request(KVM_REQ_PMI, vcpu);
8452         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8453                         (unsigned long *)&vcpu->arch.pmu.global_status);
8454 }
8455
8456 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8457         .is_in_guest            = kvm_is_in_guest,
8458         .is_user_mode           = kvm_is_user_mode,
8459         .get_guest_ip           = kvm_get_guest_ip,
8460         .handle_intel_pt_intr   = NULL,
8461 };
8462
8463 #ifdef CONFIG_X86_64
8464 static void pvclock_gtod_update_fn(struct work_struct *work)
8465 {
8466         struct kvm *kvm;
8467
8468         struct kvm_vcpu *vcpu;
8469         int i;
8470
8471         mutex_lock(&kvm_lock);
8472         list_for_each_entry(kvm, &vm_list, vm_list)
8473                 kvm_for_each_vcpu(i, vcpu, kvm)
8474                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8475         atomic_set(&kvm_guest_has_master_clock, 0);
8476         mutex_unlock(&kvm_lock);
8477 }
8478
8479 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8480
8481 /*
8482  * Indirection to move queue_work() out of the tk_core.seq write held
8483  * region to prevent possible deadlocks against time accessors which
8484  * are invoked with work related locks held.
8485  */
8486 static void pvclock_irq_work_fn(struct irq_work *w)
8487 {
8488         queue_work(system_long_wq, &pvclock_gtod_work);
8489 }
8490
8491 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8492
8493 /*
8494  * Notification about pvclock gtod data update.
8495  */
8496 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8497                                void *priv)
8498 {
8499         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8500         struct timekeeper *tk = priv;
8501
8502         update_pvclock_gtod(tk);
8503
8504         /*
8505          * Disable master clock if host does not trust, or does not use,
8506          * TSC based clocksource. Delegate queue_work() to irq_work as
8507          * this is invoked with tk_core.seq write held.
8508          */
8509         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8510             atomic_read(&kvm_guest_has_master_clock) != 0)
8511                 irq_work_queue(&pvclock_irq_work);
8512         return 0;
8513 }
8514
8515 static struct notifier_block pvclock_gtod_notifier = {
8516         .notifier_call = pvclock_gtod_notify,
8517 };
8518 #endif
8519
8520 int kvm_arch_init(void *opaque)
8521 {
8522         struct kvm_x86_init_ops *ops = opaque;
8523         int r;
8524
8525         if (kvm_x86_ops.hardware_enable) {
8526                 printk(KERN_ERR "kvm: already loaded the other module\n");
8527                 r = -EEXIST;
8528                 goto out;
8529         }
8530
8531         if (!ops->cpu_has_kvm_support()) {
8532                 pr_err_ratelimited("kvm: no hardware support\n");
8533                 r = -EOPNOTSUPP;
8534                 goto out;
8535         }
8536         if (ops->disabled_by_bios()) {
8537                 pr_err_ratelimited("kvm: disabled by bios\n");
8538                 r = -EOPNOTSUPP;
8539                 goto out;
8540         }
8541
8542         /*
8543          * KVM explicitly assumes that the guest has an FPU and
8544          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8545          * vCPU's FPU state as a fxregs_state struct.
8546          */
8547         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8548                 printk(KERN_ERR "kvm: inadequate fpu\n");
8549                 r = -EOPNOTSUPP;
8550                 goto out;
8551         }
8552
8553         r = -ENOMEM;
8554         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8555                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8556                                           NULL);
8557         if (!x86_fpu_cache) {
8558                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8559                 goto out;
8560         }
8561
8562         x86_emulator_cache = kvm_alloc_emulator_cache();
8563         if (!x86_emulator_cache) {
8564                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8565                 goto out_free_x86_fpu_cache;
8566         }
8567
8568         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8569         if (!user_return_msrs) {
8570                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8571                 goto out_free_x86_emulator_cache;
8572         }
8573         kvm_nr_uret_msrs = 0;
8574
8575         r = kvm_mmu_vendor_module_init();
8576         if (r)
8577                 goto out_free_percpu;
8578
8579         kvm_timer_init();
8580
8581         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8582                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8583                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8584         }
8585
8586         if (pi_inject_timer == -1)
8587                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8588 #ifdef CONFIG_X86_64
8589         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8590
8591         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8592                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8593 #endif
8594
8595         return 0;
8596
8597 out_free_percpu:
8598         free_percpu(user_return_msrs);
8599 out_free_x86_emulator_cache:
8600         kmem_cache_destroy(x86_emulator_cache);
8601 out_free_x86_fpu_cache:
8602         kmem_cache_destroy(x86_fpu_cache);
8603 out:
8604         return r;
8605 }
8606
8607 void kvm_arch_exit(void)
8608 {
8609 #ifdef CONFIG_X86_64
8610         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8611                 clear_hv_tscchange_cb();
8612 #endif
8613         kvm_lapic_exit();
8614
8615         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8616                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8617                                             CPUFREQ_TRANSITION_NOTIFIER);
8618         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8619 #ifdef CONFIG_X86_64
8620         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8621         irq_work_sync(&pvclock_irq_work);
8622         cancel_work_sync(&pvclock_gtod_work);
8623 #endif
8624         kvm_x86_ops.hardware_enable = NULL;
8625         kvm_mmu_vendor_module_exit();
8626         free_percpu(user_return_msrs);
8627         kmem_cache_destroy(x86_emulator_cache);
8628         kmem_cache_destroy(x86_fpu_cache);
8629 #ifdef CONFIG_KVM_XEN
8630         static_key_deferred_flush(&kvm_xen_enabled);
8631         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8632 #endif
8633 }
8634
8635 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8636 {
8637         ++vcpu->stat.halt_exits;
8638         if (lapic_in_kernel(vcpu)) {
8639                 vcpu->arch.mp_state = state;
8640                 return 1;
8641         } else {
8642                 vcpu->run->exit_reason = reason;
8643                 return 0;
8644         }
8645 }
8646
8647 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8648 {
8649         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8650 }
8651 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8652
8653 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8654 {
8655         int ret = kvm_skip_emulated_instruction(vcpu);
8656         /*
8657          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8658          * KVM_EXIT_DEBUG here.
8659          */
8660         return kvm_vcpu_halt(vcpu) && ret;
8661 }
8662 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8663
8664 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8665 {
8666         int ret = kvm_skip_emulated_instruction(vcpu);
8667
8668         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8669 }
8670 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8671
8672 #ifdef CONFIG_X86_64
8673 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8674                                 unsigned long clock_type)
8675 {
8676         struct kvm_clock_pairing clock_pairing;
8677         struct timespec64 ts;
8678         u64 cycle;
8679         int ret;
8680
8681         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8682                 return -KVM_EOPNOTSUPP;
8683
8684         /*
8685          * When tsc is in permanent catchup mode guests won't be able to use
8686          * pvclock_read_retry loop to get consistent view of pvclock
8687          */
8688         if (vcpu->arch.tsc_always_catchup)
8689                 return -KVM_EOPNOTSUPP;
8690
8691         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8692                 return -KVM_EOPNOTSUPP;
8693
8694         clock_pairing.sec = ts.tv_sec;
8695         clock_pairing.nsec = ts.tv_nsec;
8696         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8697         clock_pairing.flags = 0;
8698         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8699
8700         ret = 0;
8701         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8702                             sizeof(struct kvm_clock_pairing)))
8703                 ret = -KVM_EFAULT;
8704
8705         return ret;
8706 }
8707 #endif
8708
8709 /*
8710  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8711  *
8712  * @apicid - apicid of vcpu to be kicked.
8713  */
8714 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8715 {
8716         struct kvm_lapic_irq lapic_irq;
8717
8718         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8719         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8720         lapic_irq.level = 0;
8721         lapic_irq.dest_id = apicid;
8722         lapic_irq.msi_redir_hint = false;
8723
8724         lapic_irq.delivery_mode = APIC_DM_REMRD;
8725         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8726 }
8727
8728 bool kvm_apicv_activated(struct kvm *kvm)
8729 {
8730         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8731 }
8732 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8733
8734 static void kvm_apicv_init(struct kvm *kvm)
8735 {
8736         mutex_init(&kvm->arch.apicv_update_lock);
8737
8738         if (enable_apicv)
8739                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8740                           &kvm->arch.apicv_inhibit_reasons);
8741         else
8742                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8743                         &kvm->arch.apicv_inhibit_reasons);
8744 }
8745
8746 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8747 {
8748         struct kvm_vcpu *target = NULL;
8749         struct kvm_apic_map *map;
8750
8751         vcpu->stat.directed_yield_attempted++;
8752
8753         if (single_task_running())
8754                 goto no_yield;
8755
8756         rcu_read_lock();
8757         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8758
8759         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8760                 target = map->phys_map[dest_id]->vcpu;
8761
8762         rcu_read_unlock();
8763
8764         if (!target || !READ_ONCE(target->ready))
8765                 goto no_yield;
8766
8767         /* Ignore requests to yield to self */
8768         if (vcpu == target)
8769                 goto no_yield;
8770
8771         if (kvm_vcpu_yield_to(target) <= 0)
8772                 goto no_yield;
8773
8774         vcpu->stat.directed_yield_successful++;
8775
8776 no_yield:
8777         return;
8778 }
8779
8780 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8781 {
8782         u64 ret = vcpu->run->hypercall.ret;
8783
8784         if (!is_64_bit_mode(vcpu))
8785                 ret = (u32)ret;
8786         kvm_rax_write(vcpu, ret);
8787         ++vcpu->stat.hypercalls;
8788         return kvm_skip_emulated_instruction(vcpu);
8789 }
8790
8791 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8792 {
8793         unsigned long nr, a0, a1, a2, a3, ret;
8794         int op_64_bit;
8795
8796         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8797                 return kvm_xen_hypercall(vcpu);
8798
8799         if (kvm_hv_hypercall_enabled(vcpu))
8800                 return kvm_hv_hypercall(vcpu);
8801
8802         nr = kvm_rax_read(vcpu);
8803         a0 = kvm_rbx_read(vcpu);
8804         a1 = kvm_rcx_read(vcpu);
8805         a2 = kvm_rdx_read(vcpu);
8806         a3 = kvm_rsi_read(vcpu);
8807
8808         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8809
8810         op_64_bit = is_64_bit_hypercall(vcpu);
8811         if (!op_64_bit) {
8812                 nr &= 0xFFFFFFFF;
8813                 a0 &= 0xFFFFFFFF;
8814                 a1 &= 0xFFFFFFFF;
8815                 a2 &= 0xFFFFFFFF;
8816                 a3 &= 0xFFFFFFFF;
8817         }
8818
8819         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8820                 ret = -KVM_EPERM;
8821                 goto out;
8822         }
8823
8824         ret = -KVM_ENOSYS;
8825
8826         switch (nr) {
8827         case KVM_HC_VAPIC_POLL_IRQ:
8828                 ret = 0;
8829                 break;
8830         case KVM_HC_KICK_CPU:
8831                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8832                         break;
8833
8834                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8835                 kvm_sched_yield(vcpu, a1);
8836                 ret = 0;
8837                 break;
8838 #ifdef CONFIG_X86_64
8839         case KVM_HC_CLOCK_PAIRING:
8840                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8841                 break;
8842 #endif
8843         case KVM_HC_SEND_IPI:
8844                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8845                         break;
8846
8847                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8848                 break;
8849         case KVM_HC_SCHED_YIELD:
8850                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8851                         break;
8852
8853                 kvm_sched_yield(vcpu, a0);
8854                 ret = 0;
8855                 break;
8856         case KVM_HC_MAP_GPA_RANGE: {
8857                 u64 gpa = a0, npages = a1, attrs = a2;
8858
8859                 ret = -KVM_ENOSYS;
8860                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8861                         break;
8862
8863                 if (!PAGE_ALIGNED(gpa) || !npages ||
8864                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8865                         ret = -KVM_EINVAL;
8866                         break;
8867                 }
8868
8869                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8870                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8871                 vcpu->run->hypercall.args[0]  = gpa;
8872                 vcpu->run->hypercall.args[1]  = npages;
8873                 vcpu->run->hypercall.args[2]  = attrs;
8874                 vcpu->run->hypercall.longmode = op_64_bit;
8875                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8876                 return 0;
8877         }
8878         default:
8879                 ret = -KVM_ENOSYS;
8880                 break;
8881         }
8882 out:
8883         if (!op_64_bit)
8884                 ret = (u32)ret;
8885         kvm_rax_write(vcpu, ret);
8886
8887         ++vcpu->stat.hypercalls;
8888         return kvm_skip_emulated_instruction(vcpu);
8889 }
8890 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8891
8892 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8893 {
8894         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8895         char instruction[3];
8896         unsigned long rip = kvm_rip_read(vcpu);
8897
8898         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8899
8900         return emulator_write_emulated(ctxt, rip, instruction, 3,
8901                 &ctxt->exception);
8902 }
8903
8904 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8905 {
8906         return vcpu->run->request_interrupt_window &&
8907                 likely(!pic_in_kernel(vcpu->kvm));
8908 }
8909
8910 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8911 {
8912         struct kvm_run *kvm_run = vcpu->run;
8913
8914         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
8915         kvm_run->cr8 = kvm_get_cr8(vcpu);
8916         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8917
8918         /*
8919          * The call to kvm_ready_for_interrupt_injection() may end up in
8920          * kvm_xen_has_interrupt() which may require the srcu lock to be
8921          * held, to protect against changes in the vcpu_info address.
8922          */
8923         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8924         kvm_run->ready_for_interrupt_injection =
8925                 pic_in_kernel(vcpu->kvm) ||
8926                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8927         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8928
8929         if (is_smm(vcpu))
8930                 kvm_run->flags |= KVM_RUN_X86_SMM;
8931 }
8932
8933 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8934 {
8935         int max_irr, tpr;
8936
8937         if (!kvm_x86_ops.update_cr8_intercept)
8938                 return;
8939
8940         if (!lapic_in_kernel(vcpu))
8941                 return;
8942
8943         if (vcpu->arch.apicv_active)
8944                 return;
8945
8946         if (!vcpu->arch.apic->vapic_addr)
8947                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8948         else
8949                 max_irr = -1;
8950
8951         if (max_irr != -1)
8952                 max_irr >>= 4;
8953
8954         tpr = kvm_lapic_get_cr8(vcpu);
8955
8956         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8957 }
8958
8959
8960 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8961 {
8962         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8963                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8964                 return 1;
8965         }
8966
8967         return kvm_x86_ops.nested_ops->check_events(vcpu);
8968 }
8969
8970 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8971 {
8972         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8973                 vcpu->arch.exception.error_code = false;
8974         static_call(kvm_x86_queue_exception)(vcpu);
8975 }
8976
8977 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8978 {
8979         int r;
8980         bool can_inject = true;
8981
8982         /* try to reinject previous events if any */
8983
8984         if (vcpu->arch.exception.injected) {
8985                 kvm_inject_exception(vcpu);
8986                 can_inject = false;
8987         }
8988         /*
8989          * Do not inject an NMI or interrupt if there is a pending
8990          * exception.  Exceptions and interrupts are recognized at
8991          * instruction boundaries, i.e. the start of an instruction.
8992          * Trap-like exceptions, e.g. #DB, have higher priority than
8993          * NMIs and interrupts, i.e. traps are recognized before an
8994          * NMI/interrupt that's pending on the same instruction.
8995          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8996          * priority, but are only generated (pended) during instruction
8997          * execution, i.e. a pending fault-like exception means the
8998          * fault occurred on the *previous* instruction and must be
8999          * serviced prior to recognizing any new events in order to
9000          * fully complete the previous instruction.
9001          */
9002         else if (!vcpu->arch.exception.pending) {
9003                 if (vcpu->arch.nmi_injected) {
9004                         static_call(kvm_x86_set_nmi)(vcpu);
9005                         can_inject = false;
9006                 } else if (vcpu->arch.interrupt.injected) {
9007                         static_call(kvm_x86_set_irq)(vcpu);
9008                         can_inject = false;
9009                 }
9010         }
9011
9012         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9013                      vcpu->arch.exception.pending);
9014
9015         /*
9016          * Call check_nested_events() even if we reinjected a previous event
9017          * in order for caller to determine if it should require immediate-exit
9018          * from L2 to L1 due to pending L1 events which require exit
9019          * from L2 to L1.
9020          */
9021         if (is_guest_mode(vcpu)) {
9022                 r = kvm_check_nested_events(vcpu);
9023                 if (r < 0)
9024                         goto out;
9025         }
9026
9027         /* try to inject new event if pending */
9028         if (vcpu->arch.exception.pending) {
9029                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9030                                         vcpu->arch.exception.has_error_code,
9031                                         vcpu->arch.exception.error_code);
9032
9033                 vcpu->arch.exception.pending = false;
9034                 vcpu->arch.exception.injected = true;
9035
9036                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9037                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9038                                              X86_EFLAGS_RF);
9039
9040                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9041                         kvm_deliver_exception_payload(vcpu);
9042                         if (vcpu->arch.dr7 & DR7_GD) {
9043                                 vcpu->arch.dr7 &= ~DR7_GD;
9044                                 kvm_update_dr7(vcpu);
9045                         }
9046                 }
9047
9048                 kvm_inject_exception(vcpu);
9049                 can_inject = false;
9050         }
9051
9052         /* Don't inject interrupts if the user asked to avoid doing so */
9053         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9054                 return 0;
9055
9056         /*
9057          * Finally, inject interrupt events.  If an event cannot be injected
9058          * due to architectural conditions (e.g. IF=0) a window-open exit
9059          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9060          * and can architecturally be injected, but we cannot do it right now:
9061          * an interrupt could have arrived just now and we have to inject it
9062          * as a vmexit, or there could already an event in the queue, which is
9063          * indicated by can_inject.  In that case we request an immediate exit
9064          * in order to make progress and get back here for another iteration.
9065          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9066          */
9067         if (vcpu->arch.smi_pending) {
9068                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9069                 if (r < 0)
9070                         goto out;
9071                 if (r) {
9072                         vcpu->arch.smi_pending = false;
9073                         ++vcpu->arch.smi_count;
9074                         enter_smm(vcpu);
9075                         can_inject = false;
9076                 } else
9077                         static_call(kvm_x86_enable_smi_window)(vcpu);
9078         }
9079
9080         if (vcpu->arch.nmi_pending) {
9081                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9082                 if (r < 0)
9083                         goto out;
9084                 if (r) {
9085                         --vcpu->arch.nmi_pending;
9086                         vcpu->arch.nmi_injected = true;
9087                         static_call(kvm_x86_set_nmi)(vcpu);
9088                         can_inject = false;
9089                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9090                 }
9091                 if (vcpu->arch.nmi_pending)
9092                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9093         }
9094
9095         if (kvm_cpu_has_injectable_intr(vcpu)) {
9096                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9097                 if (r < 0)
9098                         goto out;
9099                 if (r) {
9100                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9101                         static_call(kvm_x86_set_irq)(vcpu);
9102                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9103                 }
9104                 if (kvm_cpu_has_injectable_intr(vcpu))
9105                         static_call(kvm_x86_enable_irq_window)(vcpu);
9106         }
9107
9108         if (is_guest_mode(vcpu) &&
9109             kvm_x86_ops.nested_ops->hv_timer_pending &&
9110             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9111                 *req_immediate_exit = true;
9112
9113         WARN_ON(vcpu->arch.exception.pending);
9114         return 0;
9115
9116 out:
9117         if (r == -EBUSY) {
9118                 *req_immediate_exit = true;
9119                 r = 0;
9120         }
9121         return r;
9122 }
9123
9124 static void process_nmi(struct kvm_vcpu *vcpu)
9125 {
9126         unsigned limit = 2;
9127
9128         /*
9129          * x86 is limited to one NMI running, and one NMI pending after it.
9130          * If an NMI is already in progress, limit further NMIs to just one.
9131          * Otherwise, allow two (and we'll inject the first one immediately).
9132          */
9133         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9134                 limit = 1;
9135
9136         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9137         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9138         kvm_make_request(KVM_REQ_EVENT, vcpu);
9139 }
9140
9141 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9142 {
9143         u32 flags = 0;
9144         flags |= seg->g       << 23;
9145         flags |= seg->db      << 22;
9146         flags |= seg->l       << 21;
9147         flags |= seg->avl     << 20;
9148         flags |= seg->present << 15;
9149         flags |= seg->dpl     << 13;
9150         flags |= seg->s       << 12;
9151         flags |= seg->type    << 8;
9152         return flags;
9153 }
9154
9155 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9156 {
9157         struct kvm_segment seg;
9158         int offset;
9159
9160         kvm_get_segment(vcpu, &seg, n);
9161         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9162
9163         if (n < 3)
9164                 offset = 0x7f84 + n * 12;
9165         else
9166                 offset = 0x7f2c + (n - 3) * 12;
9167
9168         put_smstate(u32, buf, offset + 8, seg.base);
9169         put_smstate(u32, buf, offset + 4, seg.limit);
9170         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9171 }
9172
9173 #ifdef CONFIG_X86_64
9174 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9175 {
9176         struct kvm_segment seg;
9177         int offset;
9178         u16 flags;
9179
9180         kvm_get_segment(vcpu, &seg, n);
9181         offset = 0x7e00 + n * 16;
9182
9183         flags = enter_smm_get_segment_flags(&seg) >> 8;
9184         put_smstate(u16, buf, offset, seg.selector);
9185         put_smstate(u16, buf, offset + 2, flags);
9186         put_smstate(u32, buf, offset + 4, seg.limit);
9187         put_smstate(u64, buf, offset + 8, seg.base);
9188 }
9189 #endif
9190
9191 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9192 {
9193         struct desc_ptr dt;
9194         struct kvm_segment seg;
9195         unsigned long val;
9196         int i;
9197
9198         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9199         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9200         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9201         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9202
9203         for (i = 0; i < 8; i++)
9204                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9205
9206         kvm_get_dr(vcpu, 6, &val);
9207         put_smstate(u32, buf, 0x7fcc, (u32)val);
9208         kvm_get_dr(vcpu, 7, &val);
9209         put_smstate(u32, buf, 0x7fc8, (u32)val);
9210
9211         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9212         put_smstate(u32, buf, 0x7fc4, seg.selector);
9213         put_smstate(u32, buf, 0x7f64, seg.base);
9214         put_smstate(u32, buf, 0x7f60, seg.limit);
9215         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9216
9217         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9218         put_smstate(u32, buf, 0x7fc0, seg.selector);
9219         put_smstate(u32, buf, 0x7f80, seg.base);
9220         put_smstate(u32, buf, 0x7f7c, seg.limit);
9221         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9222
9223         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9224         put_smstate(u32, buf, 0x7f74, dt.address);
9225         put_smstate(u32, buf, 0x7f70, dt.size);
9226
9227         static_call(kvm_x86_get_idt)(vcpu, &dt);
9228         put_smstate(u32, buf, 0x7f58, dt.address);
9229         put_smstate(u32, buf, 0x7f54, dt.size);
9230
9231         for (i = 0; i < 6; i++)
9232                 enter_smm_save_seg_32(vcpu, buf, i);
9233
9234         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9235
9236         /* revision id */
9237         put_smstate(u32, buf, 0x7efc, 0x00020000);
9238         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9239 }
9240
9241 #ifdef CONFIG_X86_64
9242 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9243 {
9244         struct desc_ptr dt;
9245         struct kvm_segment seg;
9246         unsigned long val;
9247         int i;
9248
9249         for (i = 0; i < 16; i++)
9250                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9251
9252         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9253         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9254
9255         kvm_get_dr(vcpu, 6, &val);
9256         put_smstate(u64, buf, 0x7f68, val);
9257         kvm_get_dr(vcpu, 7, &val);
9258         put_smstate(u64, buf, 0x7f60, val);
9259
9260         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9261         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9262         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9263
9264         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9265
9266         /* revision id */
9267         put_smstate(u32, buf, 0x7efc, 0x00020064);
9268
9269         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9270
9271         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9272         put_smstate(u16, buf, 0x7e90, seg.selector);
9273         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9274         put_smstate(u32, buf, 0x7e94, seg.limit);
9275         put_smstate(u64, buf, 0x7e98, seg.base);
9276
9277         static_call(kvm_x86_get_idt)(vcpu, &dt);
9278         put_smstate(u32, buf, 0x7e84, dt.size);
9279         put_smstate(u64, buf, 0x7e88, dt.address);
9280
9281         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9282         put_smstate(u16, buf, 0x7e70, seg.selector);
9283         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9284         put_smstate(u32, buf, 0x7e74, seg.limit);
9285         put_smstate(u64, buf, 0x7e78, seg.base);
9286
9287         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9288         put_smstate(u32, buf, 0x7e64, dt.size);
9289         put_smstate(u64, buf, 0x7e68, dt.address);
9290
9291         for (i = 0; i < 6; i++)
9292                 enter_smm_save_seg_64(vcpu, buf, i);
9293 }
9294 #endif
9295
9296 static void enter_smm(struct kvm_vcpu *vcpu)
9297 {
9298         struct kvm_segment cs, ds;
9299         struct desc_ptr dt;
9300         unsigned long cr0;
9301         char buf[512];
9302
9303         memset(buf, 0, 512);
9304 #ifdef CONFIG_X86_64
9305         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9306                 enter_smm_save_state_64(vcpu, buf);
9307         else
9308 #endif
9309                 enter_smm_save_state_32(vcpu, buf);
9310
9311         /*
9312          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9313          * state (e.g. leave guest mode) after we've saved the state into the
9314          * SMM state-save area.
9315          */
9316         static_call(kvm_x86_enter_smm)(vcpu, buf);
9317
9318         kvm_smm_changed(vcpu, true);
9319         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9320
9321         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9322                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9323         else
9324                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9325
9326         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9327         kvm_rip_write(vcpu, 0x8000);
9328
9329         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9330         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9331         vcpu->arch.cr0 = cr0;
9332
9333         static_call(kvm_x86_set_cr4)(vcpu, 0);
9334
9335         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9336         dt.address = dt.size = 0;
9337         static_call(kvm_x86_set_idt)(vcpu, &dt);
9338
9339         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9340
9341         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9342         cs.base = vcpu->arch.smbase;
9343
9344         ds.selector = 0;
9345         ds.base = 0;
9346
9347         cs.limit    = ds.limit = 0xffffffff;
9348         cs.type     = ds.type = 0x3;
9349         cs.dpl      = ds.dpl = 0;
9350         cs.db       = ds.db = 0;
9351         cs.s        = ds.s = 1;
9352         cs.l        = ds.l = 0;
9353         cs.g        = ds.g = 1;
9354         cs.avl      = ds.avl = 0;
9355         cs.present  = ds.present = 1;
9356         cs.unusable = ds.unusable = 0;
9357         cs.padding  = ds.padding = 0;
9358
9359         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9360         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9361         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9362         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9363         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9364         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9365
9366 #ifdef CONFIG_X86_64
9367         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9368                 static_call(kvm_x86_set_efer)(vcpu, 0);
9369 #endif
9370
9371         kvm_update_cpuid_runtime(vcpu);
9372         kvm_mmu_reset_context(vcpu);
9373 }
9374
9375 static void process_smi(struct kvm_vcpu *vcpu)
9376 {
9377         vcpu->arch.smi_pending = true;
9378         kvm_make_request(KVM_REQ_EVENT, vcpu);
9379 }
9380
9381 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9382                                        unsigned long *vcpu_bitmap)
9383 {
9384         cpumask_var_t cpus;
9385
9386         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9387
9388         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9389                                     NULL, vcpu_bitmap, cpus);
9390
9391         free_cpumask_var(cpus);
9392 }
9393
9394 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9395 {
9396         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9397 }
9398
9399 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9400 {
9401         bool activate;
9402
9403         if (!lapic_in_kernel(vcpu))
9404                 return;
9405
9406         mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9407
9408         activate = kvm_apicv_activated(vcpu->kvm);
9409         if (vcpu->arch.apicv_active == activate)
9410                 goto out;
9411
9412         vcpu->arch.apicv_active = activate;
9413         kvm_apic_update_apicv(vcpu);
9414         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9415
9416         /*
9417          * When APICv gets disabled, we may still have injected interrupts
9418          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9419          * still active when the interrupt got accepted. Make sure
9420          * inject_pending_event() is called to check for that.
9421          */
9422         if (!vcpu->arch.apicv_active)
9423                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9424
9425 out:
9426         mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9427 }
9428 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9429
9430 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9431 {
9432         unsigned long old, new;
9433
9434         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9435             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9436                 return;
9437
9438         old = new = kvm->arch.apicv_inhibit_reasons;
9439
9440         if (activate)
9441                 __clear_bit(bit, &new);
9442         else
9443                 __set_bit(bit, &new);
9444
9445         if (!!old != !!new) {
9446                 trace_kvm_apicv_update_request(activate, bit);
9447                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9448                 kvm->arch.apicv_inhibit_reasons = new;
9449                 if (new) {
9450                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9451                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9452                 }
9453         } else
9454                 kvm->arch.apicv_inhibit_reasons = new;
9455 }
9456 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9457
9458 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9459 {
9460         mutex_lock(&kvm->arch.apicv_update_lock);
9461         __kvm_request_apicv_update(kvm, activate, bit);
9462         mutex_unlock(&kvm->arch.apicv_update_lock);
9463 }
9464 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9465
9466 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9467 {
9468         if (!kvm_apic_present(vcpu))
9469                 return;
9470
9471         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9472
9473         if (irqchip_split(vcpu->kvm))
9474                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9475         else {
9476                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9477                 if (ioapic_in_kernel(vcpu->kvm))
9478                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9479         }
9480
9481         if (is_guest_mode(vcpu))
9482                 vcpu->arch.load_eoi_exitmap_pending = true;
9483         else
9484                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9485 }
9486
9487 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9488 {
9489         u64 eoi_exit_bitmap[4];
9490
9491         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9492                 return;
9493
9494         if (to_hv_vcpu(vcpu)) {
9495                 bitmap_or((ulong *)eoi_exit_bitmap,
9496                           vcpu->arch.ioapic_handled_vectors,
9497                           to_hv_synic(vcpu)->vec_bitmap, 256);
9498                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9499                 return;
9500         }
9501
9502         static_call(kvm_x86_load_eoi_exitmap)(
9503                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9504 }
9505
9506 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9507                                             unsigned long start, unsigned long end)
9508 {
9509         unsigned long apic_address;
9510
9511         /*
9512          * The physical address of apic access page is stored in the VMCS.
9513          * Update it when it becomes invalid.
9514          */
9515         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9516         if (start <= apic_address && apic_address < end)
9517                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9518 }
9519
9520 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9521 {
9522         if (!lapic_in_kernel(vcpu))
9523                 return;
9524
9525         if (!kvm_x86_ops.set_apic_access_page_addr)
9526                 return;
9527
9528         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9529 }
9530
9531 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9532 {
9533         smp_send_reschedule(vcpu->cpu);
9534 }
9535 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9536
9537 /*
9538  * Returns 1 to let vcpu_run() continue the guest execution loop without
9539  * exiting to the userspace.  Otherwise, the value will be returned to the
9540  * userspace.
9541  */
9542 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9543 {
9544         int r;
9545         bool req_int_win =
9546                 dm_request_for_irq_injection(vcpu) &&
9547                 kvm_cpu_accept_dm_intr(vcpu);
9548         fastpath_t exit_fastpath;
9549
9550         bool req_immediate_exit = false;
9551
9552         /* Forbid vmenter if vcpu dirty ring is soft-full */
9553         if (unlikely(vcpu->kvm->dirty_ring_size &&
9554                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9555                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9556                 trace_kvm_dirty_ring_exit(vcpu);
9557                 r = 0;
9558                 goto out;
9559         }
9560
9561         if (kvm_request_pending(vcpu)) {
9562                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9563                         r = -EIO;
9564                         goto out;
9565                 }
9566                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9567                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9568                                 r = 0;
9569                                 goto out;
9570                         }
9571                 }
9572                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9573                         kvm_mmu_unload(vcpu);
9574                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9575                         __kvm_migrate_timers(vcpu);
9576                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9577                         kvm_gen_update_masterclock(vcpu->kvm);
9578                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9579                         kvm_gen_kvmclock_update(vcpu);
9580                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9581                         r = kvm_guest_time_update(vcpu);
9582                         if (unlikely(r))
9583                                 goto out;
9584                 }
9585                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9586                         kvm_mmu_sync_roots(vcpu);
9587                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9588                         kvm_mmu_load_pgd(vcpu);
9589                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9590                         kvm_vcpu_flush_tlb_all(vcpu);
9591
9592                         /* Flushing all ASIDs flushes the current ASID... */
9593                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9594                 }
9595                 kvm_service_local_tlb_flush_requests(vcpu);
9596
9597                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9598                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9599                         r = 0;
9600                         goto out;
9601                 }
9602                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9603                         if (is_guest_mode(vcpu)) {
9604                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9605                         } else {
9606                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9607                                 vcpu->mmio_needed = 0;
9608                                 r = 0;
9609                                 goto out;
9610                         }
9611                 }
9612                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9613                         /* Page is swapped out. Do synthetic halt */
9614                         vcpu->arch.apf.halted = true;
9615                         r = 1;
9616                         goto out;
9617                 }
9618                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9619                         record_steal_time(vcpu);
9620                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9621                         process_smi(vcpu);
9622                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9623                         process_nmi(vcpu);
9624                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9625                         kvm_pmu_handle_event(vcpu);
9626                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9627                         kvm_pmu_deliver_pmi(vcpu);
9628                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9629                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9630                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9631                                      vcpu->arch.ioapic_handled_vectors)) {
9632                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9633                                 vcpu->run->eoi.vector =
9634                                                 vcpu->arch.pending_ioapic_eoi;
9635                                 r = 0;
9636                                 goto out;
9637                         }
9638                 }
9639                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9640                         vcpu_scan_ioapic(vcpu);
9641                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9642                         vcpu_load_eoi_exitmap(vcpu);
9643                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9644                         kvm_vcpu_reload_apic_access_page(vcpu);
9645                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9646                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9647                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9648                         r = 0;
9649                         goto out;
9650                 }
9651                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9652                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9653                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9654                         r = 0;
9655                         goto out;
9656                 }
9657                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9658                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9659
9660                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9661                         vcpu->run->hyperv = hv_vcpu->exit;
9662                         r = 0;
9663                         goto out;
9664                 }
9665
9666                 /*
9667                  * KVM_REQ_HV_STIMER has to be processed after
9668                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9669                  * depend on the guest clock being up-to-date
9670                  */
9671                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9672                         kvm_hv_process_stimers(vcpu);
9673                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9674                         kvm_vcpu_update_apicv(vcpu);
9675                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9676                         kvm_check_async_pf_completion(vcpu);
9677                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9678                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9679
9680                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9681                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9682         }
9683
9684         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9685             kvm_xen_has_interrupt(vcpu)) {
9686                 ++vcpu->stat.req_event;
9687                 r = kvm_apic_accept_events(vcpu);
9688                 if (r < 0) {
9689                         r = 0;
9690                         goto out;
9691                 }
9692                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9693                         r = 1;
9694                         goto out;
9695                 }
9696
9697                 r = inject_pending_event(vcpu, &req_immediate_exit);
9698                 if (r < 0) {
9699                         r = 0;
9700                         goto out;
9701                 }
9702                 if (req_int_win)
9703                         static_call(kvm_x86_enable_irq_window)(vcpu);
9704
9705                 if (kvm_lapic_enabled(vcpu)) {
9706                         update_cr8_intercept(vcpu);
9707                         kvm_lapic_sync_to_vapic(vcpu);
9708                 }
9709         }
9710
9711         r = kvm_mmu_reload(vcpu);
9712         if (unlikely(r)) {
9713                 goto cancel_injection;
9714         }
9715
9716         preempt_disable();
9717
9718         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9719
9720         /*
9721          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9722          * IPI are then delayed after guest entry, which ensures that they
9723          * result in virtual interrupt delivery.
9724          */
9725         local_irq_disable();
9726         vcpu->mode = IN_GUEST_MODE;
9727
9728         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9729
9730         /*
9731          * 1) We should set ->mode before checking ->requests.  Please see
9732          * the comment in kvm_vcpu_exiting_guest_mode().
9733          *
9734          * 2) For APICv, we should set ->mode before checking PID.ON. This
9735          * pairs with the memory barrier implicit in pi_test_and_set_on
9736          * (see vmx_deliver_posted_interrupt).
9737          *
9738          * 3) This also orders the write to mode from any reads to the page
9739          * tables done while the VCPU is running.  Please see the comment
9740          * in kvm_flush_remote_tlbs.
9741          */
9742         smp_mb__after_srcu_read_unlock();
9743
9744         /*
9745          * This handles the case where a posted interrupt was
9746          * notified with kvm_vcpu_kick.  Assigned devices can
9747          * use the POSTED_INTR_VECTOR even if APICv is disabled,
9748          * so do it even if APICv is disabled on this vCPU.
9749          */
9750         if (kvm_lapic_enabled(vcpu))
9751                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9752
9753         if (kvm_vcpu_exit_request(vcpu)) {
9754                 vcpu->mode = OUTSIDE_GUEST_MODE;
9755                 smp_wmb();
9756                 local_irq_enable();
9757                 preempt_enable();
9758                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9759                 r = 1;
9760                 goto cancel_injection;
9761         }
9762
9763         if (req_immediate_exit) {
9764                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9765                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9766         }
9767
9768         fpregs_assert_state_consistent();
9769         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9770                 switch_fpu_return();
9771
9772         if (unlikely(vcpu->arch.switch_db_regs)) {
9773                 set_debugreg(0, 7);
9774                 set_debugreg(vcpu->arch.eff_db[0], 0);
9775                 set_debugreg(vcpu->arch.eff_db[1], 1);
9776                 set_debugreg(vcpu->arch.eff_db[2], 2);
9777                 set_debugreg(vcpu->arch.eff_db[3], 3);
9778         } else if (unlikely(hw_breakpoint_active())) {
9779                 set_debugreg(0, 7);
9780         }
9781
9782         for (;;) {
9783                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9784                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9785                         break;
9786
9787                 if (kvm_lapic_enabled(vcpu))
9788                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9789
9790                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9791                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9792                         break;
9793                 }
9794         }
9795
9796         /*
9797          * Do this here before restoring debug registers on the host.  And
9798          * since we do this before handling the vmexit, a DR access vmexit
9799          * can (a) read the correct value of the debug registers, (b) set
9800          * KVM_DEBUGREG_WONT_EXIT again.
9801          */
9802         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9803                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9804                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9805                 kvm_update_dr0123(vcpu);
9806                 kvm_update_dr7(vcpu);
9807         }
9808
9809         /*
9810          * If the guest has used debug registers, at least dr7
9811          * will be disabled while returning to the host.
9812          * If we don't have active breakpoints in the host, we don't
9813          * care about the messed up debug address registers. But if
9814          * we have some of them active, restore the old state.
9815          */
9816         if (hw_breakpoint_active())
9817                 hw_breakpoint_restore();
9818
9819         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9820         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9821
9822         vcpu->mode = OUTSIDE_GUEST_MODE;
9823         smp_wmb();
9824
9825         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9826
9827         /*
9828          * Consume any pending interrupts, including the possible source of
9829          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9830          * An instruction is required after local_irq_enable() to fully unblock
9831          * interrupts on processors that implement an interrupt shadow, the
9832          * stat.exits increment will do nicely.
9833          */
9834         kvm_before_interrupt(vcpu);
9835         local_irq_enable();
9836         ++vcpu->stat.exits;
9837         local_irq_disable();
9838         kvm_after_interrupt(vcpu);
9839
9840         /*
9841          * Wait until after servicing IRQs to account guest time so that any
9842          * ticks that occurred while running the guest are properly accounted
9843          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9844          * of accounting via context tracking, but the loss of accuracy is
9845          * acceptable for all known use cases.
9846          */
9847         vtime_account_guest_exit();
9848
9849         if (lapic_in_kernel(vcpu)) {
9850                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9851                 if (delta != S64_MIN) {
9852                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9853                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9854                 }
9855         }
9856
9857         local_irq_enable();
9858         preempt_enable();
9859
9860         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9861
9862         /*
9863          * Profile KVM exit RIPs:
9864          */
9865         if (unlikely(prof_on == KVM_PROFILING)) {
9866                 unsigned long rip = kvm_rip_read(vcpu);
9867                 profile_hit(KVM_PROFILING, (void *)rip);
9868         }
9869
9870         if (unlikely(vcpu->arch.tsc_always_catchup))
9871                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9872
9873         if (vcpu->arch.apic_attention)
9874                 kvm_lapic_sync_from_vapic(vcpu);
9875
9876         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9877         return r;
9878
9879 cancel_injection:
9880         if (req_immediate_exit)
9881                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9882         static_call(kvm_x86_cancel_injection)(vcpu);
9883         if (unlikely(vcpu->arch.apic_attention))
9884                 kvm_lapic_sync_from_vapic(vcpu);
9885 out:
9886         return r;
9887 }
9888
9889 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9890 {
9891         if (!kvm_arch_vcpu_runnable(vcpu) &&
9892             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9893                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9894                 kvm_vcpu_block(vcpu);
9895                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9896
9897                 if (kvm_x86_ops.post_block)
9898                         static_call(kvm_x86_post_block)(vcpu);
9899
9900                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9901                         return 1;
9902         }
9903
9904         if (kvm_apic_accept_events(vcpu) < 0)
9905                 return 0;
9906         switch(vcpu->arch.mp_state) {
9907         case KVM_MP_STATE_HALTED:
9908         case KVM_MP_STATE_AP_RESET_HOLD:
9909                 vcpu->arch.pv.pv_unhalted = false;
9910                 vcpu->arch.mp_state =
9911                         KVM_MP_STATE_RUNNABLE;
9912                 fallthrough;
9913         case KVM_MP_STATE_RUNNABLE:
9914                 vcpu->arch.apf.halted = false;
9915                 break;
9916         case KVM_MP_STATE_INIT_RECEIVED:
9917                 break;
9918         default:
9919                 return -EINTR;
9920         }
9921         return 1;
9922 }
9923
9924 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9925 {
9926         if (is_guest_mode(vcpu))
9927                 kvm_check_nested_events(vcpu);
9928
9929         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9930                 !vcpu->arch.apf.halted);
9931 }
9932
9933 static int vcpu_run(struct kvm_vcpu *vcpu)
9934 {
9935         int r;
9936         struct kvm *kvm = vcpu->kvm;
9937
9938         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9939         vcpu->arch.l1tf_flush_l1d = true;
9940
9941         for (;;) {
9942                 if (kvm_vcpu_running(vcpu)) {
9943                         r = vcpu_enter_guest(vcpu);
9944                 } else {
9945                         r = vcpu_block(kvm, vcpu);
9946                 }
9947
9948                 if (r <= 0)
9949                         break;
9950
9951                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9952                 if (kvm_cpu_has_pending_timer(vcpu))
9953                         kvm_inject_pending_timer_irqs(vcpu);
9954
9955                 if (dm_request_for_irq_injection(vcpu) &&
9956                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9957                         r = 0;
9958                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9959                         ++vcpu->stat.request_irq_exits;
9960                         break;
9961                 }
9962
9963                 if (__xfer_to_guest_mode_work_pending()) {
9964                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9965                         r = xfer_to_guest_mode_handle_work(vcpu);
9966                         if (r)
9967                                 return r;
9968                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9969                 }
9970         }
9971
9972         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9973
9974         return r;
9975 }
9976
9977 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9978 {
9979         int r;
9980
9981         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9982         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9983         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9984         return r;
9985 }
9986
9987 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9988 {
9989         BUG_ON(!vcpu->arch.pio.count);
9990
9991         return complete_emulated_io(vcpu);
9992 }
9993
9994 /*
9995  * Implements the following, as a state machine:
9996  *
9997  * read:
9998  *   for each fragment
9999  *     for each mmio piece in the fragment
10000  *       write gpa, len
10001  *       exit
10002  *       copy data
10003  *   execute insn
10004  *
10005  * write:
10006  *   for each fragment
10007  *     for each mmio piece in the fragment
10008  *       write gpa, len
10009  *       copy data
10010  *       exit
10011  */
10012 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10013 {
10014         struct kvm_run *run = vcpu->run;
10015         struct kvm_mmio_fragment *frag;
10016         unsigned len;
10017
10018         BUG_ON(!vcpu->mmio_needed);
10019
10020         /* Complete previous fragment */
10021         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10022         len = min(8u, frag->len);
10023         if (!vcpu->mmio_is_write)
10024                 memcpy(frag->data, run->mmio.data, len);
10025
10026         if (frag->len <= 8) {
10027                 /* Switch to the next fragment. */
10028                 frag++;
10029                 vcpu->mmio_cur_fragment++;
10030         } else {
10031                 /* Go forward to the next mmio piece. */
10032                 frag->data += len;
10033                 frag->gpa += len;
10034                 frag->len -= len;
10035         }
10036
10037         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10038                 vcpu->mmio_needed = 0;
10039
10040                 /* FIXME: return into emulator if single-stepping.  */
10041                 if (vcpu->mmio_is_write)
10042                         return 1;
10043                 vcpu->mmio_read_completed = 1;
10044                 return complete_emulated_io(vcpu);
10045         }
10046
10047         run->exit_reason = KVM_EXIT_MMIO;
10048         run->mmio.phys_addr = frag->gpa;
10049         if (vcpu->mmio_is_write)
10050                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10051         run->mmio.len = min(8u, frag->len);
10052         run->mmio.is_write = vcpu->mmio_is_write;
10053         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10054         return 0;
10055 }
10056
10057 static void kvm_save_current_fpu(struct fpu *fpu)
10058 {
10059         /*
10060          * If the target FPU state is not resident in the CPU registers, just
10061          * memcpy() from current, else save CPU state directly to the target.
10062          */
10063         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10064                 memcpy(&fpu->state, &current->thread.fpu.state,
10065                        fpu_kernel_xstate_size);
10066         else
10067                 save_fpregs_to_fpstate(fpu);
10068 }
10069
10070 /* Swap (qemu) user FPU context for the guest FPU context. */
10071 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10072 {
10073         fpregs_lock();
10074
10075         kvm_save_current_fpu(vcpu->arch.user_fpu);
10076
10077         /*
10078          * Guests with protected state can't have it set by the hypervisor,
10079          * so skip trying to set it.
10080          */
10081         if (vcpu->arch.guest_fpu)
10082                 /* PKRU is separately restored in kvm_x86_ops.run. */
10083                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
10084                                         ~XFEATURE_MASK_PKRU);
10085
10086         fpregs_mark_activate();
10087         fpregs_unlock();
10088
10089         trace_kvm_fpu(1);
10090 }
10091
10092 /* When vcpu_run ends, restore user space FPU context. */
10093 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10094 {
10095         fpregs_lock();
10096
10097         /*
10098          * Guests with protected state can't have it read by the hypervisor,
10099          * so skip trying to save it.
10100          */
10101         if (vcpu->arch.guest_fpu)
10102                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
10103
10104         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
10105
10106         fpregs_mark_activate();
10107         fpregs_unlock();
10108
10109         ++vcpu->stat.fpu_reload;
10110         trace_kvm_fpu(0);
10111 }
10112
10113 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10114 {
10115         struct kvm_run *kvm_run = vcpu->run;
10116         int r;
10117
10118         vcpu_load(vcpu);
10119         kvm_sigset_activate(vcpu);
10120         kvm_run->flags = 0;
10121         kvm_load_guest_fpu(vcpu);
10122
10123         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10124                 if (kvm_run->immediate_exit) {
10125                         r = -EINTR;
10126                         goto out;
10127                 }
10128                 kvm_vcpu_block(vcpu);
10129                 if (kvm_apic_accept_events(vcpu) < 0) {
10130                         r = 0;
10131                         goto out;
10132                 }
10133                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10134                 r = -EAGAIN;
10135                 if (signal_pending(current)) {
10136                         r = -EINTR;
10137                         kvm_run->exit_reason = KVM_EXIT_INTR;
10138                         ++vcpu->stat.signal_exits;
10139                 }
10140                 goto out;
10141         }
10142
10143         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10144             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10145                 r = -EINVAL;
10146                 goto out;
10147         }
10148
10149         if (kvm_run->kvm_dirty_regs) {
10150                 r = sync_regs(vcpu);
10151                 if (r != 0)
10152                         goto out;
10153         }
10154
10155         /* re-sync apic's tpr */
10156         if (!lapic_in_kernel(vcpu)) {
10157                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10158                         r = -EINVAL;
10159                         goto out;
10160                 }
10161         }
10162
10163         if (unlikely(vcpu->arch.complete_userspace_io)) {
10164                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10165                 vcpu->arch.complete_userspace_io = NULL;
10166                 r = cui(vcpu);
10167                 if (r <= 0)
10168                         goto out;
10169         } else
10170                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10171
10172         if (kvm_run->immediate_exit)
10173                 r = -EINTR;
10174         else
10175                 r = vcpu_run(vcpu);
10176
10177 out:
10178         kvm_put_guest_fpu(vcpu);
10179         if (kvm_run->kvm_valid_regs)
10180                 store_regs(vcpu);
10181         post_kvm_run_save(vcpu);
10182         kvm_sigset_deactivate(vcpu);
10183
10184         vcpu_put(vcpu);
10185         return r;
10186 }
10187
10188 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10189 {
10190         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10191                 /*
10192                  * We are here if userspace calls get_regs() in the middle of
10193                  * instruction emulation. Registers state needs to be copied
10194                  * back from emulation context to vcpu. Userspace shouldn't do
10195                  * that usually, but some bad designed PV devices (vmware
10196                  * backdoor interface) need this to work
10197                  */
10198                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10199                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10200         }
10201         regs->rax = kvm_rax_read(vcpu);
10202         regs->rbx = kvm_rbx_read(vcpu);
10203         regs->rcx = kvm_rcx_read(vcpu);
10204         regs->rdx = kvm_rdx_read(vcpu);
10205         regs->rsi = kvm_rsi_read(vcpu);
10206         regs->rdi = kvm_rdi_read(vcpu);
10207         regs->rsp = kvm_rsp_read(vcpu);
10208         regs->rbp = kvm_rbp_read(vcpu);
10209 #ifdef CONFIG_X86_64
10210         regs->r8 = kvm_r8_read(vcpu);
10211         regs->r9 = kvm_r9_read(vcpu);
10212         regs->r10 = kvm_r10_read(vcpu);
10213         regs->r11 = kvm_r11_read(vcpu);
10214         regs->r12 = kvm_r12_read(vcpu);
10215         regs->r13 = kvm_r13_read(vcpu);
10216         regs->r14 = kvm_r14_read(vcpu);
10217         regs->r15 = kvm_r15_read(vcpu);
10218 #endif
10219
10220         regs->rip = kvm_rip_read(vcpu);
10221         regs->rflags = kvm_get_rflags(vcpu);
10222 }
10223
10224 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10225 {
10226         vcpu_load(vcpu);
10227         __get_regs(vcpu, regs);
10228         vcpu_put(vcpu);
10229         return 0;
10230 }
10231
10232 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10233 {
10234         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10235         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10236
10237         kvm_rax_write(vcpu, regs->rax);
10238         kvm_rbx_write(vcpu, regs->rbx);
10239         kvm_rcx_write(vcpu, regs->rcx);
10240         kvm_rdx_write(vcpu, regs->rdx);
10241         kvm_rsi_write(vcpu, regs->rsi);
10242         kvm_rdi_write(vcpu, regs->rdi);
10243         kvm_rsp_write(vcpu, regs->rsp);
10244         kvm_rbp_write(vcpu, regs->rbp);
10245 #ifdef CONFIG_X86_64
10246         kvm_r8_write(vcpu, regs->r8);
10247         kvm_r9_write(vcpu, regs->r9);
10248         kvm_r10_write(vcpu, regs->r10);
10249         kvm_r11_write(vcpu, regs->r11);
10250         kvm_r12_write(vcpu, regs->r12);
10251         kvm_r13_write(vcpu, regs->r13);
10252         kvm_r14_write(vcpu, regs->r14);
10253         kvm_r15_write(vcpu, regs->r15);
10254 #endif
10255
10256         kvm_rip_write(vcpu, regs->rip);
10257         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10258
10259         vcpu->arch.exception.pending = false;
10260
10261         kvm_make_request(KVM_REQ_EVENT, vcpu);
10262 }
10263
10264 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10265 {
10266         vcpu_load(vcpu);
10267         __set_regs(vcpu, regs);
10268         vcpu_put(vcpu);
10269         return 0;
10270 }
10271
10272 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10273 {
10274         struct kvm_segment cs;
10275
10276         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10277         *db = cs.db;
10278         *l = cs.l;
10279 }
10280 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10281
10282 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10283 {
10284         struct desc_ptr dt;
10285
10286         if (vcpu->arch.guest_state_protected)
10287                 goto skip_protected_regs;
10288
10289         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10290         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10291         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10292         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10293         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10294         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10295
10296         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10297         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10298
10299         static_call(kvm_x86_get_idt)(vcpu, &dt);
10300         sregs->idt.limit = dt.size;
10301         sregs->idt.base = dt.address;
10302         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10303         sregs->gdt.limit = dt.size;
10304         sregs->gdt.base = dt.address;
10305
10306         sregs->cr2 = vcpu->arch.cr2;
10307         sregs->cr3 = kvm_read_cr3(vcpu);
10308
10309 skip_protected_regs:
10310         sregs->cr0 = kvm_read_cr0(vcpu);
10311         sregs->cr4 = kvm_read_cr4(vcpu);
10312         sregs->cr8 = kvm_get_cr8(vcpu);
10313         sregs->efer = vcpu->arch.efer;
10314         sregs->apic_base = kvm_get_apic_base(vcpu);
10315 }
10316
10317 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10318 {
10319         __get_sregs_common(vcpu, sregs);
10320
10321         if (vcpu->arch.guest_state_protected)
10322                 return;
10323
10324         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10325                 set_bit(vcpu->arch.interrupt.nr,
10326                         (unsigned long *)sregs->interrupt_bitmap);
10327 }
10328
10329 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10330 {
10331         int i;
10332
10333         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10334
10335         if (vcpu->arch.guest_state_protected)
10336                 return;
10337
10338         if (is_pae_paging(vcpu)) {
10339                 for (i = 0 ; i < 4 ; i++)
10340                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10341                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10342         }
10343 }
10344
10345 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10346                                   struct kvm_sregs *sregs)
10347 {
10348         vcpu_load(vcpu);
10349         __get_sregs(vcpu, sregs);
10350         vcpu_put(vcpu);
10351         return 0;
10352 }
10353
10354 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10355                                     struct kvm_mp_state *mp_state)
10356 {
10357         int r;
10358
10359         vcpu_load(vcpu);
10360         if (kvm_mpx_supported())
10361                 kvm_load_guest_fpu(vcpu);
10362
10363         r = kvm_apic_accept_events(vcpu);
10364         if (r < 0)
10365                 goto out;
10366         r = 0;
10367
10368         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10369              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10370             vcpu->arch.pv.pv_unhalted)
10371                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10372         else
10373                 mp_state->mp_state = vcpu->arch.mp_state;
10374
10375 out:
10376         if (kvm_mpx_supported())
10377                 kvm_put_guest_fpu(vcpu);
10378         vcpu_put(vcpu);
10379         return r;
10380 }
10381
10382 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10383                                     struct kvm_mp_state *mp_state)
10384 {
10385         int ret = -EINVAL;
10386
10387         vcpu_load(vcpu);
10388
10389         if (!lapic_in_kernel(vcpu) &&
10390             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10391                 goto out;
10392
10393         /*
10394          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10395          * INIT state; latched init should be reported using
10396          * KVM_SET_VCPU_EVENTS, so reject it here.
10397          */
10398         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10399             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10400              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10401                 goto out;
10402
10403         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10404                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10405                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10406         } else
10407                 vcpu->arch.mp_state = mp_state->mp_state;
10408         kvm_make_request(KVM_REQ_EVENT, vcpu);
10409
10410         ret = 0;
10411 out:
10412         vcpu_put(vcpu);
10413         return ret;
10414 }
10415
10416 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10417                     int reason, bool has_error_code, u32 error_code)
10418 {
10419         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10420         int ret;
10421
10422         init_emulate_ctxt(vcpu);
10423
10424         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10425                                    has_error_code, error_code);
10426         if (ret) {
10427                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10428                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10429                 vcpu->run->internal.ndata = 0;
10430                 return 0;
10431         }
10432
10433         kvm_rip_write(vcpu, ctxt->eip);
10434         kvm_set_rflags(vcpu, ctxt->eflags);
10435         return 1;
10436 }
10437 EXPORT_SYMBOL_GPL(kvm_task_switch);
10438
10439 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10440 {
10441         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10442                 /*
10443                  * When EFER.LME and CR0.PG are set, the processor is in
10444                  * 64-bit mode (though maybe in a 32-bit code segment).
10445                  * CR4.PAE and EFER.LMA must be set.
10446                  */
10447                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10448                         return false;
10449                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10450                         return false;
10451         } else {
10452                 /*
10453                  * Not in 64-bit mode: EFER.LMA is clear and the code
10454                  * segment cannot be 64-bit.
10455                  */
10456                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10457                         return false;
10458         }
10459
10460         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10461 }
10462
10463 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10464                 int *mmu_reset_needed, bool update_pdptrs)
10465 {
10466         struct msr_data apic_base_msr;
10467         int idx;
10468         struct desc_ptr dt;
10469
10470         if (!kvm_is_valid_sregs(vcpu, sregs))
10471                 return -EINVAL;
10472
10473         apic_base_msr.data = sregs->apic_base;
10474         apic_base_msr.host_initiated = true;
10475         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10476                 return -EINVAL;
10477
10478         if (vcpu->arch.guest_state_protected)
10479                 return 0;
10480
10481         dt.size = sregs->idt.limit;
10482         dt.address = sregs->idt.base;
10483         static_call(kvm_x86_set_idt)(vcpu, &dt);
10484         dt.size = sregs->gdt.limit;
10485         dt.address = sregs->gdt.base;
10486         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10487
10488         vcpu->arch.cr2 = sregs->cr2;
10489         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10490         vcpu->arch.cr3 = sregs->cr3;
10491         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10492
10493         kvm_set_cr8(vcpu, sregs->cr8);
10494
10495         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10496         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10497
10498         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10499         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10500         vcpu->arch.cr0 = sregs->cr0;
10501
10502         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10503         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10504
10505         if (update_pdptrs) {
10506                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10507                 if (is_pae_paging(vcpu)) {
10508                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10509                         *mmu_reset_needed = 1;
10510                 }
10511                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10512         }
10513
10514         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10515         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10516         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10517         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10518         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10519         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10520
10521         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10522         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10523
10524         update_cr8_intercept(vcpu);
10525
10526         /* Older userspace won't unhalt the vcpu on reset. */
10527         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10528             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10529             !is_protmode(vcpu))
10530                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10531
10532         return 0;
10533 }
10534
10535 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10536 {
10537         int pending_vec, max_bits;
10538         int mmu_reset_needed = 0;
10539         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10540
10541         if (ret)
10542                 return ret;
10543
10544         if (mmu_reset_needed)
10545                 kvm_mmu_reset_context(vcpu);
10546
10547         max_bits = KVM_NR_INTERRUPTS;
10548         pending_vec = find_first_bit(
10549                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10550
10551         if (pending_vec < max_bits) {
10552                 kvm_queue_interrupt(vcpu, pending_vec, false);
10553                 pr_debug("Set back pending irq %d\n", pending_vec);
10554                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10555         }
10556         return 0;
10557 }
10558
10559 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10560 {
10561         int mmu_reset_needed = 0;
10562         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10563         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10564                 !(sregs2->efer & EFER_LMA);
10565         int i, ret;
10566
10567         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10568                 return -EINVAL;
10569
10570         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10571                 return -EINVAL;
10572
10573         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10574                                  &mmu_reset_needed, !valid_pdptrs);
10575         if (ret)
10576                 return ret;
10577
10578         if (valid_pdptrs) {
10579                 for (i = 0; i < 4 ; i++)
10580                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10581
10582                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10583                 mmu_reset_needed = 1;
10584                 vcpu->arch.pdptrs_from_userspace = true;
10585         }
10586         if (mmu_reset_needed)
10587                 kvm_mmu_reset_context(vcpu);
10588         return 0;
10589 }
10590
10591 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10592                                   struct kvm_sregs *sregs)
10593 {
10594         int ret;
10595
10596         vcpu_load(vcpu);
10597         ret = __set_sregs(vcpu, sregs);
10598         vcpu_put(vcpu);
10599         return ret;
10600 }
10601
10602 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10603                                         struct kvm_guest_debug *dbg)
10604 {
10605         unsigned long rflags;
10606         int i, r;
10607
10608         if (vcpu->arch.guest_state_protected)
10609                 return -EINVAL;
10610
10611         vcpu_load(vcpu);
10612
10613         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10614                 r = -EBUSY;
10615                 if (vcpu->arch.exception.pending)
10616                         goto out;
10617                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10618                         kvm_queue_exception(vcpu, DB_VECTOR);
10619                 else
10620                         kvm_queue_exception(vcpu, BP_VECTOR);
10621         }
10622
10623         /*
10624          * Read rflags as long as potentially injected trace flags are still
10625          * filtered out.
10626          */
10627         rflags = kvm_get_rflags(vcpu);
10628
10629         vcpu->guest_debug = dbg->control;
10630         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10631                 vcpu->guest_debug = 0;
10632
10633         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10634                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10635                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10636                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10637         } else {
10638                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10639                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10640         }
10641         kvm_update_dr7(vcpu);
10642
10643         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10644                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10645
10646         /*
10647          * Trigger an rflags update that will inject or remove the trace
10648          * flags.
10649          */
10650         kvm_set_rflags(vcpu, rflags);
10651
10652         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10653
10654         r = 0;
10655
10656 out:
10657         vcpu_put(vcpu);
10658         return r;
10659 }
10660
10661 /*
10662  * Translate a guest virtual address to a guest physical address.
10663  */
10664 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10665                                     struct kvm_translation *tr)
10666 {
10667         unsigned long vaddr = tr->linear_address;
10668         gpa_t gpa;
10669         int idx;
10670
10671         vcpu_load(vcpu);
10672
10673         idx = srcu_read_lock(&vcpu->kvm->srcu);
10674         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10675         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10676         tr->physical_address = gpa;
10677         tr->valid = gpa != UNMAPPED_GVA;
10678         tr->writeable = 1;
10679         tr->usermode = 0;
10680
10681         vcpu_put(vcpu);
10682         return 0;
10683 }
10684
10685 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10686 {
10687         struct fxregs_state *fxsave;
10688
10689         if (!vcpu->arch.guest_fpu)
10690                 return 0;
10691
10692         vcpu_load(vcpu);
10693
10694         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10695         memcpy(fpu->fpr, fxsave->st_space, 128);
10696         fpu->fcw = fxsave->cwd;
10697         fpu->fsw = fxsave->swd;
10698         fpu->ftwx = fxsave->twd;
10699         fpu->last_opcode = fxsave->fop;
10700         fpu->last_ip = fxsave->rip;
10701         fpu->last_dp = fxsave->rdp;
10702         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10703
10704         vcpu_put(vcpu);
10705         return 0;
10706 }
10707
10708 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10709 {
10710         struct fxregs_state *fxsave;
10711
10712         if (!vcpu->arch.guest_fpu)
10713                 return 0;
10714
10715         vcpu_load(vcpu);
10716
10717         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10718
10719         memcpy(fxsave->st_space, fpu->fpr, 128);
10720         fxsave->cwd = fpu->fcw;
10721         fxsave->swd = fpu->fsw;
10722         fxsave->twd = fpu->ftwx;
10723         fxsave->fop = fpu->last_opcode;
10724         fxsave->rip = fpu->last_ip;
10725         fxsave->rdp = fpu->last_dp;
10726         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10727
10728         vcpu_put(vcpu);
10729         return 0;
10730 }
10731
10732 static void store_regs(struct kvm_vcpu *vcpu)
10733 {
10734         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10735
10736         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10737                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10738
10739         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10740                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10741
10742         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10743                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10744                                 vcpu, &vcpu->run->s.regs.events);
10745 }
10746
10747 static int sync_regs(struct kvm_vcpu *vcpu)
10748 {
10749         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10750                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10751                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10752         }
10753         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10754                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10755                         return -EINVAL;
10756                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10757         }
10758         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10759                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10760                                 vcpu, &vcpu->run->s.regs.events))
10761                         return -EINVAL;
10762                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10763         }
10764
10765         return 0;
10766 }
10767
10768 static void fx_init(struct kvm_vcpu *vcpu)
10769 {
10770         if (!vcpu->arch.guest_fpu)
10771                 return;
10772
10773         fpstate_init(&vcpu->arch.guest_fpu->state);
10774         if (boot_cpu_has(X86_FEATURE_XSAVES))
10775                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10776                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10777
10778         /*
10779          * Ensure guest xcr0 is valid for loading
10780          */
10781         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10782
10783         vcpu->arch.cr0 |= X86_CR0_ET;
10784 }
10785
10786 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10787 {
10788         if (vcpu->arch.guest_fpu) {
10789                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10790                 vcpu->arch.guest_fpu = NULL;
10791         }
10792 }
10793 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10794
10795 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10796 {
10797         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10798                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10799                              "guest TSC will not be reliable\n");
10800
10801         return 0;
10802 }
10803
10804 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10805 {
10806         struct page *page;
10807         int r;
10808
10809         vcpu->arch.last_vmentry_cpu = -1;
10810         vcpu->arch.regs_avail = ~0;
10811         vcpu->arch.regs_dirty = ~0;
10812
10813         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10814                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10815         else
10816                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10817
10818         r = kvm_mmu_create(vcpu);
10819         if (r < 0)
10820                 return r;
10821
10822         if (irqchip_in_kernel(vcpu->kvm)) {
10823                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10824                 if (r < 0)
10825                         goto fail_mmu_destroy;
10826
10827                 /*
10828                  * Defer evaluating inhibits until the vCPU is first run, as
10829                  * this vCPU will not get notified of any changes until this
10830                  * vCPU is visible to other vCPUs (marked online and added to
10831                  * the set of vCPUs).  Opportunistically mark APICv active as
10832                  * VMX in particularly is highly unlikely to have inhibits.
10833                  * Ignore the current per-VM APICv state so that vCPU creation
10834                  * is guaranteed to run with a deterministic value, the request
10835                  * will ensure the vCPU gets the correct state before VM-Entry.
10836                  */
10837                 if (enable_apicv) {
10838                         vcpu->arch.apicv_active = true;
10839                         kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
10840                 }
10841         } else
10842                 static_branch_inc(&kvm_has_noapic_vcpu);
10843
10844         r = -ENOMEM;
10845
10846         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10847         if (!page)
10848                 goto fail_free_lapic;
10849         vcpu->arch.pio_data = page_address(page);
10850
10851         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10852                                        GFP_KERNEL_ACCOUNT);
10853         if (!vcpu->arch.mce_banks)
10854                 goto fail_free_pio_data;
10855         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10856
10857         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10858                                 GFP_KERNEL_ACCOUNT))
10859                 goto fail_free_mce_banks;
10860
10861         if (!alloc_emulate_ctxt(vcpu))
10862                 goto free_wbinvd_dirty_mask;
10863
10864         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10865                                                 GFP_KERNEL_ACCOUNT);
10866         if (!vcpu->arch.user_fpu) {
10867                 pr_err("kvm: failed to allocate userspace's fpu\n");
10868                 goto free_emulate_ctxt;
10869         }
10870
10871         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10872                                                  GFP_KERNEL_ACCOUNT);
10873         if (!vcpu->arch.guest_fpu) {
10874                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10875                 goto free_user_fpu;
10876         }
10877         fx_init(vcpu);
10878
10879         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10880         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10881
10882         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10883
10884         kvm_async_pf_hash_reset(vcpu);
10885         kvm_pmu_init(vcpu);
10886
10887         vcpu->arch.pending_external_vector = -1;
10888         vcpu->arch.preempted_in_kernel = false;
10889
10890 #if IS_ENABLED(CONFIG_HYPERV)
10891         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10892 #endif
10893
10894         r = static_call(kvm_x86_vcpu_create)(vcpu);
10895         if (r)
10896                 goto free_guest_fpu;
10897
10898         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10899         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10900         kvm_vcpu_mtrr_init(vcpu);
10901         vcpu_load(vcpu);
10902         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10903         kvm_vcpu_reset(vcpu, false);
10904         kvm_init_mmu(vcpu);
10905         vcpu_put(vcpu);
10906         return 0;
10907
10908 free_guest_fpu:
10909         kvm_free_guest_fpu(vcpu);
10910 free_user_fpu:
10911         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10912 free_emulate_ctxt:
10913         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10914 free_wbinvd_dirty_mask:
10915         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10916 fail_free_mce_banks:
10917         kfree(vcpu->arch.mce_banks);
10918 fail_free_pio_data:
10919         free_page((unsigned long)vcpu->arch.pio_data);
10920 fail_free_lapic:
10921         kvm_free_lapic(vcpu);
10922 fail_mmu_destroy:
10923         kvm_mmu_destroy(vcpu);
10924         return r;
10925 }
10926
10927 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10928 {
10929         struct kvm *kvm = vcpu->kvm;
10930
10931         if (mutex_lock_killable(&vcpu->mutex))
10932                 return;
10933         vcpu_load(vcpu);
10934         kvm_synchronize_tsc(vcpu, 0);
10935         vcpu_put(vcpu);
10936
10937         /* poll control enabled by default */
10938         vcpu->arch.msr_kvm_poll_control = 1;
10939
10940         mutex_unlock(&vcpu->mutex);
10941
10942         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10943                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10944                                                 KVMCLOCK_SYNC_PERIOD);
10945 }
10946
10947 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10948 {
10949         int idx;
10950
10951         kvmclock_reset(vcpu);
10952
10953         static_call(kvm_x86_vcpu_free)(vcpu);
10954
10955         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10956         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10957         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10958         kvm_free_guest_fpu(vcpu);
10959
10960         kvm_hv_vcpu_uninit(vcpu);
10961         kvm_pmu_destroy(vcpu);
10962         kfree(vcpu->arch.mce_banks);
10963         kvm_free_lapic(vcpu);
10964         idx = srcu_read_lock(&vcpu->kvm->srcu);
10965         kvm_mmu_destroy(vcpu);
10966         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10967         free_page((unsigned long)vcpu->arch.pio_data);
10968         kvfree(vcpu->arch.cpuid_entries);
10969         if (!lapic_in_kernel(vcpu))
10970                 static_branch_dec(&kvm_has_noapic_vcpu);
10971 }
10972
10973 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10974 {
10975         unsigned long old_cr0 = kvm_read_cr0(vcpu);
10976         unsigned long new_cr0;
10977         u32 eax, dummy;
10978
10979         kvm_lapic_reset(vcpu, init_event);
10980
10981         vcpu->arch.hflags = 0;
10982
10983         vcpu->arch.smi_pending = 0;
10984         vcpu->arch.smi_count = 0;
10985         atomic_set(&vcpu->arch.nmi_queued, 0);
10986         vcpu->arch.nmi_pending = 0;
10987         vcpu->arch.nmi_injected = false;
10988         kvm_clear_interrupt_queue(vcpu);
10989         kvm_clear_exception_queue(vcpu);
10990
10991         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10992         kvm_update_dr0123(vcpu);
10993         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10994         vcpu->arch.dr7 = DR7_FIXED_1;
10995         kvm_update_dr7(vcpu);
10996
10997         vcpu->arch.cr2 = 0;
10998
10999         kvm_make_request(KVM_REQ_EVENT, vcpu);
11000         vcpu->arch.apf.msr_en_val = 0;
11001         vcpu->arch.apf.msr_int_val = 0;
11002         vcpu->arch.st.msr_val = 0;
11003
11004         kvmclock_reset(vcpu);
11005
11006         kvm_clear_async_pf_completion_queue(vcpu);
11007         kvm_async_pf_hash_reset(vcpu);
11008         vcpu->arch.apf.halted = false;
11009
11010         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
11011                 void *mpx_state_buffer;
11012
11013                 /*
11014                  * To avoid have the INIT path from kvm_apic_has_events() that be
11015                  * called with loaded FPU and does not let userspace fix the state.
11016                  */
11017                 if (init_event)
11018                         kvm_put_guest_fpu(vcpu);
11019                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11020                                         XFEATURE_BNDREGS);
11021                 if (mpx_state_buffer)
11022                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
11023                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11024                                         XFEATURE_BNDCSR);
11025                 if (mpx_state_buffer)
11026                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
11027                 if (init_event)
11028                         kvm_load_guest_fpu(vcpu);
11029         }
11030
11031         if (!init_event) {
11032                 kvm_pmu_reset(vcpu);
11033                 vcpu->arch.smbase = 0x30000;
11034
11035                 vcpu->arch.msr_misc_features_enables = 0;
11036
11037                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11038                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11039         }
11040
11041         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11042         vcpu->arch.regs_avail = ~0;
11043         vcpu->arch.regs_dirty = ~0;
11044
11045         /*
11046          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11047          * if no CPUID match is found.  Note, it's impossible to get a match at
11048          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11049          * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
11050          * But, go through the motions in case that's ever remedied.
11051          */
11052         eax = 1;
11053         if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
11054                 eax = 0x600;
11055         kvm_rdx_write(vcpu, eax);
11056
11057         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11058
11059         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11060         kvm_rip_write(vcpu, 0xfff0);
11061
11062         vcpu->arch.cr3 = 0;
11063         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11064
11065         /*
11066          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11067          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11068          * (or qualify) that with a footnote stating that CD/NW are preserved.
11069          */
11070         new_cr0 = X86_CR0_ET;
11071         if (init_event)
11072                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11073         else
11074                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11075
11076         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11077         static_call(kvm_x86_set_cr4)(vcpu, 0);
11078         static_call(kvm_x86_set_efer)(vcpu, 0);
11079         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11080
11081         /*
11082          * Reset the MMU context if paging was enabled prior to INIT (which is
11083          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11084          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11085          * checked because it is unconditionally cleared on INIT and all other
11086          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11087          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11088          */
11089         if (old_cr0 & X86_CR0_PG)
11090                 kvm_mmu_reset_context(vcpu);
11091
11092         /*
11093          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11094          * APM states the TLBs are untouched by INIT, but it also states that
11095          * the TLBs are flushed on "External initialization of the processor."
11096          * Flush the guest TLB regardless of vendor, there is no meaningful
11097          * benefit in relying on the guest to flush the TLB immediately after
11098          * INIT.  A spurious TLB flush is benign and likely negligible from a
11099          * performance perspective.
11100          */
11101         if (init_event)
11102                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11103 }
11104 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11105
11106 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11107 {
11108         struct kvm_segment cs;
11109
11110         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11111         cs.selector = vector << 8;
11112         cs.base = vector << 12;
11113         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11114         kvm_rip_write(vcpu, 0);
11115 }
11116 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11117
11118 int kvm_arch_hardware_enable(void)
11119 {
11120         struct kvm *kvm;
11121         struct kvm_vcpu *vcpu;
11122         int i;
11123         int ret;
11124         u64 local_tsc;
11125         u64 max_tsc = 0;
11126         bool stable, backwards_tsc = false;
11127
11128         kvm_user_return_msr_cpu_online();
11129         ret = static_call(kvm_x86_hardware_enable)();
11130         if (ret != 0)
11131                 return ret;
11132
11133         local_tsc = rdtsc();
11134         stable = !kvm_check_tsc_unstable();
11135         list_for_each_entry(kvm, &vm_list, vm_list) {
11136                 kvm_for_each_vcpu(i, vcpu, kvm) {
11137                         if (!stable && vcpu->cpu == smp_processor_id())
11138                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11139                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11140                                 backwards_tsc = true;
11141                                 if (vcpu->arch.last_host_tsc > max_tsc)
11142                                         max_tsc = vcpu->arch.last_host_tsc;
11143                         }
11144                 }
11145         }
11146
11147         /*
11148          * Sometimes, even reliable TSCs go backwards.  This happens on
11149          * platforms that reset TSC during suspend or hibernate actions, but
11150          * maintain synchronization.  We must compensate.  Fortunately, we can
11151          * detect that condition here, which happens early in CPU bringup,
11152          * before any KVM threads can be running.  Unfortunately, we can't
11153          * bring the TSCs fully up to date with real time, as we aren't yet far
11154          * enough into CPU bringup that we know how much real time has actually
11155          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11156          * variables that haven't been updated yet.
11157          *
11158          * So we simply find the maximum observed TSC above, then record the
11159          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11160          * the adjustment will be applied.  Note that we accumulate
11161          * adjustments, in case multiple suspend cycles happen before some VCPU
11162          * gets a chance to run again.  In the event that no KVM threads get a
11163          * chance to run, we will miss the entire elapsed period, as we'll have
11164          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11165          * loose cycle time.  This isn't too big a deal, since the loss will be
11166          * uniform across all VCPUs (not to mention the scenario is extremely
11167          * unlikely). It is possible that a second hibernate recovery happens
11168          * much faster than a first, causing the observed TSC here to be
11169          * smaller; this would require additional padding adjustment, which is
11170          * why we set last_host_tsc to the local tsc observed here.
11171          *
11172          * N.B. - this code below runs only on platforms with reliable TSC,
11173          * as that is the only way backwards_tsc is set above.  Also note
11174          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11175          * have the same delta_cyc adjustment applied if backwards_tsc
11176          * is detected.  Note further, this adjustment is only done once,
11177          * as we reset last_host_tsc on all VCPUs to stop this from being
11178          * called multiple times (one for each physical CPU bringup).
11179          *
11180          * Platforms with unreliable TSCs don't have to deal with this, they
11181          * will be compensated by the logic in vcpu_load, which sets the TSC to
11182          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11183          * guarantee that they stay in perfect synchronization.
11184          */
11185         if (backwards_tsc) {
11186                 u64 delta_cyc = max_tsc - local_tsc;
11187                 list_for_each_entry(kvm, &vm_list, vm_list) {
11188                         kvm->arch.backwards_tsc_observed = true;
11189                         kvm_for_each_vcpu(i, vcpu, kvm) {
11190                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11191                                 vcpu->arch.last_host_tsc = local_tsc;
11192                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11193                         }
11194
11195                         /*
11196                          * We have to disable TSC offset matching.. if you were
11197                          * booting a VM while issuing an S4 host suspend....
11198                          * you may have some problem.  Solving this issue is
11199                          * left as an exercise to the reader.
11200                          */
11201                         kvm->arch.last_tsc_nsec = 0;
11202                         kvm->arch.last_tsc_write = 0;
11203                 }
11204
11205         }
11206         return 0;
11207 }
11208
11209 void kvm_arch_hardware_disable(void)
11210 {
11211         static_call(kvm_x86_hardware_disable)();
11212         drop_user_return_notifiers();
11213 }
11214
11215 int kvm_arch_hardware_setup(void *opaque)
11216 {
11217         struct kvm_x86_init_ops *ops = opaque;
11218         int r;
11219
11220         rdmsrl_safe(MSR_EFER, &host_efer);
11221
11222         if (boot_cpu_has(X86_FEATURE_XSAVES))
11223                 rdmsrl(MSR_IA32_XSS, host_xss);
11224
11225         r = ops->hardware_setup();
11226         if (r != 0)
11227                 return r;
11228
11229         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11230         kvm_ops_static_call_update();
11231
11232         if (ops->intel_pt_intr_in_guest && ops->intel_pt_intr_in_guest())
11233                 kvm_guest_cbs.handle_intel_pt_intr = kvm_handle_intel_pt_intr;
11234         perf_register_guest_info_callbacks(&kvm_guest_cbs);
11235
11236         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11237                 supported_xss = 0;
11238
11239 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11240         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11241 #undef __kvm_cpu_cap_has
11242
11243         if (kvm_has_tsc_control) {
11244                 /*
11245                  * Make sure the user can only configure tsc_khz values that
11246                  * fit into a signed integer.
11247                  * A min value is not calculated because it will always
11248                  * be 1 on all machines.
11249                  */
11250                 u64 max = min(0x7fffffffULL,
11251                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11252                 kvm_max_guest_tsc_khz = max;
11253
11254                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11255         }
11256
11257         kvm_init_msr_list();
11258         return 0;
11259 }
11260
11261 void kvm_arch_hardware_unsetup(void)
11262 {
11263         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
11264         kvm_guest_cbs.handle_intel_pt_intr = NULL;
11265
11266         static_call(kvm_x86_hardware_unsetup)();
11267 }
11268
11269 int kvm_arch_check_processor_compat(void *opaque)
11270 {
11271         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11272         struct kvm_x86_init_ops *ops = opaque;
11273
11274         WARN_ON(!irqs_disabled());
11275
11276         if (__cr4_reserved_bits(cpu_has, c) !=
11277             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11278                 return -EIO;
11279
11280         return ops->check_processor_compatibility();
11281 }
11282
11283 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11284 {
11285         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11286 }
11287 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11288
11289 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11290 {
11291         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11292 }
11293
11294 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11295 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11296
11297 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11298 {
11299         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11300
11301         vcpu->arch.l1tf_flush_l1d = true;
11302         if (pmu->version && unlikely(pmu->event_count)) {
11303                 pmu->need_cleanup = true;
11304                 kvm_make_request(KVM_REQ_PMU, vcpu);
11305         }
11306         static_call(kvm_x86_sched_in)(vcpu, cpu);
11307 }
11308
11309 void kvm_arch_free_vm(struct kvm *kvm)
11310 {
11311         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11312         vfree(kvm);
11313 }
11314
11315
11316 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11317 {
11318         int ret;
11319
11320         if (type)
11321                 return -EINVAL;
11322
11323         ret = kvm_page_track_init(kvm);
11324         if (ret)
11325                 return ret;
11326
11327         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11328         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11329         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11330         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11331         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11332         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11333
11334         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11335         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11336         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11337         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11338                 &kvm->arch.irq_sources_bitmap);
11339
11340         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11341         mutex_init(&kvm->arch.apic_map_lock);
11342         raw_spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11343
11344         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11345         pvclock_update_vm_gtod_copy(kvm);
11346
11347         kvm->arch.guest_can_read_msr_platform_info = true;
11348
11349 #if IS_ENABLED(CONFIG_HYPERV)
11350         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11351         kvm->arch.hv_root_tdp = INVALID_PAGE;
11352 #endif
11353
11354         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11355         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11356
11357         kvm_apicv_init(kvm);
11358         kvm_hv_init_vm(kvm);
11359         kvm_mmu_init_vm(kvm);
11360         kvm_xen_init_vm(kvm);
11361
11362         return static_call(kvm_x86_vm_init)(kvm);
11363 }
11364
11365 int kvm_arch_post_init_vm(struct kvm *kvm)
11366 {
11367         return kvm_mmu_post_init_vm(kvm);
11368 }
11369
11370 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11371 {
11372         vcpu_load(vcpu);
11373         kvm_mmu_unload(vcpu);
11374         vcpu_put(vcpu);
11375 }
11376
11377 static void kvm_free_vcpus(struct kvm *kvm)
11378 {
11379         unsigned int i;
11380         struct kvm_vcpu *vcpu;
11381
11382         /*
11383          * Unpin any mmu pages first.
11384          */
11385         kvm_for_each_vcpu(i, vcpu, kvm) {
11386                 kvm_clear_async_pf_completion_queue(vcpu);
11387                 kvm_unload_vcpu_mmu(vcpu);
11388         }
11389         kvm_for_each_vcpu(i, vcpu, kvm)
11390                 kvm_vcpu_destroy(vcpu);
11391
11392         mutex_lock(&kvm->lock);
11393         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11394                 kvm->vcpus[i] = NULL;
11395
11396         atomic_set(&kvm->online_vcpus, 0);
11397         mutex_unlock(&kvm->lock);
11398 }
11399
11400 void kvm_arch_sync_events(struct kvm *kvm)
11401 {
11402         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11403         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11404         kvm_free_pit(kvm);
11405 }
11406
11407 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11408
11409 /**
11410  * __x86_set_memory_region: Setup KVM internal memory slot
11411  *
11412  * @kvm: the kvm pointer to the VM.
11413  * @id: the slot ID to setup.
11414  * @gpa: the GPA to install the slot (unused when @size == 0).
11415  * @size: the size of the slot. Set to zero to uninstall a slot.
11416  *
11417  * This function helps to setup a KVM internal memory slot.  Specify
11418  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11419  * slot.  The return code can be one of the following:
11420  *
11421  *   HVA:           on success (uninstall will return a bogus HVA)
11422  *   -errno:        on error
11423  *
11424  * The caller should always use IS_ERR() to check the return value
11425  * before use.  Note, the KVM internal memory slots are guaranteed to
11426  * remain valid and unchanged until the VM is destroyed, i.e., the
11427  * GPA->HVA translation will not change.  However, the HVA is a user
11428  * address, i.e. its accessibility is not guaranteed, and must be
11429  * accessed via __copy_{to,from}_user().
11430  */
11431 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11432                                       u32 size)
11433 {
11434         int i, r;
11435         unsigned long hva, old_npages;
11436         struct kvm_memslots *slots = kvm_memslots(kvm);
11437         struct kvm_memory_slot *slot;
11438
11439         /* Called with kvm->slots_lock held.  */
11440         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11441                 return ERR_PTR_USR(-EINVAL);
11442
11443         slot = id_to_memslot(slots, id);
11444         if (size) {
11445                 if (slot && slot->npages)
11446                         return ERR_PTR_USR(-EEXIST);
11447
11448                 /*
11449                  * MAP_SHARED to prevent internal slot pages from being moved
11450                  * by fork()/COW.
11451                  */
11452                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11453                               MAP_SHARED | MAP_ANONYMOUS, 0);
11454                 if (IS_ERR((void *)hva))
11455                         return (void __user *)hva;
11456         } else {
11457                 if (!slot || !slot->npages)
11458                         return NULL;
11459
11460                 old_npages = slot->npages;
11461                 hva = slot->userspace_addr;
11462         }
11463
11464         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11465                 struct kvm_userspace_memory_region m;
11466
11467                 m.slot = id | (i << 16);
11468                 m.flags = 0;
11469                 m.guest_phys_addr = gpa;
11470                 m.userspace_addr = hva;
11471                 m.memory_size = size;
11472                 r = __kvm_set_memory_region(kvm, &m);
11473                 if (r < 0)
11474                         return ERR_PTR_USR(r);
11475         }
11476
11477         if (!size)
11478                 vm_munmap(hva, old_npages * PAGE_SIZE);
11479
11480         return (void __user *)hva;
11481 }
11482 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11483
11484 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11485 {
11486         kvm_mmu_pre_destroy_vm(kvm);
11487 }
11488
11489 void kvm_arch_destroy_vm(struct kvm *kvm)
11490 {
11491         if (current->mm == kvm->mm) {
11492                 /*
11493                  * Free memory regions allocated on behalf of userspace,
11494                  * unless the the memory map has changed due to process exit
11495                  * or fd copying.
11496                  */
11497                 mutex_lock(&kvm->slots_lock);
11498                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11499                                         0, 0);
11500                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11501                                         0, 0);
11502                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11503                 mutex_unlock(&kvm->slots_lock);
11504         }
11505         static_call_cond(kvm_x86_vm_destroy)(kvm);
11506         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11507         kvm_pic_destroy(kvm);
11508         kvm_ioapic_destroy(kvm);
11509         kvm_free_vcpus(kvm);
11510         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11511         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11512         kvm_mmu_uninit_vm(kvm);
11513         kvm_page_track_cleanup(kvm);
11514         kvm_xen_destroy_vm(kvm);
11515         kvm_hv_destroy_vm(kvm);
11516 }
11517
11518 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11519 {
11520         int i;
11521
11522         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11523                 kvfree(slot->arch.rmap[i]);
11524                 slot->arch.rmap[i] = NULL;
11525         }
11526 }
11527
11528 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11529 {
11530         int i;
11531
11532         memslot_rmap_free(slot);
11533
11534         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11535                 kvfree(slot->arch.lpage_info[i - 1]);
11536                 slot->arch.lpage_info[i - 1] = NULL;
11537         }
11538
11539         kvm_page_track_free_memslot(slot);
11540 }
11541
11542 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11543                               unsigned long npages)
11544 {
11545         const int sz = sizeof(*slot->arch.rmap[0]);
11546         int i;
11547
11548         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11549                 int level = i + 1;
11550                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11551
11552                 if (slot->arch.rmap[i])
11553                         continue;
11554
11555                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11556                 if (!slot->arch.rmap[i]) {
11557                         memslot_rmap_free(slot);
11558                         return -ENOMEM;
11559                 }
11560         }
11561
11562         return 0;
11563 }
11564
11565 int alloc_all_memslots_rmaps(struct kvm *kvm)
11566 {
11567         struct kvm_memslots *slots;
11568         struct kvm_memory_slot *slot;
11569         int r, i;
11570
11571         /*
11572          * Check if memslots alreday have rmaps early before acquiring
11573          * the slots_arch_lock below.
11574          */
11575         if (kvm_memslots_have_rmaps(kvm))
11576                 return 0;
11577
11578         mutex_lock(&kvm->slots_arch_lock);
11579
11580         /*
11581          * Read memslots_have_rmaps again, under the slots arch lock,
11582          * before allocating the rmaps
11583          */
11584         if (kvm_memslots_have_rmaps(kvm)) {
11585                 mutex_unlock(&kvm->slots_arch_lock);
11586                 return 0;
11587         }
11588
11589         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11590                 slots = __kvm_memslots(kvm, i);
11591                 kvm_for_each_memslot(slot, slots) {
11592                         r = memslot_rmap_alloc(slot, slot->npages);
11593                         if (r) {
11594                                 mutex_unlock(&kvm->slots_arch_lock);
11595                                 return r;
11596                         }
11597                 }
11598         }
11599
11600         /*
11601          * Ensure that memslots_have_rmaps becomes true strictly after
11602          * all the rmap pointers are set.
11603          */
11604         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11605         mutex_unlock(&kvm->slots_arch_lock);
11606         return 0;
11607 }
11608
11609 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11610                                       struct kvm_memory_slot *slot,
11611                                       unsigned long npages)
11612 {
11613         int i, r;
11614
11615         /*
11616          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11617          * old arrays will be freed by __kvm_set_memory_region() if installing
11618          * the new memslot is successful.
11619          */
11620         memset(&slot->arch, 0, sizeof(slot->arch));
11621
11622         if (kvm_memslots_have_rmaps(kvm)) {
11623                 r = memslot_rmap_alloc(slot, npages);
11624                 if (r)
11625                         return r;
11626         }
11627
11628         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11629                 struct kvm_lpage_info *linfo;
11630                 unsigned long ugfn;
11631                 int lpages;
11632                 int level = i + 1;
11633
11634                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11635
11636                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11637                 if (!linfo)
11638                         goto out_free;
11639
11640                 slot->arch.lpage_info[i - 1] = linfo;
11641
11642                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11643                         linfo[0].disallow_lpage = 1;
11644                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11645                         linfo[lpages - 1].disallow_lpage = 1;
11646                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11647                 /*
11648                  * If the gfn and userspace address are not aligned wrt each
11649                  * other, disable large page support for this slot.
11650                  */
11651                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11652                         unsigned long j;
11653
11654                         for (j = 0; j < lpages; ++j)
11655                                 linfo[j].disallow_lpage = 1;
11656                 }
11657         }
11658
11659         if (kvm_page_track_create_memslot(slot, npages))
11660                 goto out_free;
11661
11662         return 0;
11663
11664 out_free:
11665         memslot_rmap_free(slot);
11666
11667         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11668                 kvfree(slot->arch.lpage_info[i - 1]);
11669                 slot->arch.lpage_info[i - 1] = NULL;
11670         }
11671         return -ENOMEM;
11672 }
11673
11674 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11675 {
11676         struct kvm_vcpu *vcpu;
11677         int i;
11678
11679         /*
11680          * memslots->generation has been incremented.
11681          * mmio generation may have reached its maximum value.
11682          */
11683         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11684
11685         /* Force re-initialization of steal_time cache */
11686         kvm_for_each_vcpu(i, vcpu, kvm)
11687                 kvm_vcpu_kick(vcpu);
11688 }
11689
11690 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11691                                 struct kvm_memory_slot *memslot,
11692                                 const struct kvm_userspace_memory_region *mem,
11693                                 enum kvm_mr_change change)
11694 {
11695         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11696                 return kvm_alloc_memslot_metadata(kvm, memslot,
11697                                                   mem->memory_size >> PAGE_SHIFT);
11698         return 0;
11699 }
11700
11701
11702 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11703 {
11704         struct kvm_arch *ka = &kvm->arch;
11705
11706         if (!kvm_x86_ops.cpu_dirty_log_size)
11707                 return;
11708
11709         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11710             (!enable && --ka->cpu_dirty_logging_count == 0))
11711                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11712
11713         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11714 }
11715
11716 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11717                                      struct kvm_memory_slot *old,
11718                                      const struct kvm_memory_slot *new,
11719                                      enum kvm_mr_change change)
11720 {
11721         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11722
11723         /*
11724          * Update CPU dirty logging if dirty logging is being toggled.  This
11725          * applies to all operations.
11726          */
11727         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11728                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11729
11730         /*
11731          * Nothing more to do for RO slots (which can't be dirtied and can't be
11732          * made writable) or CREATE/MOVE/DELETE of a slot.
11733          *
11734          * For a memslot with dirty logging disabled:
11735          * CREATE:      No dirty mappings will already exist.
11736          * MOVE/DELETE: The old mappings will already have been cleaned up by
11737          *              kvm_arch_flush_shadow_memslot()
11738          *
11739          * For a memslot with dirty logging enabled:
11740          * CREATE:      No shadow pages exist, thus nothing to write-protect
11741          *              and no dirty bits to clear.
11742          * MOVE/DELETE: The old mappings will already have been cleaned up by
11743          *              kvm_arch_flush_shadow_memslot().
11744          */
11745         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11746                 return;
11747
11748         /*
11749          * READONLY and non-flags changes were filtered out above, and the only
11750          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11751          * logging isn't being toggled on or off.
11752          */
11753         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11754                 return;
11755
11756         if (!log_dirty_pages) {
11757                 /*
11758                  * Dirty logging tracks sptes in 4k granularity, meaning that
11759                  * large sptes have to be split.  If live migration succeeds,
11760                  * the guest in the source machine will be destroyed and large
11761                  * sptes will be created in the destination.  However, if the
11762                  * guest continues to run in the source machine (for example if
11763                  * live migration fails), small sptes will remain around and
11764                  * cause bad performance.
11765                  *
11766                  * Scan sptes if dirty logging has been stopped, dropping those
11767                  * which can be collapsed into a single large-page spte.  Later
11768                  * page faults will create the large-page sptes.
11769                  */
11770                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11771         } else {
11772                 /*
11773                  * Initially-all-set does not require write protecting any page,
11774                  * because they're all assumed to be dirty.
11775                  */
11776                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11777                         return;
11778
11779                 if (kvm_x86_ops.cpu_dirty_log_size) {
11780                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11781                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11782                 } else {
11783                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11784                 }
11785         }
11786 }
11787
11788 void kvm_arch_commit_memory_region(struct kvm *kvm,
11789                                 const struct kvm_userspace_memory_region *mem,
11790                                 struct kvm_memory_slot *old,
11791                                 const struct kvm_memory_slot *new,
11792                                 enum kvm_mr_change change)
11793 {
11794         if (!kvm->arch.n_requested_mmu_pages)
11795                 kvm_mmu_change_mmu_pages(kvm,
11796                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11797
11798         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11799
11800         /* Free the arrays associated with the old memslot. */
11801         if (change == KVM_MR_MOVE)
11802                 kvm_arch_free_memslot(kvm, old);
11803 }
11804
11805 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11806 {
11807         kvm_mmu_zap_all(kvm);
11808 }
11809
11810 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11811                                    struct kvm_memory_slot *slot)
11812 {
11813         kvm_page_track_flush_slot(kvm, slot);
11814 }
11815
11816 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11817 {
11818         return (is_guest_mode(vcpu) &&
11819                         kvm_x86_ops.guest_apic_has_interrupt &&
11820                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11821 }
11822
11823 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11824 {
11825         if (!list_empty_careful(&vcpu->async_pf.done))
11826                 return true;
11827
11828         if (kvm_apic_has_events(vcpu))
11829                 return true;
11830
11831         if (vcpu->arch.pv.pv_unhalted)
11832                 return true;
11833
11834         if (vcpu->arch.exception.pending)
11835                 return true;
11836
11837         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11838             (vcpu->arch.nmi_pending &&
11839              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11840                 return true;
11841
11842         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11843             (vcpu->arch.smi_pending &&
11844              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11845                 return true;
11846
11847         if (kvm_arch_interrupt_allowed(vcpu) &&
11848             (kvm_cpu_has_interrupt(vcpu) ||
11849             kvm_guest_apic_has_interrupt(vcpu)))
11850                 return true;
11851
11852         if (kvm_hv_has_stimer_pending(vcpu))
11853                 return true;
11854
11855         if (is_guest_mode(vcpu) &&
11856             kvm_x86_ops.nested_ops->hv_timer_pending &&
11857             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11858                 return true;
11859
11860         return false;
11861 }
11862
11863 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11864 {
11865         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11866 }
11867
11868 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11869 {
11870         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11871                 return true;
11872
11873         return false;
11874 }
11875
11876 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11877 {
11878         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11879                 return true;
11880
11881         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11882                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11883                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11884                 return true;
11885
11886         return kvm_arch_dy_has_pending_interrupt(vcpu);
11887 }
11888
11889 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11890 {
11891         if (vcpu->arch.guest_state_protected)
11892                 return true;
11893
11894         return vcpu->arch.preempted_in_kernel;
11895 }
11896
11897 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11898 {
11899         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11900 }
11901
11902 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11903 {
11904         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11905 }
11906
11907 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11908 {
11909         /* Can't read the RIP when guest state is protected, just return 0 */
11910         if (vcpu->arch.guest_state_protected)
11911                 return 0;
11912
11913         if (is_64_bit_mode(vcpu))
11914                 return kvm_rip_read(vcpu);
11915         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11916                      kvm_rip_read(vcpu));
11917 }
11918 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11919
11920 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11921 {
11922         return kvm_get_linear_rip(vcpu) == linear_rip;
11923 }
11924 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11925
11926 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11927 {
11928         unsigned long rflags;
11929
11930         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11931         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11932                 rflags &= ~X86_EFLAGS_TF;
11933         return rflags;
11934 }
11935 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11936
11937 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11938 {
11939         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11940             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11941                 rflags |= X86_EFLAGS_TF;
11942         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11943 }
11944
11945 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11946 {
11947         __kvm_set_rflags(vcpu, rflags);
11948         kvm_make_request(KVM_REQ_EVENT, vcpu);
11949 }
11950 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11951
11952 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11953 {
11954         int r;
11955
11956         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11957               work->wakeup_all)
11958                 return;
11959
11960         r = kvm_mmu_reload(vcpu);
11961         if (unlikely(r))
11962                 return;
11963
11964         if (!vcpu->arch.mmu->direct_map &&
11965               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11966                 return;
11967
11968         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11969 }
11970
11971 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11972 {
11973         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11974
11975         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11976 }
11977
11978 static inline u32 kvm_async_pf_next_probe(u32 key)
11979 {
11980         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11981 }
11982
11983 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11984 {
11985         u32 key = kvm_async_pf_hash_fn(gfn);
11986
11987         while (vcpu->arch.apf.gfns[key] != ~0)
11988                 key = kvm_async_pf_next_probe(key);
11989
11990         vcpu->arch.apf.gfns[key] = gfn;
11991 }
11992
11993 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11994 {
11995         int i;
11996         u32 key = kvm_async_pf_hash_fn(gfn);
11997
11998         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11999                      (vcpu->arch.apf.gfns[key] != gfn &&
12000                       vcpu->arch.apf.gfns[key] != ~0); i++)
12001                 key = kvm_async_pf_next_probe(key);
12002
12003         return key;
12004 }
12005
12006 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12007 {
12008         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12009 }
12010
12011 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12012 {
12013         u32 i, j, k;
12014
12015         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12016
12017         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12018                 return;
12019
12020         while (true) {
12021                 vcpu->arch.apf.gfns[i] = ~0;
12022                 do {
12023                         j = kvm_async_pf_next_probe(j);
12024                         if (vcpu->arch.apf.gfns[j] == ~0)
12025                                 return;
12026                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12027                         /*
12028                          * k lies cyclically in ]i,j]
12029                          * |    i.k.j |
12030                          * |....j i.k.| or  |.k..j i...|
12031                          */
12032                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12033                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12034                 i = j;
12035         }
12036 }
12037
12038 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12039 {
12040         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12041
12042         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12043                                       sizeof(reason));
12044 }
12045
12046 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12047 {
12048         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12049
12050         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12051                                              &token, offset, sizeof(token));
12052 }
12053
12054 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12055 {
12056         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12057         u32 val;
12058
12059         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12060                                          &val, offset, sizeof(val)))
12061                 return false;
12062
12063         return !val;
12064 }
12065
12066 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12067 {
12068         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12069                 return false;
12070
12071         if (!kvm_pv_async_pf_enabled(vcpu) ||
12072             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12073                 return false;
12074
12075         return true;
12076 }
12077
12078 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12079 {
12080         if (unlikely(!lapic_in_kernel(vcpu) ||
12081                      kvm_event_needs_reinjection(vcpu) ||
12082                      vcpu->arch.exception.pending))
12083                 return false;
12084
12085         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12086                 return false;
12087
12088         /*
12089          * If interrupts are off we cannot even use an artificial
12090          * halt state.
12091          */
12092         return kvm_arch_interrupt_allowed(vcpu);
12093 }
12094
12095 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12096                                      struct kvm_async_pf *work)
12097 {
12098         struct x86_exception fault;
12099
12100         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12101         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12102
12103         if (kvm_can_deliver_async_pf(vcpu) &&
12104             !apf_put_user_notpresent(vcpu)) {
12105                 fault.vector = PF_VECTOR;
12106                 fault.error_code_valid = true;
12107                 fault.error_code = 0;
12108                 fault.nested_page_fault = false;
12109                 fault.address = work->arch.token;
12110                 fault.async_page_fault = true;
12111                 kvm_inject_page_fault(vcpu, &fault);
12112                 return true;
12113         } else {
12114                 /*
12115                  * It is not possible to deliver a paravirtualized asynchronous
12116                  * page fault, but putting the guest in an artificial halt state
12117                  * can be beneficial nevertheless: if an interrupt arrives, we
12118                  * can deliver it timely and perhaps the guest will schedule
12119                  * another process.  When the instruction that triggered a page
12120                  * fault is retried, hopefully the page will be ready in the host.
12121                  */
12122                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12123                 return false;
12124         }
12125 }
12126
12127 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12128                                  struct kvm_async_pf *work)
12129 {
12130         struct kvm_lapic_irq irq = {
12131                 .delivery_mode = APIC_DM_FIXED,
12132                 .vector = vcpu->arch.apf.vec
12133         };
12134
12135         if (work->wakeup_all)
12136                 work->arch.token = ~0; /* broadcast wakeup */
12137         else
12138                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12139         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12140
12141         if ((work->wakeup_all || work->notpresent_injected) &&
12142             kvm_pv_async_pf_enabled(vcpu) &&
12143             !apf_put_user_ready(vcpu, work->arch.token)) {
12144                 vcpu->arch.apf.pageready_pending = true;
12145                 kvm_apic_set_irq(vcpu, &irq, NULL);
12146         }
12147
12148         vcpu->arch.apf.halted = false;
12149         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12150 }
12151
12152 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12153 {
12154         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12155         if (!vcpu->arch.apf.pageready_pending)
12156                 kvm_vcpu_kick(vcpu);
12157 }
12158
12159 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12160 {
12161         if (!kvm_pv_async_pf_enabled(vcpu))
12162                 return true;
12163         else
12164                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12165 }
12166
12167 void kvm_arch_start_assignment(struct kvm *kvm)
12168 {
12169         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12170                 static_call_cond(kvm_x86_start_assignment)(kvm);
12171 }
12172 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12173
12174 void kvm_arch_end_assignment(struct kvm *kvm)
12175 {
12176         atomic_dec(&kvm->arch.assigned_device_count);
12177 }
12178 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12179
12180 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12181 {
12182         return atomic_read(&kvm->arch.assigned_device_count);
12183 }
12184 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12185
12186 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12187 {
12188         atomic_inc(&kvm->arch.noncoherent_dma_count);
12189 }
12190 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12191
12192 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12193 {
12194         atomic_dec(&kvm->arch.noncoherent_dma_count);
12195 }
12196 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12197
12198 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12199 {
12200         return atomic_read(&kvm->arch.noncoherent_dma_count);
12201 }
12202 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12203
12204 bool kvm_arch_has_irq_bypass(void)
12205 {
12206         return true;
12207 }
12208
12209 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12210                                       struct irq_bypass_producer *prod)
12211 {
12212         struct kvm_kernel_irqfd *irqfd =
12213                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12214         int ret;
12215
12216         irqfd->producer = prod;
12217         kvm_arch_start_assignment(irqfd->kvm);
12218         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12219                                          prod->irq, irqfd->gsi, 1);
12220
12221         if (ret)
12222                 kvm_arch_end_assignment(irqfd->kvm);
12223
12224         return ret;
12225 }
12226
12227 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12228                                       struct irq_bypass_producer *prod)
12229 {
12230         int ret;
12231         struct kvm_kernel_irqfd *irqfd =
12232                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12233
12234         WARN_ON(irqfd->producer != prod);
12235         irqfd->producer = NULL;
12236
12237         /*
12238          * When producer of consumer is unregistered, we change back to
12239          * remapped mode, so we can re-use the current implementation
12240          * when the irq is masked/disabled or the consumer side (KVM
12241          * int this case doesn't want to receive the interrupts.
12242         */
12243         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12244         if (ret)
12245                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12246                        " fails: %d\n", irqfd->consumer.token, ret);
12247
12248         kvm_arch_end_assignment(irqfd->kvm);
12249 }
12250
12251 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12252                                    uint32_t guest_irq, bool set)
12253 {
12254         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12255 }
12256
12257 bool kvm_vector_hashing_enabled(void)
12258 {
12259         return vector_hashing;
12260 }
12261
12262 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12263 {
12264         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12265 }
12266 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12267
12268
12269 int kvm_spec_ctrl_test_value(u64 value)
12270 {
12271         /*
12272          * test that setting IA32_SPEC_CTRL to given value
12273          * is allowed by the host processor
12274          */
12275
12276         u64 saved_value;
12277         unsigned long flags;
12278         int ret = 0;
12279
12280         local_irq_save(flags);
12281
12282         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12283                 ret = 1;
12284         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12285                 ret = 1;
12286         else
12287                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12288
12289         local_irq_restore(flags);
12290
12291         return ret;
12292 }
12293 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12294
12295 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12296 {
12297         struct x86_exception fault;
12298         u32 access = error_code &
12299                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12300
12301         if (!(error_code & PFERR_PRESENT_MASK) ||
12302             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12303                 /*
12304                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12305                  * tables probably do not match the TLB.  Just proceed
12306                  * with the error code that the processor gave.
12307                  */
12308                 fault.vector = PF_VECTOR;
12309                 fault.error_code_valid = true;
12310                 fault.error_code = error_code;
12311                 fault.nested_page_fault = false;
12312                 fault.address = gva;
12313         }
12314         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12315 }
12316 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12317
12318 /*
12319  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12320  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12321  * indicates whether exit to userspace is needed.
12322  */
12323 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12324                               struct x86_exception *e)
12325 {
12326         if (r == X86EMUL_PROPAGATE_FAULT) {
12327                 kvm_inject_emulated_page_fault(vcpu, e);
12328                 return 1;
12329         }
12330
12331         /*
12332          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12333          * while handling a VMX instruction KVM could've handled the request
12334          * correctly by exiting to userspace and performing I/O but there
12335          * doesn't seem to be a real use-case behind such requests, just return
12336          * KVM_EXIT_INTERNAL_ERROR for now.
12337          */
12338         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12339         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12340         vcpu->run->internal.ndata = 0;
12341
12342         return 0;
12343 }
12344 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12345
12346 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12347 {
12348         bool pcid_enabled;
12349         struct x86_exception e;
12350         struct {
12351                 u64 pcid;
12352                 u64 gla;
12353         } operand;
12354         int r;
12355
12356         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12357         if (r != X86EMUL_CONTINUE)
12358                 return kvm_handle_memory_failure(vcpu, r, &e);
12359
12360         if (operand.pcid >> 12 != 0) {
12361                 kvm_inject_gp(vcpu, 0);
12362                 return 1;
12363         }
12364
12365         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12366
12367         switch (type) {
12368         case INVPCID_TYPE_INDIV_ADDR:
12369                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12370                     is_noncanonical_address(operand.gla, vcpu)) {
12371                         kvm_inject_gp(vcpu, 0);
12372                         return 1;
12373                 }
12374                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12375                 return kvm_skip_emulated_instruction(vcpu);
12376
12377         case INVPCID_TYPE_SINGLE_CTXT:
12378                 if (!pcid_enabled && (operand.pcid != 0)) {
12379                         kvm_inject_gp(vcpu, 0);
12380                         return 1;
12381                 }
12382
12383                 kvm_invalidate_pcid(vcpu, operand.pcid);
12384                 return kvm_skip_emulated_instruction(vcpu);
12385
12386         case INVPCID_TYPE_ALL_NON_GLOBAL:
12387                 /*
12388                  * Currently, KVM doesn't mark global entries in the shadow
12389                  * page tables, so a non-global flush just degenerates to a
12390                  * global flush. If needed, we could optimize this later by
12391                  * keeping track of global entries in shadow page tables.
12392                  */
12393
12394                 fallthrough;
12395         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12396                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12397                 return kvm_skip_emulated_instruction(vcpu);
12398
12399         default:
12400                 BUG(); /* We have already checked above that type <= 3 */
12401         }
12402 }
12403 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12404
12405 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12406 {
12407         struct kvm_run *run = vcpu->run;
12408         struct kvm_mmio_fragment *frag;
12409         unsigned int len;
12410
12411         BUG_ON(!vcpu->mmio_needed);
12412
12413         /* Complete previous fragment */
12414         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12415         len = min(8u, frag->len);
12416         if (!vcpu->mmio_is_write)
12417                 memcpy(frag->data, run->mmio.data, len);
12418
12419         if (frag->len <= 8) {
12420                 /* Switch to the next fragment. */
12421                 frag++;
12422                 vcpu->mmio_cur_fragment++;
12423         } else {
12424                 /* Go forward to the next mmio piece. */
12425                 frag->data += len;
12426                 frag->gpa += len;
12427                 frag->len -= len;
12428         }
12429
12430         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12431                 vcpu->mmio_needed = 0;
12432
12433                 // VMG change, at this point, we're always done
12434                 // RIP has already been advanced
12435                 return 1;
12436         }
12437
12438         // More MMIO is needed
12439         run->mmio.phys_addr = frag->gpa;
12440         run->mmio.len = min(8u, frag->len);
12441         run->mmio.is_write = vcpu->mmio_is_write;
12442         if (run->mmio.is_write)
12443                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12444         run->exit_reason = KVM_EXIT_MMIO;
12445
12446         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12447
12448         return 0;
12449 }
12450
12451 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12452                           void *data)
12453 {
12454         int handled;
12455         struct kvm_mmio_fragment *frag;
12456
12457         if (!data)
12458                 return -EINVAL;
12459
12460         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12461         if (handled == bytes)
12462                 return 1;
12463
12464         bytes -= handled;
12465         gpa += handled;
12466         data += handled;
12467
12468         /*TODO: Check if need to increment number of frags */
12469         frag = vcpu->mmio_fragments;
12470         vcpu->mmio_nr_fragments = 1;
12471         frag->len = bytes;
12472         frag->gpa = gpa;
12473         frag->data = data;
12474
12475         vcpu->mmio_needed = 1;
12476         vcpu->mmio_cur_fragment = 0;
12477
12478         vcpu->run->mmio.phys_addr = gpa;
12479         vcpu->run->mmio.len = min(8u, frag->len);
12480         vcpu->run->mmio.is_write = 1;
12481         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12482         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12483
12484         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12485
12486         return 0;
12487 }
12488 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12489
12490 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12491                          void *data)
12492 {
12493         int handled;
12494         struct kvm_mmio_fragment *frag;
12495
12496         if (!data)
12497                 return -EINVAL;
12498
12499         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12500         if (handled == bytes)
12501                 return 1;
12502
12503         bytes -= handled;
12504         gpa += handled;
12505         data += handled;
12506
12507         /*TODO: Check if need to increment number of frags */
12508         frag = vcpu->mmio_fragments;
12509         vcpu->mmio_nr_fragments = 1;
12510         frag->len = bytes;
12511         frag->gpa = gpa;
12512         frag->data = data;
12513
12514         vcpu->mmio_needed = 1;
12515         vcpu->mmio_cur_fragment = 0;
12516
12517         vcpu->run->mmio.phys_addr = gpa;
12518         vcpu->run->mmio.len = min(8u, frag->len);
12519         vcpu->run->mmio.is_write = 0;
12520         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12521
12522         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12523
12524         return 0;
12525 }
12526 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12527
12528 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12529                            unsigned int port);
12530
12531 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12532 {
12533         int size = vcpu->arch.pio.size;
12534         int port = vcpu->arch.pio.port;
12535
12536         vcpu->arch.pio.count = 0;
12537         if (vcpu->arch.sev_pio_count)
12538                 return kvm_sev_es_outs(vcpu, size, port);
12539         return 1;
12540 }
12541
12542 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12543                            unsigned int port)
12544 {
12545         for (;;) {
12546                 unsigned int count =
12547                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12548                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12549
12550                 /* memcpy done already by emulator_pio_out.  */
12551                 vcpu->arch.sev_pio_count -= count;
12552                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12553                 if (!ret)
12554                         break;
12555
12556                 /* Emulation done by the kernel.  */
12557                 if (!vcpu->arch.sev_pio_count)
12558                         return 1;
12559         }
12560
12561         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12562         return 0;
12563 }
12564
12565 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12566                           unsigned int port);
12567
12568 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12569 {
12570         unsigned count = vcpu->arch.pio.count;
12571         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12572         vcpu->arch.sev_pio_count -= count;
12573         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12574 }
12575
12576 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12577 {
12578         int size = vcpu->arch.pio.size;
12579         int port = vcpu->arch.pio.port;
12580
12581         advance_sev_es_emulated_ins(vcpu);
12582         if (vcpu->arch.sev_pio_count)
12583                 return kvm_sev_es_ins(vcpu, size, port);
12584         return 1;
12585 }
12586
12587 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12588                           unsigned int port)
12589 {
12590         for (;;) {
12591                 unsigned int count =
12592                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12593                 if (!__emulator_pio_in(vcpu, size, port, count))
12594                         break;
12595
12596                 /* Emulation done by the kernel.  */
12597                 advance_sev_es_emulated_ins(vcpu);
12598                 if (!vcpu->arch.sev_pio_count)
12599                         return 1;
12600         }
12601
12602         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12603         return 0;
12604 }
12605
12606 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12607                          unsigned int port, void *data,  unsigned int count,
12608                          int in)
12609 {
12610         vcpu->arch.sev_pio_data = data;
12611         vcpu->arch.sev_pio_count = count;
12612         return in ? kvm_sev_es_ins(vcpu, size, port)
12613                   : kvm_sev_es_outs(vcpu, size, port);
12614 }
12615 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12616
12617 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12618 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12619 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12620 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12621 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12622 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12623 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12624 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
12644
12645 static int __init kvm_x86_init(void)
12646 {
12647         kvm_mmu_x86_module_init();
12648         return 0;
12649 }
12650 module_init(kvm_x86_init);
12651
12652 static void __exit kvm_x86_exit(void)
12653 {
12654         /*
12655          * If module_init() is implemented, module_exit() must also be
12656          * implemented to allow module unload.
12657          */
12658 }
12659 module_exit(kvm_x86_exit);