1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_VMCS_H
3 #define __KVM_X86_VMX_VMCS_H
5 #include <linux/ktime.h>
6 #include <linux/list.h>
7 #include <linux/nospec.h>
12 #include "capabilities.h"
14 #define ROL16(val, n) ((u16)(((u16)(val) << (n)) | ((u16)(val) >> (16 - (n)))))
27 DECLARE_PER_CPU(struct vmcs *, current_vmcs);
30 * vmcs_host_state tracks registers that are loaded from the VMCS on VMEXIT
31 * and whose values change infrequently, but are not constant. I.e. this is
32 * used as a write-through cache of the corresponding VMCS fields.
34 struct vmcs_host_state {
35 unsigned long cr3; /* May not match real cr3 */
36 unsigned long cr4; /* May not match real cr4 */
37 unsigned long gs_base;
38 unsigned long fs_base;
41 u16 fs_sel, gs_sel, ldt_sel;
47 struct vmcs_controls_shadow {
56 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
57 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
58 * loaded on this CPU (so we can clear them if the CPU goes down).
62 struct vmcs *shadow_vmcs;
65 bool nmi_known_unmasked;
66 bool hv_timer_soft_disabled;
67 /* Support for vnmi-less CPUs */
68 int soft_vnmi_blocked;
70 s64 vnmi_blocked_time;
71 unsigned long *msr_bitmap;
72 struct list_head loaded_vmcss_on_cpu_link;
73 struct vmcs_host_state host_state;
74 struct vmcs_controls_shadow controls_shadow;
77 static inline bool is_intr_type(u32 intr_info, u32 type)
79 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK;
81 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type);
84 static inline bool is_intr_type_n(u32 intr_info, u32 type, u8 vector)
86 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK |
87 INTR_INFO_VECTOR_MASK;
89 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type | vector);
92 static inline bool is_exception_n(u32 intr_info, u8 vector)
94 return is_intr_type_n(intr_info, INTR_TYPE_HARD_EXCEPTION, vector);
97 static inline bool is_debug(u32 intr_info)
99 return is_exception_n(intr_info, DB_VECTOR);
102 static inline bool is_breakpoint(u32 intr_info)
104 return is_exception_n(intr_info, BP_VECTOR);
107 static inline bool is_double_fault(u32 intr_info)
109 return is_exception_n(intr_info, DF_VECTOR);
112 static inline bool is_page_fault(u32 intr_info)
114 return is_exception_n(intr_info, PF_VECTOR);
117 static inline bool is_invalid_opcode(u32 intr_info)
119 return is_exception_n(intr_info, UD_VECTOR);
122 static inline bool is_gp_fault(u32 intr_info)
124 return is_exception_n(intr_info, GP_VECTOR);
127 static inline bool is_alignment_check(u32 intr_info)
129 return is_exception_n(intr_info, AC_VECTOR);
132 static inline bool is_machine_check(u32 intr_info)
134 return is_exception_n(intr_info, MC_VECTOR);
137 static inline bool is_nm_fault(u32 intr_info)
139 return is_exception_n(intr_info, NM_VECTOR);
142 /* Undocumented: icebp/int1 */
143 static inline bool is_icebp(u32 intr_info)
145 return is_intr_type(intr_info, INTR_TYPE_PRIV_SW_EXCEPTION);
148 static inline bool is_nmi(u32 intr_info)
150 return is_intr_type(intr_info, INTR_TYPE_NMI_INTR);
153 static inline bool is_external_intr(u32 intr_info)
155 return is_intr_type(intr_info, INTR_TYPE_EXT_INTR);
158 static inline bool is_exception_with_error_code(u32 intr_info)
160 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_DELIVER_CODE_MASK;
162 return (intr_info & mask) == mask;
165 enum vmcs_field_width {
166 VMCS_FIELD_WIDTH_U16 = 0,
167 VMCS_FIELD_WIDTH_U64 = 1,
168 VMCS_FIELD_WIDTH_U32 = 2,
169 VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3
172 static inline int vmcs_field_width(unsigned long field)
174 if (0x1 & field) /* the *_HIGH fields are all 32 bit */
175 return VMCS_FIELD_WIDTH_U32;
176 return (field >> 13) & 0x3;
179 static inline int vmcs_field_readonly(unsigned long field)
181 return (((field >> 10) & 0x3) == 1);
184 #define VMCS_FIELD_INDEX_SHIFT (1)
185 #define VMCS_FIELD_INDEX_MASK GENMASK(9, 1)
187 static inline unsigned int vmcs_field_index(unsigned long field)
189 return (field & VMCS_FIELD_INDEX_MASK) >> VMCS_FIELD_INDEX_SHIFT;
192 #endif /* __KVM_X86_VMX_VMCS_H */