1 #ifndef __KVM_X86_PMU_H
2 #define __KVM_X86_PMU_H
4 #include <linux/nospec.h>
6 #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
7 #define pmu_to_vcpu(pmu) (container_of((pmu), struct kvm_vcpu, arch.pmu))
8 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu)
10 /* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */
11 #define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf)
13 struct kvm_event_hw_type_mapping {
20 unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select,
22 unsigned (*find_fixed_event)(int idx);
23 bool (*pmc_is_enabled)(struct kvm_pmc *pmc);
24 struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);
25 struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx);
26 int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx);
27 bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);
28 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
29 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
30 void (*refresh)(struct kvm_vcpu *vcpu);
31 void (*init)(struct kvm_vcpu *vcpu);
32 void (*reset)(struct kvm_vcpu *vcpu);
35 static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
37 struct kvm_pmu *pmu = pmc_to_pmu(pmc);
39 return pmu->counter_bitmask[pmc->type];
42 static inline u64 pmc_read_counter(struct kvm_pmc *pmc)
44 u64 counter, enabled, running;
46 counter = pmc->counter;
48 counter += perf_event_read_value(pmc->perf_event,
50 /* FIXME: Scaling needed? */
51 return counter & pmc_bitmask(pmc);
54 static inline void pmc_stop_counter(struct kvm_pmc *pmc)
56 if (pmc->perf_event) {
57 pmc->counter = pmc_read_counter(pmc);
58 perf_event_release_kernel(pmc->perf_event);
59 pmc->perf_event = NULL;
63 static inline bool pmc_is_gp(struct kvm_pmc *pmc)
65 return pmc->type == KVM_PMC_GP;
68 static inline bool pmc_is_fixed(struct kvm_pmc *pmc)
70 return pmc->type == KVM_PMC_FIXED;
73 static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
75 return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
78 /* returns general purpose PMC with the specified MSR. Note that it can be
79 * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
80 * paramenter to tell them apart.
82 static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,
85 if (msr >= base && msr < base + pmu->nr_arch_gp_counters) {
86 u32 index = array_index_nospec(msr - base,
87 pmu->nr_arch_gp_counters);
89 return &pmu->gp_counters[index];
95 /* returns fixed PMC with the specified MSR */
96 static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)
98 int base = MSR_CORE_PERF_FIXED_CTR0;
100 if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) {
101 u32 index = array_index_nospec(msr - base,
102 pmu->nr_arch_fixed_counters);
104 return &pmu->fixed_counters[index];
110 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
111 void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
112 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);
114 void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu);
115 void kvm_pmu_handle_event(struct kvm_vcpu *vcpu);
116 int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
117 int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx);
118 bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);
119 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
120 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
121 void kvm_pmu_refresh(struct kvm_vcpu *vcpu);
122 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
123 void kvm_pmu_init(struct kvm_vcpu *vcpu);
124 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
126 extern struct kvm_pmu_ops intel_pmu_ops;
127 extern struct kvm_pmu_ops amd_pmu_ops;
128 #endif /* __KVM_X86_PMU_H */