GNU Linux-libre 4.14.266-gnu1
[releases.git] / arch / x86 / kvm / ioapic.c
1 /*
2  *  Copyright (C) 2001  MandrakeSoft S.A.
3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
4  *
5  *    MandrakeSoft S.A.
6  *    43, rue d'Aboukir
7  *    75002 Paris - France
8  *    http://www.linux-mandrake.com/
9  *    http://www.mandrakesoft.com/
10  *
11  *  This library is free software; you can redistribute it and/or
12  *  modify it under the terms of the GNU Lesser General Public
13  *  License as published by the Free Software Foundation; either
14  *  version 2 of the License, or (at your option) any later version.
15  *
16  *  This library is distributed in the hope that it will be useful,
17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *  Lesser General Public License for more details.
20  *
21  *  You should have received a copy of the GNU Lesser General Public
22  *  License along with this library; if not, write to the Free Software
23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  *  Yunhong Jiang <yunhong.jiang@intel.com>
26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
27  *  Based on Xen 3.1 code.
28  */
29
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
32 #include <linux/mm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
36 #include <linux/io.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <linux/nospec.h>
40 #include <asm/processor.h>
41 #include <asm/page.h>
42 #include <asm/current.h>
43 #include <trace/events/kvm.h>
44
45 #include "ioapic.h"
46 #include "lapic.h"
47 #include "irq.h"
48
49 #if 0
50 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
51 #else
52 #define ioapic_debug(fmt, arg...)
53 #endif
54 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
55                 bool line_status);
56
57 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
58                                           unsigned long addr,
59                                           unsigned long length)
60 {
61         unsigned long result = 0;
62
63         switch (ioapic->ioregsel) {
64         case IOAPIC_REG_VERSION:
65                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
66                           | (IOAPIC_VERSION_ID & 0xff));
67                 break;
68
69         case IOAPIC_REG_APIC_ID:
70         case IOAPIC_REG_ARB_ID:
71                 result = ((ioapic->id & 0xf) << 24);
72                 break;
73
74         default:
75                 {
76                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
77                         u64 redir_content = ~0ULL;
78
79                         if (redir_index < IOAPIC_NUM_PINS) {
80                                 u32 index = array_index_nospec(
81                                         redir_index, IOAPIC_NUM_PINS);
82
83                                 redir_content = ioapic->redirtbl[index].bits;
84                         }
85
86                         result = (ioapic->ioregsel & 0x1) ?
87                             (redir_content >> 32) & 0xffffffff :
88                             redir_content & 0xffffffff;
89                         break;
90                 }
91         }
92
93         return result;
94 }
95
96 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
97 {
98         ioapic->rtc_status.pending_eoi = 0;
99         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
100 }
101
102 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
103
104 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
105 {
106         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
107                 kvm_rtc_eoi_tracking_restore_all(ioapic);
108 }
109
110 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
111 {
112         bool new_val, old_val;
113         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
114         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
115         union kvm_ioapic_redirect_entry *e;
116
117         e = &ioapic->redirtbl[RTC_GSI];
118         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
119                                 e->fields.dest_mode))
120                 return;
121
122         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
123         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
124
125         if (new_val == old_val)
126                 return;
127
128         if (new_val) {
129                 __set_bit(vcpu->vcpu_id, dest_map->map);
130                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
131                 ioapic->rtc_status.pending_eoi++;
132         } else {
133                 __clear_bit(vcpu->vcpu_id, dest_map->map);
134                 ioapic->rtc_status.pending_eoi--;
135                 rtc_status_pending_eoi_check_valid(ioapic);
136         }
137 }
138
139 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
140 {
141         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
142
143         spin_lock(&ioapic->lock);
144         __rtc_irq_eoi_tracking_restore_one(vcpu);
145         spin_unlock(&ioapic->lock);
146 }
147
148 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
149 {
150         struct kvm_vcpu *vcpu;
151         int i;
152
153         if (RTC_GSI >= IOAPIC_NUM_PINS)
154                 return;
155
156         rtc_irq_eoi_tracking_reset(ioapic);
157         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
158             __rtc_irq_eoi_tracking_restore_one(vcpu);
159 }
160
161 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
162 {
163         if (test_and_clear_bit(vcpu->vcpu_id,
164                                ioapic->rtc_status.dest_map.map)) {
165                 --ioapic->rtc_status.pending_eoi;
166                 rtc_status_pending_eoi_check_valid(ioapic);
167         }
168 }
169
170 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
171 {
172         if (ioapic->rtc_status.pending_eoi > 0)
173                 return true; /* coalesced */
174
175         return false;
176 }
177
178 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
179                 int irq_level, bool line_status)
180 {
181         union kvm_ioapic_redirect_entry entry;
182         u32 mask = 1 << irq;
183         u32 old_irr;
184         int edge, ret;
185
186         entry = ioapic->redirtbl[irq];
187         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
188
189         if (!irq_level) {
190                 ioapic->irr &= ~mask;
191                 ret = 1;
192                 goto out;
193         }
194
195         /*
196          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
197          * this only happens if a previous edge has not been delivered due
198          * do masking.  For level interrupts, the remote_irr field tells
199          * us if the interrupt is waiting for an EOI.
200          *
201          * RTC is special: it is edge-triggered, but userspace likes to know
202          * if it has been already ack-ed via EOI because coalesced RTC
203          * interrupts lead to time drift in Windows guests.  So we track
204          * EOI manually for the RTC interrupt.
205          */
206         if (irq == RTC_GSI && line_status &&
207                 rtc_irq_check_coalesced(ioapic)) {
208                 ret = 0;
209                 goto out;
210         }
211
212         old_irr = ioapic->irr;
213         ioapic->irr |= mask;
214         if (edge)
215                 ioapic->irr_delivered &= ~mask;
216         if ((edge && old_irr == ioapic->irr) ||
217             (!edge && entry.fields.remote_irr)) {
218                 ret = 0;
219                 goto out;
220         }
221
222         ret = ioapic_service(ioapic, irq, line_status);
223
224 out:
225         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
226         return ret;
227 }
228
229 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
230 {
231         u32 idx;
232
233         rtc_irq_eoi_tracking_reset(ioapic);
234         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
235                 ioapic_set_irq(ioapic, idx, 1, true);
236
237         kvm_rtc_eoi_tracking_restore_all(ioapic);
238 }
239
240
241 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
242 {
243         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
244         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
245         union kvm_ioapic_redirect_entry *e;
246         int index;
247
248         spin_lock(&ioapic->lock);
249
250         /* Make sure we see any missing RTC EOI */
251         if (test_bit(vcpu->vcpu_id, dest_map->map))
252                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
253                           ioapic_handled_vectors);
254
255         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
256                 e = &ioapic->redirtbl[index];
257                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
258                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
259                     index == RTC_GSI) {
260                         if (kvm_apic_match_dest(vcpu, NULL, 0,
261                                      e->fields.dest_id, e->fields.dest_mode) ||
262                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
263                                 __set_bit(e->fields.vector,
264                                           ioapic_handled_vectors);
265                 }
266         }
267         spin_unlock(&ioapic->lock);
268 }
269
270 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
271 {
272         if (!ioapic_in_kernel(kvm))
273                 return;
274         kvm_make_scan_ioapic_request(kvm);
275 }
276
277 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
278 {
279         unsigned index;
280         bool mask_before, mask_after;
281         int old_remote_irr, old_delivery_status;
282         union kvm_ioapic_redirect_entry *e;
283
284         switch (ioapic->ioregsel) {
285         case IOAPIC_REG_VERSION:
286                 /* Writes are ignored. */
287                 break;
288
289         case IOAPIC_REG_APIC_ID:
290                 ioapic->id = (val >> 24) & 0xf;
291                 break;
292
293         case IOAPIC_REG_ARB_ID:
294                 break;
295
296         default:
297                 index = (ioapic->ioregsel - 0x10) >> 1;
298
299                 ioapic_debug("change redir index %x val %x\n", index, val);
300                 if (index >= IOAPIC_NUM_PINS)
301                         return;
302                 index = array_index_nospec(index, IOAPIC_NUM_PINS);
303                 e = &ioapic->redirtbl[index];
304                 mask_before = e->fields.mask;
305                 /* Preserve read-only fields */
306                 old_remote_irr = e->fields.remote_irr;
307                 old_delivery_status = e->fields.delivery_status;
308                 if (ioapic->ioregsel & 1) {
309                         e->bits &= 0xffffffff;
310                         e->bits |= (u64) val << 32;
311                 } else {
312                         e->bits &= ~0xffffffffULL;
313                         e->bits |= (u32) val;
314                 }
315                 e->fields.remote_irr = old_remote_irr;
316                 e->fields.delivery_status = old_delivery_status;
317
318                 /*
319                  * Some OSes (Linux, Xen) assume that Remote IRR bit will
320                  * be cleared by IOAPIC hardware when the entry is configured
321                  * as edge-triggered. This behavior is used to simulate an
322                  * explicit EOI on IOAPICs that don't have the EOI register.
323                  */
324                 if (e->fields.trig_mode == IOAPIC_EDGE_TRIG)
325                         e->fields.remote_irr = 0;
326
327                 mask_after = e->fields.mask;
328                 if (mask_before != mask_after)
329                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
330                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
331                     && ioapic->irr & (1 << index))
332                         ioapic_service(ioapic, index, false);
333                 kvm_make_scan_ioapic_request(ioapic->kvm);
334                 break;
335         }
336 }
337
338 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
339 {
340         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
341         struct kvm_lapic_irq irqe;
342         int ret;
343
344         if (entry->fields.mask)
345                 return -1;
346
347         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
348                      "vector=%x trig_mode=%x\n",
349                      entry->fields.dest_id, entry->fields.dest_mode,
350                      entry->fields.delivery_mode, entry->fields.vector,
351                      entry->fields.trig_mode);
352
353         irqe.dest_id = entry->fields.dest_id;
354         irqe.vector = entry->fields.vector;
355         irqe.dest_mode = entry->fields.dest_mode;
356         irqe.trig_mode = entry->fields.trig_mode;
357         irqe.delivery_mode = entry->fields.delivery_mode << 8;
358         irqe.level = 1;
359         irqe.shorthand = 0;
360         irqe.msi_redir_hint = false;
361
362         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
363                 ioapic->irr_delivered |= 1 << irq;
364
365         if (irq == RTC_GSI && line_status) {
366                 /*
367                  * pending_eoi cannot ever become negative (see
368                  * rtc_status_pending_eoi_check_valid) and the caller
369                  * ensures that it is only called if it is >= zero, namely
370                  * if rtc_irq_check_coalesced returns false).
371                  */
372                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
373                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
374                                                &ioapic->rtc_status.dest_map);
375                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
376         } else
377                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
378
379         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
380                 entry->fields.remote_irr = 1;
381
382         return ret;
383 }
384
385 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
386                        int level, bool line_status)
387 {
388         int ret, irq_level;
389
390         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
391
392         spin_lock(&ioapic->lock);
393         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
394                                          irq_source_id, level);
395         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
396
397         spin_unlock(&ioapic->lock);
398
399         return ret;
400 }
401
402 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
403 {
404         int i;
405
406         spin_lock(&ioapic->lock);
407         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
408                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
409         spin_unlock(&ioapic->lock);
410 }
411
412 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
413 {
414         int i;
415         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
416                                                  eoi_inject.work);
417         spin_lock(&ioapic->lock);
418         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
419                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
420
421                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
422                         continue;
423
424                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
425                         ioapic_service(ioapic, i, false);
426         }
427         spin_unlock(&ioapic->lock);
428 }
429
430 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
431
432 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
433                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
434 {
435         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
436         struct kvm_lapic *apic = vcpu->arch.apic;
437         int i;
438
439         /* RTC special handling */
440         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
441             vector == dest_map->vectors[vcpu->vcpu_id])
442                 rtc_irq_eoi(ioapic, vcpu);
443
444         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
445                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
446
447                 if (ent->fields.vector != vector)
448                         continue;
449
450                 /*
451                  * We are dropping lock while calling ack notifiers because ack
452                  * notifier callbacks for assigned devices call into IOAPIC
453                  * recursively. Since remote_irr is cleared only after call
454                  * to notifiers if the same vector will be delivered while lock
455                  * is dropped it will be put into irr and will be delivered
456                  * after ack notifier returns.
457                  */
458                 spin_unlock(&ioapic->lock);
459                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
460                 spin_lock(&ioapic->lock);
461
462                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
463                     kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
464                         continue;
465
466                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
467                 ent->fields.remote_irr = 0;
468                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
469                         ++ioapic->irq_eoi[i];
470                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
471                                 /*
472                                  * Real hardware does not deliver the interrupt
473                                  * immediately during eoi broadcast, and this
474                                  * lets a buggy guest make slow progress
475                                  * even if it does not correctly handle a
476                                  * level-triggered interrupt.  Emulate this
477                                  * behavior if we detect an interrupt storm.
478                                  */
479                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
480                                 ioapic->irq_eoi[i] = 0;
481                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
482                         } else {
483                                 ioapic_service(ioapic, i, false);
484                         }
485                 } else {
486                         ioapic->irq_eoi[i] = 0;
487                 }
488         }
489 }
490
491 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
492 {
493         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
494
495         spin_lock(&ioapic->lock);
496         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
497         spin_unlock(&ioapic->lock);
498 }
499
500 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
501 {
502         return container_of(dev, struct kvm_ioapic, dev);
503 }
504
505 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
506 {
507         return ((addr >= ioapic->base_address &&
508                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
509 }
510
511 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
512                                 gpa_t addr, int len, void *val)
513 {
514         struct kvm_ioapic *ioapic = to_ioapic(this);
515         u32 result;
516         if (!ioapic_in_range(ioapic, addr))
517                 return -EOPNOTSUPP;
518
519         ioapic_debug("addr %lx\n", (unsigned long)addr);
520         ASSERT(!(addr & 0xf));  /* check alignment */
521
522         addr &= 0xff;
523         spin_lock(&ioapic->lock);
524         switch (addr) {
525         case IOAPIC_REG_SELECT:
526                 result = ioapic->ioregsel;
527                 break;
528
529         case IOAPIC_REG_WINDOW:
530                 result = ioapic_read_indirect(ioapic, addr, len);
531                 break;
532
533         default:
534                 result = 0;
535                 break;
536         }
537         spin_unlock(&ioapic->lock);
538
539         switch (len) {
540         case 8:
541                 *(u64 *) val = result;
542                 break;
543         case 1:
544         case 2:
545         case 4:
546                 memcpy(val, (char *)&result, len);
547                 break;
548         default:
549                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
550         }
551         return 0;
552 }
553
554 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
555                                  gpa_t addr, int len, const void *val)
556 {
557         struct kvm_ioapic *ioapic = to_ioapic(this);
558         u32 data;
559         if (!ioapic_in_range(ioapic, addr))
560                 return -EOPNOTSUPP;
561
562         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
563                      (void*)addr, len, val);
564         ASSERT(!(addr & 0xf));  /* check alignment */
565
566         switch (len) {
567         case 8:
568         case 4:
569                 data = *(u32 *) val;
570                 break;
571         case 2:
572                 data = *(u16 *) val;
573                 break;
574         case 1:
575                 data = *(u8  *) val;
576                 break;
577         default:
578                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
579                 return 0;
580         }
581
582         addr &= 0xff;
583         spin_lock(&ioapic->lock);
584         switch (addr) {
585         case IOAPIC_REG_SELECT:
586                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
587                 break;
588
589         case IOAPIC_REG_WINDOW:
590                 ioapic_write_indirect(ioapic, data);
591                 break;
592
593         default:
594                 break;
595         }
596         spin_unlock(&ioapic->lock);
597         return 0;
598 }
599
600 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
601 {
602         int i;
603
604         cancel_delayed_work_sync(&ioapic->eoi_inject);
605         for (i = 0; i < IOAPIC_NUM_PINS; i++)
606                 ioapic->redirtbl[i].fields.mask = 1;
607         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
608         ioapic->ioregsel = 0;
609         ioapic->irr = 0;
610         ioapic->irr_delivered = 0;
611         ioapic->id = 0;
612         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
613         rtc_irq_eoi_tracking_reset(ioapic);
614 }
615
616 static const struct kvm_io_device_ops ioapic_mmio_ops = {
617         .read     = ioapic_mmio_read,
618         .write    = ioapic_mmio_write,
619 };
620
621 int kvm_ioapic_init(struct kvm *kvm)
622 {
623         struct kvm_ioapic *ioapic;
624         int ret;
625
626         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
627         if (!ioapic)
628                 return -ENOMEM;
629         spin_lock_init(&ioapic->lock);
630         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
631         kvm->arch.vioapic = ioapic;
632         kvm_ioapic_reset(ioapic);
633         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
634         ioapic->kvm = kvm;
635         mutex_lock(&kvm->slots_lock);
636         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
637                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
638         mutex_unlock(&kvm->slots_lock);
639         if (ret < 0) {
640                 kvm->arch.vioapic = NULL;
641                 kfree(ioapic);
642         }
643
644         return ret;
645 }
646
647 void kvm_ioapic_destroy(struct kvm *kvm)
648 {
649         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
650
651         if (!ioapic)
652                 return;
653
654         cancel_delayed_work_sync(&ioapic->eoi_inject);
655         mutex_lock(&kvm->slots_lock);
656         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
657         mutex_unlock(&kvm->slots_lock);
658         kvm->arch.vioapic = NULL;
659         kfree(ioapic);
660 }
661
662 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
663 {
664         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
665
666         spin_lock(&ioapic->lock);
667         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
668         state->irr &= ~ioapic->irr_delivered;
669         spin_unlock(&ioapic->lock);
670 }
671
672 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
673 {
674         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
675
676         spin_lock(&ioapic->lock);
677         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
678         ioapic->irr = 0;
679         ioapic->irr_delivered = 0;
680         kvm_make_scan_ioapic_request(kvm);
681         kvm_ioapic_inject_all(ioapic, state->irr);
682         spin_unlock(&ioapic->lock);
683 }