2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/slab.h>
33 #include <linux/bitops.h>
36 #include <linux/kvm_host.h>
39 #define pr_pic_unimpl(fmt, ...) \
40 pr_err_ratelimited("pic: " fmt, ## __VA_ARGS__)
42 static void pic_irq_request(struct kvm *kvm, int level);
44 static void pic_lock(struct kvm_pic *s)
50 static void pic_unlock(struct kvm_pic *s)
53 bool wakeup = s->wakeup_needed;
54 struct kvm_vcpu *vcpu;
57 s->wakeup_needed = false;
59 spin_unlock(&s->lock);
62 kvm_for_each_vcpu(i, vcpu, s->kvm) {
63 if (kvm_apic_accept_pic_intr(vcpu)) {
64 kvm_make_request(KVM_REQ_EVENT, vcpu);
72 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
74 s->isr &= ~(1 << irq);
75 if (s != &s->pics_state->pics[0])
78 * We are dropping lock while calling ack notifiers since ack
79 * notifier callbacks for assigned devices call into PIC recursively.
80 * Other interrupt may be delivered to PIC while lock is dropped but
81 * it should be safe since PIC state is already updated at this stage.
83 pic_unlock(s->pics_state);
84 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
85 pic_lock(s->pics_state);
89 * set irq level. If an edge is detected, then the IRR is set to 1
91 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
95 if (s->elcr & mask) /* level triggered */
97 ret = !(s->irr & mask);
102 s->last_irr &= ~mask;
104 else /* edge triggered */
106 if ((s->last_irr & mask) == 0) {
107 ret = !(s->irr & mask);
112 s->last_irr &= ~mask;
114 return (s->imr & mask) ? -1 : ret;
118 * return the highest priority found in mask (highest = smallest
119 * number). Return 8 if no irq
121 static inline int get_priority(struct kvm_kpic_state *s, int mask)
127 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
133 * return the pic wanted interrupt. return -1 if none
135 static int pic_get_irq(struct kvm_kpic_state *s)
137 int mask, cur_priority, priority;
139 mask = s->irr & ~s->imr;
140 priority = get_priority(s, mask);
144 * compute current priority. If special fully nested mode on the
145 * master, the IRQ coming from the slave is not taken into account
146 * for the priority computation.
149 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
151 cur_priority = get_priority(s, mask);
152 if (priority < cur_priority)
154 * higher priority found: an irq should be generated
156 return (priority + s->priority_add) & 7;
162 * raise irq to CPU if necessary. must be called every time the active
165 static void pic_update_irq(struct kvm_pic *s)
169 irq2 = pic_get_irq(&s->pics[1]);
172 * if irq request by slave pic, signal master PIC
174 pic_set_irq1(&s->pics[0], 2, 1);
175 pic_set_irq1(&s->pics[0], 2, 0);
177 irq = pic_get_irq(&s->pics[0]);
178 pic_irq_request(s->kvm, irq >= 0);
181 void kvm_pic_update_irq(struct kvm_pic *s)
188 int kvm_pic_set_irq(struct kvm_pic *s, int irq, int irq_source_id, int level)
192 BUG_ON(irq < 0 || irq >= PIC_NUM_PINS);
195 irq_level = __kvm_irq_line_state(&s->irq_states[irq],
196 irq_source_id, level);
197 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, irq_level);
199 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
200 s->pics[irq >> 3].imr, ret == 0);
206 void kvm_pic_clear_all(struct kvm_pic *s, int irq_source_id)
211 for (i = 0; i < PIC_NUM_PINS; i++)
212 __clear_bit(irq_source_id, &s->irq_states[i]);
217 * acknowledge interrupt 'irq'
219 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
223 * We don't clear a level sensitive interrupt here
225 if (!(s->elcr & (1 << irq)))
226 s->irr &= ~(1 << irq);
229 if (s->rotate_on_auto_eoi)
230 s->priority_add = (irq + 1) & 7;
231 pic_clear_isr(s, irq);
236 int kvm_pic_read_irq(struct kvm *kvm)
238 int irq, irq2, intno;
239 struct kvm_pic *s = kvm->arch.vpic;
244 irq = pic_get_irq(&s->pics[0]);
246 pic_intack(&s->pics[0], irq);
248 irq2 = pic_get_irq(&s->pics[1]);
250 pic_intack(&s->pics[1], irq2);
253 * spurious IRQ on slave controller
256 intno = s->pics[1].irq_base + irq2;
258 intno = s->pics[0].irq_base + irq;
261 * spurious IRQ on host controller
264 intno = s->pics[0].irq_base + irq;
272 static void kvm_pic_reset(struct kvm_kpic_state *s)
276 struct kvm_vcpu *vcpu;
277 u8 edge_irr = s->irr & ~s->elcr;
285 s->read_reg_select = 0;
287 s->special_fully_nested_mode = 0;
292 kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm)
293 if (kvm_apic_accept_pic_intr(vcpu)) {
302 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
303 if (edge_irr & (1 << irq))
304 pic_clear_isr(s, irq);
307 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
309 struct kvm_kpic_state *s = opaque;
310 int priority, cmd, irq;
317 pr_pic_unimpl("single mode not supported");
320 "level sensitive irq not supported");
322 } else if (val & 0x08) {
326 s->read_reg_select = val & 1;
328 s->special_mask = (val >> 5) & 1;
334 s->rotate_on_auto_eoi = cmd >> 2;
336 case 1: /* end of interrupt */
338 priority = get_priority(s, s->isr);
340 irq = (priority + s->priority_add) & 7;
342 s->priority_add = (irq + 1) & 7;
343 pic_clear_isr(s, irq);
344 pic_update_irq(s->pics_state);
349 pic_clear_isr(s, irq);
350 pic_update_irq(s->pics_state);
353 s->priority_add = (val + 1) & 7;
354 pic_update_irq(s->pics_state);
358 s->priority_add = (irq + 1) & 7;
359 pic_clear_isr(s, irq);
360 pic_update_irq(s->pics_state);
363 break; /* no operation */
367 switch (s->init_state) {
368 case 0: { /* normal mode */
369 u8 imr_diff = s->imr ^ val,
370 off = (s == &s->pics_state->pics[0]) ? 0 : 8;
372 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
373 if (imr_diff & (1 << irq))
374 kvm_fire_mask_notifiers(
376 SELECT_PIC(irq + off),
378 !!(s->imr & (1 << irq)));
379 pic_update_irq(s->pics_state);
383 s->irq_base = val & 0xf8;
393 s->special_fully_nested_mode = (val >> 4) & 1;
394 s->auto_eoi = (val >> 1) & 1;
400 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
404 ret = pic_get_irq(s);
407 s->pics_state->pics[0].isr &= ~(1 << 2);
408 s->pics_state->pics[0].irr &= ~(1 << 2);
410 s->irr &= ~(1 << ret);
411 pic_clear_isr(s, ret);
412 if (addr1 >> 7 || ret != 2)
413 pic_update_irq(s->pics_state);
414 /* Bit 7 is 1, means there's an interrupt */
417 /* Bit 7 is 0, means there's no interrupt */
419 pic_update_irq(s->pics_state);
425 static u32 pic_ioport_read(void *opaque, u32 addr)
427 struct kvm_kpic_state *s = opaque;
431 ret = pic_poll_read(s, addr);
435 if (s->read_reg_select)
444 static void elcr_ioport_write(void *opaque, u32 val)
446 struct kvm_kpic_state *s = opaque;
447 s->elcr = val & s->elcr_mask;
450 static u32 elcr_ioport_read(void *opaque)
452 struct kvm_kpic_state *s = opaque;
456 static int picdev_write(struct kvm_pic *s,
457 gpa_t addr, int len, const void *val)
459 unsigned char data = *(unsigned char *)val;
462 pr_pic_unimpl("non byte write\n");
469 pic_ioport_write(&s->pics[0], addr, data);
475 pic_ioport_write(&s->pics[1], addr, data);
481 elcr_ioport_write(&s->pics[addr & 1], data);
490 static int picdev_read(struct kvm_pic *s,
491 gpa_t addr, int len, void *val)
493 unsigned char *data = (unsigned char *)val;
497 pr_pic_unimpl("non byte read\n");
506 *data = pic_ioport_read(&s->pics[addr >> 7], addr);
512 *data = elcr_ioport_read(&s->pics[addr & 1]);
521 static int picdev_master_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
522 gpa_t addr, int len, const void *val)
524 return picdev_write(container_of(dev, struct kvm_pic, dev_master),
528 static int picdev_master_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
529 gpa_t addr, int len, void *val)
531 return picdev_read(container_of(dev, struct kvm_pic, dev_master),
535 static int picdev_slave_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
536 gpa_t addr, int len, const void *val)
538 return picdev_write(container_of(dev, struct kvm_pic, dev_slave),
542 static int picdev_slave_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
543 gpa_t addr, int len, void *val)
545 return picdev_read(container_of(dev, struct kvm_pic, dev_slave),
549 static int picdev_elcr_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
550 gpa_t addr, int len, const void *val)
552 return picdev_write(container_of(dev, struct kvm_pic, dev_elcr),
556 static int picdev_elcr_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
557 gpa_t addr, int len, void *val)
559 return picdev_read(container_of(dev, struct kvm_pic, dev_elcr),
564 * callback when PIC0 irq status changed
566 static void pic_irq_request(struct kvm *kvm, int level)
568 struct kvm_pic *s = kvm->arch.vpic;
571 s->wakeup_needed = true;
575 static const struct kvm_io_device_ops picdev_master_ops = {
576 .read = picdev_master_read,
577 .write = picdev_master_write,
580 static const struct kvm_io_device_ops picdev_slave_ops = {
581 .read = picdev_slave_read,
582 .write = picdev_slave_write,
585 static const struct kvm_io_device_ops picdev_elcr_ops = {
586 .read = picdev_elcr_read,
587 .write = picdev_elcr_write,
590 int kvm_pic_init(struct kvm *kvm)
595 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL_ACCOUNT);
598 spin_lock_init(&s->lock);
600 s->pics[0].elcr_mask = 0xf8;
601 s->pics[1].elcr_mask = 0xde;
602 s->pics[0].pics_state = s;
603 s->pics[1].pics_state = s;
606 * Initialize PIO device
608 kvm_iodevice_init(&s->dev_master, &picdev_master_ops);
609 kvm_iodevice_init(&s->dev_slave, &picdev_slave_ops);
610 kvm_iodevice_init(&s->dev_elcr, &picdev_elcr_ops);
611 mutex_lock(&kvm->slots_lock);
612 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x20, 2,
617 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0xa0, 2, &s->dev_slave);
621 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x4d0, 2, &s->dev_elcr);
625 mutex_unlock(&kvm->slots_lock);
632 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_slave);
635 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_master);
638 mutex_unlock(&kvm->slots_lock);
645 void kvm_pic_destroy(struct kvm *kvm)
647 struct kvm_pic *vpic = kvm->arch.vpic;
652 mutex_lock(&kvm->slots_lock);
653 kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_master);
654 kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_slave);
655 kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_elcr);
656 mutex_unlock(&kvm->slots_lock);
658 kvm->arch.vpic = NULL;