2 * Kernel-based Virtual Machine driver for Linux
3 * cpuid support routines
5 * derived from arch/x86/kvm/x86.c
7 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
8 * Copyright IBM Corporation, 2008
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
15 #include <linux/kvm_host.h>
16 #include <linux/export.h>
17 #include <linux/vmalloc.h>
18 #include <linux/uaccess.h>
19 #include <linux/sched/stat.h>
21 #include <asm/processor.h>
23 #include <asm/fpu/xstate.h>
30 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
33 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
35 xstate_bv &= XFEATURE_MASK_EXTEND;
37 if (xstate_bv & 0x1) {
38 u32 eax, ebx, ecx, edx, offset;
39 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
40 offset = compacted ? ret : ebx;
41 ret = max(ret, offset + eax);
51 bool kvm_mpx_supported(void)
53 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
54 && kvm_x86_ops->mpx_supported());
56 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
58 u64 kvm_supported_xcr0(void)
60 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
62 if (!kvm_mpx_supported())
63 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
68 #define F(x) bit(X86_FEATURE_##x)
70 /* For scattered features from cpufeatures.h; we currently expose none */
71 #define KF(x) bit(KVM_CPUID_BIT_##x)
73 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
75 struct kvm_cpuid_entry2 *best;
76 struct kvm_lapic *apic = vcpu->arch.apic;
78 best = kvm_find_cpuid_entry(vcpu, 1, 0);
82 /* Update OSXSAVE bit */
83 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
84 best->ecx &= ~F(OSXSAVE);
85 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
86 best->ecx |= F(OSXSAVE);
89 best->edx &= ~F(APIC);
90 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
94 if (best->ecx & F(TSC_DEADLINE_TIMER))
95 apic->lapic_timer.timer_mode_mask = 3 << 17;
97 apic->lapic_timer.timer_mode_mask = 1 << 17;
100 best = kvm_find_cpuid_entry(vcpu, 7, 0);
102 /* Update OSPKE bit */
103 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
104 best->ecx &= ~F(OSPKE);
105 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
106 best->ecx |= F(OSPKE);
110 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
112 vcpu->arch.guest_supported_xcr0 = 0;
113 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
115 vcpu->arch.guest_supported_xcr0 =
116 (best->eax | ((u64)best->edx << 32)) &
117 kvm_supported_xcr0();
118 vcpu->arch.guest_xstate_size = best->ebx =
119 xstate_required_size(vcpu->arch.xcr0, false);
122 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
123 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
124 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
127 * The existing code assumes virtual address is 48-bit or 57-bit in the
128 * canonical address checks; exit if it is ever changed.
130 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
132 int vaddr_bits = (best->eax & 0xff00) >> 8;
134 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
138 /* Update physical-address width */
139 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
140 kvm_mmu_reset_context(vcpu);
142 kvm_pmu_refresh(vcpu);
146 static int is_efer_nx(void)
148 unsigned long long efer = 0;
150 rdmsrl_safe(MSR_EFER, &efer);
151 return efer & EFER_NX;
154 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
157 struct kvm_cpuid_entry2 *e, *entry;
160 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
161 e = &vcpu->arch.cpuid_entries[i];
162 if (e->function == 0x80000001) {
167 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
168 entry->edx &= ~F(NX);
169 printk(KERN_INFO "kvm: guest NX capability removed\n");
173 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
175 struct kvm_cpuid_entry2 *best;
177 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
178 if (!best || best->eax < 0x80000008)
180 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
182 return best->eax & 0xff;
186 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
188 /* when an old userspace process fills a new kernel module */
189 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
190 struct kvm_cpuid *cpuid,
191 struct kvm_cpuid_entry __user *entries)
194 struct kvm_cpuid_entry *cpuid_entries = NULL;
197 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
201 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) *
206 if (copy_from_user(cpuid_entries, entries,
207 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
210 for (i = 0; i < cpuid->nent; i++) {
211 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
212 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
213 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
214 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
215 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
216 vcpu->arch.cpuid_entries[i].index = 0;
217 vcpu->arch.cpuid_entries[i].flags = 0;
218 vcpu->arch.cpuid_entries[i].padding[0] = 0;
219 vcpu->arch.cpuid_entries[i].padding[1] = 0;
220 vcpu->arch.cpuid_entries[i].padding[2] = 0;
222 vcpu->arch.cpuid_nent = cpuid->nent;
223 cpuid_fix_nx_cap(vcpu);
224 kvm_apic_set_version(vcpu);
225 kvm_x86_ops->cpuid_update(vcpu);
226 r = kvm_update_cpuid(vcpu);
229 vfree(cpuid_entries);
233 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
234 struct kvm_cpuid2 *cpuid,
235 struct kvm_cpuid_entry2 __user *entries)
240 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
243 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
244 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
246 vcpu->arch.cpuid_nent = cpuid->nent;
247 kvm_apic_set_version(vcpu);
248 kvm_x86_ops->cpuid_update(vcpu);
249 r = kvm_update_cpuid(vcpu);
254 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
255 struct kvm_cpuid2 *cpuid,
256 struct kvm_cpuid_entry2 __user *entries)
261 if (cpuid->nent < vcpu->arch.cpuid_nent)
264 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
265 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
270 cpuid->nent = vcpu->arch.cpuid_nent;
274 static void cpuid_mask(u32 *word, int wordnum)
276 *word &= boot_cpu_data.x86_capability[wordnum];
279 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
282 entry->function = function;
283 entry->index = index;
284 cpuid_count(entry->function, entry->index,
285 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
289 static int __do_cpuid_ent_emulated(struct kvm_cpuid_entry2 *entry,
290 u32 func, u32 index, int *nent, int maxnent)
298 entry->ecx = F(MOVBE);
302 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
304 entry->ecx = F(RDPID);
310 entry->function = func;
311 entry->index = index;
316 static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
317 u32 index, int *nent, int maxnent)
320 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
322 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
324 unsigned f_lm = F(LM);
326 unsigned f_gbpages = 0;
329 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
330 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
331 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
332 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
335 const u32 kvm_cpuid_1_edx_x86_features =
336 F(FPU) | F(VME) | F(DE) | F(PSE) |
337 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
338 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
339 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
340 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
341 0 /* Reserved, DS, ACPI */ | F(MMX) |
342 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
343 0 /* HTT, TM, Reserved, PBE */;
344 /* cpuid 0x80000001.edx */
345 const u32 kvm_cpuid_8000_0001_edx_x86_features =
346 F(FPU) | F(VME) | F(DE) | F(PSE) |
347 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
348 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
349 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
350 F(PAT) | F(PSE36) | 0 /* Reserved */ |
351 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
352 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
353 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
355 const u32 kvm_cpuid_1_ecx_x86_features =
356 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
357 * but *not* advertised to guests via CPUID ! */
358 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
359 0 /* DS-CPL, VMX, SMX, EST */ |
360 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
361 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
362 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
363 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
364 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
366 /* cpuid 0x80000001.ecx */
367 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
368 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
369 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
370 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
371 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
373 /* cpuid 0x80000008.ebx */
374 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
375 F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
376 F(AMD_SSB_NO) | F(AMD_STIBP);
378 /* cpuid 0xC0000001.edx */
379 const u32 kvm_cpuid_C000_0001_edx_x86_features =
380 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
381 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
385 const u32 kvm_cpuid_7_0_ebx_x86_features =
386 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
387 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
388 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
389 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
390 F(SHA_NI) | F(AVX512BW) | F(AVX512VL);
392 /* cpuid 0xD.1.eax */
393 const u32 kvm_cpuid_D_1_eax_x86_features =
394 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
397 const u32 kvm_cpuid_7_0_ecx_x86_features =
398 F(AVX512VBMI) | F(LA57) | F(PKU) |
399 0 /*OSPKE*/ | F(AVX512_VPOPCNTDQ);
402 const u32 kvm_cpuid_7_0_edx_x86_features =
403 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
404 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
407 /* all calls to cpuid_count() should be made on the same cpu */
412 if (WARN_ON(*nent >= maxnent))
415 do_cpuid_1_ent(entry, function, index);
420 entry->eax = min(entry->eax, (u32)0xd);
423 entry->edx &= kvm_cpuid_1_edx_x86_features;
424 cpuid_mask(&entry->edx, CPUID_1_EDX);
425 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
426 cpuid_mask(&entry->ecx, CPUID_1_ECX);
427 /* we support x2apic emulation even if host does not support
428 * it since we emulate x2apic in software */
429 entry->ecx |= F(X2APIC);
431 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
432 * may return different values. This forces us to get_cpu() before
433 * issuing the first command, and also to emulate this annoying behavior
434 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
436 int t, times = entry->eax & 0xff;
438 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
439 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
440 for (t = 1; t < times; ++t) {
441 if (*nent >= maxnent)
444 do_cpuid_1_ent(&entry[t], function, 0);
445 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
450 /* function 4 has additional index. */
454 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
455 /* read more entries until cache_type is zero */
457 if (*nent >= maxnent)
460 cache_type = entry[i - 1].eax & 0x1f;
463 do_cpuid_1_ent(&entry[i], function, i);
465 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
470 case 6: /* Thermal management */
471 entry->eax = 0x4; /* allow ARAT */
477 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
478 /* Mask ebx against host capability word 9 */
480 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
481 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
482 // TSC_ADJUST is emulated
483 entry->ebx |= F(TSC_ADJUST);
484 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
485 cpuid_mask(&entry->ecx, CPUID_7_ECX);
486 /* PKU is not yet implemented for shadow paging. */
487 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
488 entry->ecx &= ~F(PKU);
490 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
491 cpuid_mask(&entry->edx, CPUID_7_EDX);
492 if (boot_cpu_has(X86_FEATURE_IBPB) &&
493 boot_cpu_has(X86_FEATURE_IBRS))
494 entry->edx |= F(SPEC_CTRL);
495 if (boot_cpu_has(X86_FEATURE_STIBP))
496 entry->edx |= F(INTEL_STIBP);
497 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
498 boot_cpu_has(X86_FEATURE_AMD_SSBD))
499 entry->edx |= F(SPEC_CTRL_SSBD);
501 * We emulate ARCH_CAPABILITIES in software even
502 * if the host doesn't support it.
504 entry->edx |= F(ARCH_CAPABILITIES);
515 case 0xa: { /* Architectural Performance Monitoring */
516 struct x86_pmu_capability cap;
517 union cpuid10_eax eax;
518 union cpuid10_edx edx;
520 if (!static_cpu_has(X86_FEATURE_ARCH_PERFMON)) {
521 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
525 perf_get_x86_pmu_capability(&cap);
528 * Only support guest architectural pmu on a host
529 * with architectural pmu.
532 memset(&cap, 0, sizeof(cap));
534 eax.split.version_id = min(cap.version, 2);
535 eax.split.num_counters = cap.num_counters_gp;
536 eax.split.bit_width = cap.bit_width_gp;
537 eax.split.mask_length = cap.events_mask_len;
539 edx.split.num_counters_fixed = cap.num_counters_fixed;
540 edx.split.bit_width_fixed = cap.bit_width_fixed;
541 edx.split.reserved = 0;
543 entry->eax = eax.full;
544 entry->ebx = cap.events_mask;
546 entry->edx = edx.full;
549 /* function 0xb has additional index. */
553 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
554 /* read more entries until level_type is zero */
556 if (*nent >= maxnent)
559 level_type = entry[i - 1].ecx & 0xff00;
562 do_cpuid_1_ent(&entry[i], function, i);
564 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
571 u64 supported = kvm_supported_xcr0();
573 entry->eax &= supported;
574 entry->ebx = xstate_required_size(supported, false);
575 entry->ecx = entry->ebx;
576 entry->edx &= supported >> 32;
577 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
581 for (idx = 1, i = 1; idx < 64; ++idx) {
582 u64 mask = ((u64)1 << idx);
583 if (*nent >= maxnent)
586 do_cpuid_1_ent(&entry[i], function, idx);
588 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
589 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
591 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
593 xstate_required_size(supported,
596 if (entry[i].eax == 0 || !(supported & mask))
598 if (WARN_ON_ONCE(entry[i].ecx & 1))
604 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
610 case KVM_CPUID_SIGNATURE: {
611 static const char signature[12] = "KVMKVMKVM\0\0";
612 const u32 *sigptr = (const u32 *)signature;
613 entry->eax = KVM_CPUID_FEATURES;
614 entry->ebx = sigptr[0];
615 entry->ecx = sigptr[1];
616 entry->edx = sigptr[2];
619 case KVM_CPUID_FEATURES:
620 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
621 (1 << KVM_FEATURE_NOP_IO_DELAY) |
622 (1 << KVM_FEATURE_CLOCKSOURCE2) |
623 (1 << KVM_FEATURE_ASYNC_PF) |
624 (1 << KVM_FEATURE_PV_EOI) |
625 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
626 (1 << KVM_FEATURE_PV_UNHALT) |
627 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT);
630 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
637 entry->eax = min(entry->eax, 0x8000001a);
640 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
641 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
642 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
643 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
645 case 0x80000007: /* Advanced power management */
646 /* invariant TSC is CPUID.80000007H:EDX[8] */
647 entry->edx &= (1 << 8);
648 /* mask against host */
649 entry->edx &= boot_cpu_data.x86_power;
650 entry->eax = entry->ebx = entry->ecx = 0;
653 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
654 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
655 unsigned phys_as = entry->eax & 0xff;
658 * Use bare metal's MAXPHADDR if the CPU doesn't report guest
659 * MAXPHYADDR separately, or if TDP (NPT) is disabled, as the
660 * guest version "applies only to guests using nested paging".
662 if (!g_phys_as || !tdp_enabled)
665 entry->eax = g_phys_as | (virt_as << 8);
666 entry->ecx &= ~(GENMASK(31, 16) | GENMASK(11, 8));
669 * IBRS, IBPB and VIRT_SSBD aren't necessarily present in
672 if (boot_cpu_has(X86_FEATURE_AMD_IBPB))
673 entry->ebx |= F(AMD_IBPB);
674 if (boot_cpu_has(X86_FEATURE_AMD_IBRS))
675 entry->ebx |= F(AMD_IBRS);
676 if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
677 entry->ebx |= F(VIRT_SSBD);
678 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
679 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
681 * The preference is to use SPEC CTRL MSR instead of the
684 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
685 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
686 entry->ebx |= F(VIRT_SSBD);
690 entry->ecx = entry->edx = 0;
696 /*Add support for Centaur's CPUID instruction*/
698 /*Just support up to 0xC0000004 now*/
699 entry->eax = min(entry->eax, 0xC0000004);
702 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
703 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
705 case 3: /* Processor serial number */
706 case 5: /* MONITOR/MWAIT */
711 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
715 kvm_x86_ops->set_supported_cpuid(function, entry);
725 static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
726 u32 idx, int *nent, int maxnent, unsigned int type)
728 if (*nent >= maxnent)
731 if (type == KVM_GET_EMULATED_CPUID)
732 return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
734 return __do_cpuid_ent(entry, func, idx, nent, maxnent);
739 struct kvm_cpuid_param {
743 bool (*qualifier)(const struct kvm_cpuid_param *param);
746 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
748 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
751 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
752 __u32 num_entries, unsigned int ioctl_type)
757 if (ioctl_type != KVM_GET_EMULATED_CPUID)
761 * We want to make sure that ->padding is being passed clean from
762 * userspace in case we want to use it for something in the future.
764 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
765 * have to give ourselves satisfied only with the emulated side. /me
768 for (i = 0; i < num_entries; i++) {
769 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
772 if (pad[0] || pad[1] || pad[2])
778 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
779 struct kvm_cpuid_entry2 __user *entries,
782 struct kvm_cpuid_entry2 *cpuid_entries;
783 int limit, nent = 0, r = -E2BIG, i;
785 static const struct kvm_cpuid_param param[] = {
786 { .func = 0, .has_leaf_count = true },
787 { .func = 0x80000000, .has_leaf_count = true },
788 { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
789 { .func = KVM_CPUID_SIGNATURE },
790 { .func = KVM_CPUID_FEATURES },
795 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
796 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
798 if (sanity_check_entries(entries, cpuid->nent, type))
802 cpuid_entries = vzalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
807 for (i = 0; i < ARRAY_SIZE(param); i++) {
808 const struct kvm_cpuid_param *ent = ¶m[i];
810 if (ent->qualifier && !ent->qualifier(ent))
813 r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
814 &nent, cpuid->nent, type);
819 if (!ent->has_leaf_count)
822 limit = cpuid_entries[nent - 1].eax;
823 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
824 r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
825 &nent, cpuid->nent, type);
832 if (copy_to_user(entries, cpuid_entries,
833 nent * sizeof(struct kvm_cpuid_entry2)))
839 vfree(cpuid_entries);
844 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
846 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
847 struct kvm_cpuid_entry2 *ej;
849 int nent = vcpu->arch.cpuid_nent;
851 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
852 /* when no next entry is found, the current entry[i] is reselected */
855 ej = &vcpu->arch.cpuid_entries[j];
856 } while (ej->function != e->function);
858 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
863 /* find an entry with matching function, matching index (if needed), and that
864 * should be read next (if it's stateful) */
865 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
866 u32 function, u32 index)
868 if (e->function != function)
870 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
872 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
873 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
878 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
879 u32 function, u32 index)
882 struct kvm_cpuid_entry2 *best = NULL;
884 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
885 struct kvm_cpuid_entry2 *e;
887 e = &vcpu->arch.cpuid_entries[i];
888 if (is_matching_cpuid_entry(e, function, index)) {
889 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
890 move_to_next_stateful_cpuid_entry(vcpu, i);
897 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
900 * If no match is found, check whether we exceed the vCPU's limit
901 * and return the content of the highest valid _standard_ leaf instead.
902 * This is to satisfy the CPUID specification.
904 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
905 u32 function, u32 index)
907 struct kvm_cpuid_entry2 *maxlevel;
909 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
910 if (!maxlevel || maxlevel->eax >= function)
912 if (function & 0x80000000) {
913 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
917 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
920 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
921 u32 *ecx, u32 *edx, bool check_limit)
923 u32 function = *eax, index = *ecx;
924 struct kvm_cpuid_entry2 *best;
925 bool entry_found = true;
927 best = kvm_find_cpuid_entry(vcpu, function, index);
934 best = check_cpuid_limit(vcpu, function, index);
944 *eax = *ebx = *ecx = *edx = 0;
945 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found);
948 EXPORT_SYMBOL_GPL(kvm_cpuid);
950 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
952 u32 eax, ebx, ecx, edx;
954 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
957 eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
958 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
959 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
960 kvm_register_write(vcpu, VCPU_REGS_RAX, eax);
961 kvm_register_write(vcpu, VCPU_REGS_RBX, ebx);
962 kvm_register_write(vcpu, VCPU_REGS_RCX, ecx);
963 kvm_register_write(vcpu, VCPU_REGS_RDX, edx);
964 return kvm_skip_emulated_instruction(vcpu);
966 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);