1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Paravirtualization interfaces
3 Copyright (C) 2006 Rusty Russell IBM Corporation
6 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
12 #include <linux/efi.h>
13 #include <linux/bcd.h>
14 #include <linux/highmem.h>
15 #include <linux/kprobes.h>
16 #include <linux/pgtable.h>
17 #include <linux/static_call.h>
20 #include <asm/paravirt.h>
21 #include <asm/debugreg.h>
23 #include <asm/setup.h>
25 #include <asm/pgalloc.h>
27 #include <asm/delay.h>
28 #include <asm/fixmap.h>
30 #include <asm/tlbflush.h>
31 #include <asm/timer.h>
32 #include <asm/special_insns.h>
34 #include <asm/io_bitmap.h>
35 #include <asm/gsseg.h>
37 /* stub always returning 0. */
38 DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text);
40 void __init default_banner(void)
42 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
46 #ifdef CONFIG_PARAVIRT_XXL
47 DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text);
48 DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text);
49 DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text);
50 DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text);
51 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
54 DEFINE_STATIC_KEY_TRUE(virt_spin_lock_key);
56 void __init native_pv_lock_init(void)
58 if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) &&
59 !boot_cpu_has(X86_FEATURE_HYPERVISOR))
60 static_branch_disable(&virt_spin_lock_key);
63 static void native_tlb_remove_table(struct mmu_gather *tlb, void *table)
65 tlb_remove_page(tlb, table);
68 struct static_key paravirt_steal_enabled;
69 struct static_key paravirt_steal_rq_enabled;
71 static u64 native_steal_clock(int cpu)
76 DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock);
77 DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
79 void paravirt_set_sched_clock(u64 (*func)(void))
81 static_call_update(pv_sched_clock, func);
84 /* These are in entry.S */
85 static struct resource reserve_ioports = {
87 .end = IO_SPACE_LIMIT,
88 .name = "paravirt-ioport",
89 .flags = IORESOURCE_IO | IORESOURCE_BUSY,
93 * Reserve the whole legacy IO space to prevent any legacy drivers
94 * from wasting time probing for their hardware. This is a fairly
95 * brute-force approach to disabling all non-virtual drivers.
97 * Note that this must be called very early to have any effect.
99 int paravirt_disable_iospace(void)
101 return request_resource(&ioport_resource, &reserve_ioports);
104 #ifdef CONFIG_PARAVIRT_XXL
105 static noinstr void pv_native_write_cr2(unsigned long val)
107 native_write_cr2(val);
110 static noinstr unsigned long pv_native_get_debugreg(int regno)
112 return native_get_debugreg(regno);
115 static noinstr void pv_native_set_debugreg(int regno, unsigned long val)
117 native_set_debugreg(regno, val);
120 noinstr void pv_native_wbinvd(void)
125 static noinstr void pv_native_safe_halt(void)
131 struct pv_info pv_info = {
132 .name = "bare hardware",
133 #ifdef CONFIG_PARAVIRT_XXL
134 .extra_user_64bit_cs = __USER_CS,
138 /* 64-bit pagetable entries */
139 #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
141 struct paravirt_patch_template pv_ops = {
143 .cpu.io_delay = native_io_delay,
145 #ifdef CONFIG_PARAVIRT_XXL
146 .cpu.cpuid = native_cpuid,
147 .cpu.get_debugreg = pv_native_get_debugreg,
148 .cpu.set_debugreg = pv_native_set_debugreg,
149 .cpu.read_cr0 = native_read_cr0,
150 .cpu.write_cr0 = native_write_cr0,
151 .cpu.write_cr4 = native_write_cr4,
152 .cpu.wbinvd = pv_native_wbinvd,
153 .cpu.read_msr = native_read_msr,
154 .cpu.write_msr = native_write_msr,
155 .cpu.read_msr_safe = native_read_msr_safe,
156 .cpu.write_msr_safe = native_write_msr_safe,
157 .cpu.read_pmc = native_read_pmc,
158 .cpu.load_tr_desc = native_load_tr_desc,
159 .cpu.set_ldt = native_set_ldt,
160 .cpu.load_gdt = native_load_gdt,
161 .cpu.load_idt = native_load_idt,
162 .cpu.store_tr = native_store_tr,
163 .cpu.load_tls = native_load_tls,
164 .cpu.load_gs_index = native_load_gs_index,
165 .cpu.write_ldt_entry = native_write_ldt_entry,
166 .cpu.write_gdt_entry = native_write_gdt_entry,
167 .cpu.write_idt_entry = native_write_idt_entry,
169 .cpu.alloc_ldt = paravirt_nop,
170 .cpu.free_ldt = paravirt_nop,
172 .cpu.load_sp0 = native_load_sp0,
174 #ifdef CONFIG_X86_IOPL_IOPERM
175 .cpu.invalidate_io_bitmap = native_tss_invalidate_io_bitmap,
176 .cpu.update_io_bitmap = native_tss_update_io_bitmap,
179 .cpu.start_context_switch = paravirt_nop,
180 .cpu.end_context_switch = paravirt_nop,
183 .irq.save_fl = __PV_IS_CALLEE_SAVE(pv_native_save_fl),
184 .irq.irq_disable = __PV_IS_CALLEE_SAVE(pv_native_irq_disable),
185 .irq.irq_enable = __PV_IS_CALLEE_SAVE(pv_native_irq_enable),
186 .irq.safe_halt = pv_native_safe_halt,
187 .irq.halt = native_halt,
188 #endif /* CONFIG_PARAVIRT_XXL */
191 .mmu.flush_tlb_user = native_flush_tlb_local,
192 .mmu.flush_tlb_kernel = native_flush_tlb_global,
193 .mmu.flush_tlb_one_user = native_flush_tlb_one_user,
194 .mmu.flush_tlb_multi = native_flush_tlb_multi,
195 .mmu.tlb_remove_table = native_tlb_remove_table,
197 .mmu.exit_mmap = paravirt_nop,
198 .mmu.notify_page_enc_status_changed = paravirt_nop,
200 #ifdef CONFIG_PARAVIRT_XXL
201 .mmu.read_cr2 = __PV_IS_CALLEE_SAVE(pv_native_read_cr2),
202 .mmu.write_cr2 = pv_native_write_cr2,
203 .mmu.read_cr3 = __native_read_cr3,
204 .mmu.write_cr3 = native_write_cr3,
206 .mmu.pgd_alloc = __paravirt_pgd_alloc,
207 .mmu.pgd_free = paravirt_nop,
209 .mmu.alloc_pte = paravirt_nop,
210 .mmu.alloc_pmd = paravirt_nop,
211 .mmu.alloc_pud = paravirt_nop,
212 .mmu.alloc_p4d = paravirt_nop,
213 .mmu.release_pte = paravirt_nop,
214 .mmu.release_pmd = paravirt_nop,
215 .mmu.release_pud = paravirt_nop,
216 .mmu.release_p4d = paravirt_nop,
218 .mmu.set_pte = native_set_pte,
219 .mmu.set_pmd = native_set_pmd,
221 .mmu.ptep_modify_prot_start = __ptep_modify_prot_start,
222 .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit,
224 .mmu.set_pud = native_set_pud,
226 .mmu.pmd_val = PTE_IDENT,
227 .mmu.make_pmd = PTE_IDENT,
229 .mmu.pud_val = PTE_IDENT,
230 .mmu.make_pud = PTE_IDENT,
232 .mmu.set_p4d = native_set_p4d,
234 #if CONFIG_PGTABLE_LEVELS >= 5
235 .mmu.p4d_val = PTE_IDENT,
236 .mmu.make_p4d = PTE_IDENT,
238 .mmu.set_pgd = native_set_pgd,
239 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */
241 .mmu.pte_val = PTE_IDENT,
242 .mmu.pgd_val = PTE_IDENT,
244 .mmu.make_pte = PTE_IDENT,
245 .mmu.make_pgd = PTE_IDENT,
247 .mmu.enter_mmap = paravirt_nop,
250 .enter = paravirt_nop,
251 .leave = paravirt_nop,
252 .flush = paravirt_nop,
255 .mmu.set_fixmap = native_set_fixmap,
256 #endif /* CONFIG_PARAVIRT_XXL */
258 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
261 .lock.queued_spin_lock_slowpath = native_queued_spin_lock_slowpath,
262 .lock.queued_spin_unlock =
263 PV_CALLEE_SAVE(__native_queued_spin_unlock),
264 .lock.wait = paravirt_nop,
265 .lock.kick = paravirt_nop,
266 .lock.vcpu_is_preempted =
267 PV_CALLEE_SAVE(__native_vcpu_is_preempted),
272 #ifdef CONFIG_PARAVIRT_XXL
273 NOKPROBE_SYMBOL(native_load_idt);
276 EXPORT_SYMBOL(pv_ops);
277 EXPORT_SYMBOL_GPL(pv_info);