1 // SPDX-License-Identifier: GPL-2.0
3 * AMD Family 10h mmconfig enablement
6 #include <linux/types.h>
8 #include <linux/string.h>
10 #include <linux/dmi.h>
11 #include <linux/range.h>
13 #include <asm/pci-direct.h>
14 #include <linux/sort.h>
18 #include <asm/mmconfig.h>
19 #include <asm/pci_x86.h>
21 struct pci_hostbridge_probe {
28 static u64 fam10h_pci_mmconf_base;
30 static struct pci_hostbridge_probe pci_probes[] = {
31 { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 },
32 { 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 },
35 static int cmp_range(const void *x1, const void *x2)
37 const struct range *r1 = x1;
38 const struct range *r2 = x2;
41 start1 = r1->start >> 32;
42 start2 = r2->start >> 32;
44 return start1 - start2;
47 #define MMCONF_UNIT (1ULL << FAM10H_MMIO_CONF_BASE_SHIFT)
48 #define MMCONF_MASK (~(MMCONF_UNIT - 1))
49 #define MMCONF_SIZE (MMCONF_UNIT << 8)
50 /* need to avoid (0xfd<<32), (0xfe<<32), and (0xff<<32), ht used space */
51 #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32)
52 #define BASE_VALID(b) ((b) + MMCONF_SIZE <= (0xfdULL<<32) || (b) >= (1ULL<<40))
53 static void get_fam10h_pci_mmconf_base(void)
63 u64 base = FAM10H_PCI_MMCONF_BASE;
66 struct range range[8];
68 /* only try to get setting from BSP */
69 if (fam10h_pci_mmconf_base)
72 if (!early_pci_allowed())
76 for (i = 0; i < ARRAY_SIZE(pci_probes); i++) {
81 bus = pci_probes[i].bus;
82 slot = pci_probes[i].slot;
83 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
86 device = (id>>16) & 0xffff;
87 if (pci_probes[i].vendor == vendor &&
88 pci_probes[i].device == device) {
98 address = MSR_K8_SYSCFG;
101 /* TOP_MEM2 is not enabled? */
102 if (!(val & (1<<21))) {
106 address = MSR_K8_TOP_MEM2;
107 rdmsrl(address, val);
108 tom2 = max(val & 0xffffff800000ULL, 1ULL << 32);
112 base = (tom2 + 2 * MMCONF_UNIT - 1) & MMCONF_MASK;
115 * need to check if the range is in the high mmio range that is
119 for (i = 0; i < 8; i++) {
123 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));
127 start = (u64)(reg & 0xffffff00) << 8; /* 39:16 on 31:8*/
128 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));
129 end = ((u64)(reg & 0xffffff00) << 8) | 0xffff; /* 39:16 on 31:8*/
134 range[hi_mmio_num].start = start;
135 range[hi_mmio_num].end = end;
143 sort(range, hi_mmio_num, sizeof(struct range), cmp_range, NULL);
145 if (range[hi_mmio_num - 1].end < base)
147 if (range[0].start > base + MMCONF_SIZE)
150 /* need to find one window */
151 base = (range[0].start & MMCONF_MASK) - MMCONF_UNIT;
152 if ((base > tom2) && BASE_VALID(base))
154 base = (range[hi_mmio_num - 1].end + MMCONF_UNIT) & MMCONF_MASK;
155 if (BASE_VALID(base))
157 /* need to find window between ranges */
158 for (i = 1; i < hi_mmio_num; i++) {
159 base = (range[i - 1].end + MMCONF_UNIT) & MMCONF_MASK;
160 val = range[i].start & MMCONF_MASK;
161 if (val >= base + MMCONF_SIZE && BASE_VALID(base))
167 fam10h_pci_mmconf_base = base;
170 void fam10h_check_enable_mmcfg(void)
175 if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
178 address = MSR_FAM10H_MMIO_CONF_BASE;
179 rdmsrl(address, val);
181 /* try to make sure that AP's setting is identical to BSP setting */
182 if (val & FAM10H_MMIO_CONF_ENABLE) {
184 busnbits = (val >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
185 FAM10H_MMIO_CONF_BUSRANGE_MASK;
187 /* only trust the one handle 256 buses, if acpi=off */
188 if (!acpi_pci_disabled || busnbits >= 8) {
189 u64 base = val & MMCONF_MASK;
191 if (!fam10h_pci_mmconf_base) {
192 fam10h_pci_mmconf_base = base;
194 } else if (fam10h_pci_mmconf_base == base)
200 * if it is not enabled, try to enable it and assume only one segment
203 get_fam10h_pci_mmconf_base();
204 if (!fam10h_pci_mmconf_base) {
205 pci_probe &= ~PCI_CHECK_ENABLE_AMD_MMCONF;
209 printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n");
210 val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) |
211 (FAM10H_MMIO_CONF_BUSRANGE_MASK<<FAM10H_MMIO_CONF_BUSRANGE_SHIFT));
212 val |= fam10h_pci_mmconf_base | (8 << FAM10H_MMIO_CONF_BUSRANGE_SHIFT) |
213 FAM10H_MMIO_CONF_ENABLE;
214 wrmsrl(address, val);
217 static int __init set_check_enable_amd_mmconf(const struct dmi_system_id *d)
219 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
223 static const struct dmi_system_id __initconst mmconf_dmi_table[] = {
225 .callback = set_check_enable_amd_mmconf,
226 .ident = "Sun Microsystems Machine",
228 DMI_MATCH(DMI_SYS_VENDOR, "Sun Microsystems"),
234 /* Called from a non __init function, but only on the BSP. */
235 void __ref check_enable_amd_mmconf_dmi(void)
237 dmi_check_system(mmconf_dmi_table);