1 // SPDX-License-Identifier: GPL-2.0
3 * prepare to run common code
5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
8 #define DISABLE_BRANCH_PROFILING
10 /* cpu_feature_enabled() cannot be used this early */
11 #define USE_EARLY_PGTABLE_L5
13 #include <linux/init.h>
14 #include <linux/linkage.h>
15 #include <linux/types.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/percpu.h>
19 #include <linux/start_kernel.h>
21 #include <linux/memblock.h>
22 #include <linux/mem_encrypt.h>
23 #include <linux/pgtable.h>
25 #include <asm/processor.h>
26 #include <asm/proto.h>
28 #include <asm/setup.h>
30 #include <asm/tlbflush.h>
31 #include <asm/sections.h>
32 #include <asm/kdebug.h>
33 #include <asm/e820/api.h>
34 #include <asm/bios_ebda.h>
35 #include <asm/bootparam_utils.h>
36 #include <asm/microcode.h>
37 #include <asm/kasan.h>
38 #include <asm/fixmap.h>
39 #include <asm/realmode.h>
41 #include <asm/extable.h>
42 #include <asm/trapnr.h>
43 #include <asm/sev-es.h>
46 * Manage page tables very early on.
48 extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
49 static unsigned int __initdata next_early_pgt;
50 pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
52 #ifdef CONFIG_X86_5LEVEL
53 unsigned int __pgtable_l5_enabled __ro_after_init;
54 unsigned int pgdir_shift __ro_after_init = 39;
55 EXPORT_SYMBOL(pgdir_shift);
56 unsigned int ptrs_per_p4d __ro_after_init = 1;
57 EXPORT_SYMBOL(ptrs_per_p4d);
60 #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
61 unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4;
62 EXPORT_SYMBOL(page_offset_base);
63 unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4;
64 EXPORT_SYMBOL(vmalloc_base);
65 unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4;
66 EXPORT_SYMBOL(vmemmap_base);
70 * GDT used on the boot CPU before switching to virtual addresses.
72 static struct desc_struct startup_gdt[GDT_ENTRIES] = {
73 [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
74 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
75 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
79 * Address needs to be set at runtime because it references the startup_gdt
80 * while the kernel still uses a direct mapping.
82 static struct desc_ptr startup_gdt_descr = {
83 .size = sizeof(startup_gdt)-1,
87 #define __head __section(".head.text")
89 static void __head *fixup_pointer(void *ptr, unsigned long physaddr)
91 return ptr - (void *)_text + (void *)physaddr;
94 static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr)
96 return fixup_pointer(ptr, physaddr);
99 #ifdef CONFIG_X86_5LEVEL
100 static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr)
102 return fixup_pointer(ptr, physaddr);
105 static bool __head check_la57_support(unsigned long physaddr)
108 * 5-level paging is detected and enabled at kernel decomression
109 * stage. Only check if it has been enabled there.
111 if (!(native_read_cr4() & X86_CR4_LA57))
114 *fixup_int(&__pgtable_l5_enabled, physaddr) = 1;
115 *fixup_int(&pgdir_shift, physaddr) = 48;
116 *fixup_int(&ptrs_per_p4d, physaddr) = 512;
117 *fixup_long(&page_offset_base, physaddr) = __PAGE_OFFSET_BASE_L5;
118 *fixup_long(&vmalloc_base, physaddr) = __VMALLOC_BASE_L5;
119 *fixup_long(&vmemmap_base, physaddr) = __VMEMMAP_BASE_L5;
124 static bool __head check_la57_support(unsigned long physaddr)
130 /* Code in __startup_64() can be relocated during execution, but the compiler
131 * doesn't have to generate PC-relative relocations when accessing globals from
132 * that function. Clang actually does not generate them, which leads to
133 * boot-time crashes. To work around this problem, every global pointer must
134 * be adjusted using fixup_pointer().
136 unsigned long __head __startup_64(unsigned long physaddr,
137 struct boot_params *bp)
139 unsigned long vaddr, vaddr_end;
140 unsigned long load_delta, *p;
141 unsigned long pgtable_flags;
145 pmdval_t *pmd, pmd_entry;
149 unsigned int *next_pgt_ptr;
151 la57 = check_la57_support(physaddr);
153 /* Is the address too large? */
154 if (physaddr >> MAX_PHYSMEM_BITS)
158 * Compute the delta between the address I am compiled to run at
159 * and the address I am actually running at.
161 load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map);
163 /* Is the address not 2M aligned? */
164 if (load_delta & ~PMD_PAGE_MASK)
167 /* Activate Secure Memory Encryption (SME) if supported and enabled */
170 /* Include the SME encryption mask in the fixup value */
171 load_delta += sme_get_me_mask();
173 /* Fixup the physical addresses in the page table */
175 pgd = fixup_pointer(&early_top_pgt, physaddr);
176 p = pgd + pgd_index(__START_KERNEL_map);
178 *p = (unsigned long)level4_kernel_pgt;
180 *p = (unsigned long)level3_kernel_pgt;
181 *p += _PAGE_TABLE_NOENC - __START_KERNEL_map + load_delta;
184 p4d = fixup_pointer(&level4_kernel_pgt, physaddr);
185 p4d[511] += load_delta;
188 pud = fixup_pointer(&level3_kernel_pgt, physaddr);
189 pud[510] += load_delta;
190 pud[511] += load_delta;
192 pmd = fixup_pointer(level2_fixmap_pgt, physaddr);
193 for (i = FIXMAP_PMD_TOP; i > FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)
194 pmd[i] += load_delta;
197 * Set up the identity mapping for the switchover. These
198 * entries should *NOT* have the global bit set! This also
199 * creates a bunch of nonsense entries but that is fine --
200 * it avoids problems around wraparound.
203 next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr);
204 pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
205 pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
207 pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
210 p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++],
213 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
214 pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
215 pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
217 i = physaddr >> P4D_SHIFT;
218 p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
219 p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
221 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
222 pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
223 pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
226 i = physaddr >> PUD_SHIFT;
227 pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
228 pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
230 pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
231 /* Filter out unsupported __PAGE_KERNEL_* bits: */
232 mask_ptr = fixup_pointer(&__supported_pte_mask, physaddr);
233 pmd_entry &= *mask_ptr;
234 pmd_entry += sme_get_me_mask();
235 pmd_entry += physaddr;
237 for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
238 int idx = i + (physaddr >> PMD_SHIFT);
240 pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;
244 * Fixup the kernel text+data virtual addresses. Note that
245 * we might write invalid pmds, when the kernel is relocated
246 * cleanup_highmap() fixes this up along with the mappings
249 * Only the region occupied by the kernel image has so far
250 * been checked against the table of usable memory regions
251 * provided by the firmware, so invalidate pages outside that
252 * region. A page table entry that maps to a reserved area of
253 * memory would allow processor speculation into that area,
254 * and on some hardware (particularly the UV platform) even
255 * speculative access to some reserved areas is caught as an
256 * error, causing the BIOS to halt the system.
259 pmd = fixup_pointer(level2_kernel_pgt, physaddr);
261 /* invalidate pages before the kernel image */
262 for (i = 0; i < pmd_index((unsigned long)_text); i++)
263 pmd[i] &= ~_PAGE_PRESENT;
265 /* fixup pages that are part of the kernel image */
266 for (; i <= pmd_index((unsigned long)_end); i++)
267 if (pmd[i] & _PAGE_PRESENT)
268 pmd[i] += load_delta;
270 /* invalidate pages after the kernel image */
271 for (; i < PTRS_PER_PMD; i++)
272 pmd[i] &= ~_PAGE_PRESENT;
275 * Fixup phys_base - remove the memory encryption mask to obtain
276 * the true physical address.
278 *fixup_long(&phys_base, physaddr) += load_delta - sme_get_me_mask();
280 /* Encrypt the kernel and related (if SME is active) */
281 sme_encrypt_kernel(bp);
284 * Clear the memory encryption mask from the .bss..decrypted section.
285 * The bss section will be memset to zero later in the initialization so
286 * there is no need to zero it after changing the memory encryption
289 if (mem_encrypt_active()) {
290 vaddr = (unsigned long)__start_bss_decrypted;
291 vaddr_end = (unsigned long)__end_bss_decrypted;
292 for (; vaddr < vaddr_end; vaddr += PMD_SIZE) {
293 i = pmd_index(vaddr);
294 pmd[i] -= sme_get_me_mask();
299 * Return the SME encryption mask (if SME is active) to be used as a
300 * modifier for the initial pgdir entry programmed into CR3.
302 return sme_get_me_mask();
305 /* Wipe all early page tables except for the kernel symbol map */
306 static void __init reset_early_page_tables(void)
308 memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1));
310 write_cr3(__sme_pa_nodebug(early_top_pgt));
313 /* Create a new PMD entry */
314 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd)
316 unsigned long physaddr = address - __PAGE_OFFSET;
317 pgdval_t pgd, *pgd_p;
318 p4dval_t p4d, *p4d_p;
319 pudval_t pud, *pud_p;
322 /* Invalid address or early pgt is done ? */
323 if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt))
327 pgd_p = &early_top_pgt[pgd_index(address)].pgd;
331 * The use of __START_KERNEL_map rather than __PAGE_OFFSET here is
332 * critical -- __PAGE_OFFSET would point us back into the dynamic
333 * range and we might end up looping forever...
335 if (!pgtable_l5_enabled())
338 p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
340 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
341 reset_early_page_tables();
345 p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++];
346 memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
347 *pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
349 p4d_p += p4d_index(address);
353 pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
355 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
356 reset_early_page_tables();
360 pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++];
361 memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
362 *p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
364 pud_p += pud_index(address);
368 pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
370 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
371 reset_early_page_tables();
375 pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++];
376 memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
377 *pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
379 pmd_p[pmd_index(address)] = pmd;
384 static bool __init early_make_pgtable(unsigned long address)
386 unsigned long physaddr = address - __PAGE_OFFSET;
389 pmd = (physaddr & PMD_MASK) + early_pmd_flags;
391 return __early_make_pgtable(address, pmd);
394 void __init do_early_exception(struct pt_regs *regs, int trapnr)
396 if (trapnr == X86_TRAP_PF &&
397 early_make_pgtable(native_read_cr2()))
400 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) &&
401 trapnr == X86_TRAP_VC && handle_vc_boot_ghcb(regs))
404 early_fixup_exception(regs, trapnr);
407 /* Don't add a printk in there. printk relies on the PDA which is not initialized
409 static void __init clear_bss(void)
411 memset(__bss_start, 0,
412 (unsigned long) __bss_stop - (unsigned long) __bss_start);
413 memset(__brk_base, 0,
414 (unsigned long) __brk_limit - (unsigned long) __brk_base);
417 static unsigned long get_cmd_line_ptr(void)
419 unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr;
421 cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32;
426 static void __init copy_bootdata(char *real_mode_data)
429 unsigned long cmd_line_ptr;
432 * If SME is active, this will create decrypted mappings of the
433 * boot data in advance of the copy operations.
435 sme_map_bootdata(real_mode_data);
437 memcpy(&boot_params, real_mode_data, sizeof(boot_params));
438 sanitize_boot_params(&boot_params);
439 cmd_line_ptr = get_cmd_line_ptr();
441 command_line = __va(cmd_line_ptr);
442 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
446 * The old boot data is no longer needed and won't be reserved,
447 * freeing up that memory for use by the system. If SME is active,
448 * we need to remove the mappings that were created so that the
449 * memory doesn't remain mapped as decrypted.
451 sme_unmap_bootdata(real_mode_data);
454 asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
457 * Build-time sanity checks on the kernel image and module
458 * area mappings. (these are purely build-time and produce no code)
460 BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map);
461 BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE);
462 BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
463 BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0);
464 BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
465 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
466 MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
467 (__START_KERNEL & PGDIR_MASK)));
468 BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
472 /* Kill off the identity-map trampoline */
473 reset_early_page_tables();
477 clear_page(init_top_pgt);
480 * SME support may update early_pmd_flags to include the memory
481 * encryption mask, so it needs to be called before anything
482 * that may generate a page fault.
488 idt_setup_early_handler();
490 copy_bootdata(__va(real_mode_data));
493 * Load microcode early on BSP.
497 /* set init_top_pgt kernel high mapping*/
498 init_top_pgt[511] = early_top_pgt[511];
500 x86_64_start_reservations(real_mode_data);
503 void __init x86_64_start_reservations(char *real_mode_data)
505 /* version is always not zero if it is copied */
506 if (!boot_params.hdr.version)
507 copy_bootdata(__va(real_mode_data));
509 x86_early_init_platform_quirks();
511 switch (boot_params.hdr.hardware_subarch) {
512 case X86_SUBARCH_INTEL_MID:
513 x86_intel_mid_early_setup();
523 * Data structures and code used for IDT setup in head_64.S. The bringup-IDT is
524 * used until the idt_table takes over. On the boot CPU this happens in
525 * x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases
526 * this happens in the functions called from head_64.S.
528 * The idt_table can't be used that early because all the code modifying it is
529 * in idt.c and can be instrumented by tracing or KASAN, which both don't work
530 * during early CPU bringup. Also the idt_table has the runtime vectors
531 * configured which require certain CPU state to be setup already (like TSS),
532 * which also hasn't happened yet in early CPU bringup.
534 static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data;
536 static struct desc_ptr bringup_idt_descr = {
537 .size = (NUM_EXCEPTION_VECTORS * sizeof(gate_desc)) - 1,
538 .address = 0, /* Set at runtime */
541 static void set_bringup_idt_handler(gate_desc *idt, int n, void *handler)
543 #ifdef CONFIG_AMD_MEM_ENCRYPT
544 struct idt_data data;
547 init_idt_data(&data, n, handler);
548 idt_init_desc(&desc, &data);
549 native_write_idt_entry(idt, n, &desc);
553 /* This runs while still in the direct mapping */
554 static void startup_64_load_idt(unsigned long physbase)
556 struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase);
557 gate_desc *idt = fixup_pointer(bringup_idt_table, physbase);
560 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
563 /* VMM Communication Exception */
564 handler = fixup_pointer(vc_no_ghcb, physbase);
565 set_bringup_idt_handler(idt, X86_TRAP_VC, handler);
568 desc->address = (unsigned long)idt;
569 native_load_idt(desc);
572 /* This is used when running on kernel addresses */
573 void early_setup_idt(void)
575 /* VMM Communication Exception */
576 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
577 set_bringup_idt_handler(bringup_idt_table, X86_TRAP_VC, vc_boot_ghcb);
579 bringup_idt_descr.address = (unsigned long)bringup_idt_table;
580 native_load_idt(&bringup_idt_descr);
584 * Setup boot CPU state needed before kernel switches to virtual addresses.
586 void __head startup_64_setup_env(unsigned long physbase)
589 startup_gdt_descr.address = (unsigned long)fixup_pointer(startup_gdt, physbase);
590 native_load_gdt(&startup_gdt_descr);
592 /* New GDT is live - reload data segment registers */
593 asm volatile("movl %%eax, %%ds\n"
595 "movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");
597 startup_64_load_idt(physbase);