1 // SPDX-License-Identifier: GPL-2.0-only
3 * x86 FPU boot time init code:
5 #include <asm/fpu/internal.h>
6 #include <asm/tlbflush.h>
8 #include <asm/cmdline.h>
10 #include <linux/sched.h>
11 #include <linux/sched/task.h>
12 #include <linux/init.h>
15 * Initialize the registers found in all CPUs, CR0 and CR4:
17 static void fpu__init_cpu_generic(void)
20 unsigned long cr4_mask = 0;
22 if (boot_cpu_has(X86_FEATURE_FXSR))
23 cr4_mask |= X86_CR4_OSFXSR;
24 if (boot_cpu_has(X86_FEATURE_XMM))
25 cr4_mask |= X86_CR4_OSXMMEXCPT;
27 cr4_set_bits(cr4_mask);
30 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
31 if (!boot_cpu_has(X86_FEATURE_FPU))
35 /* Flush out any pending x87 state: */
36 #ifdef CONFIG_MATH_EMULATION
37 if (!boot_cpu_has(X86_FEATURE_FPU))
38 fpstate_init_soft(¤t->thread.fpu.state.soft);
41 asm volatile ("fninit");
45 * Enable all supported FPU features. Called when a CPU is brought online:
47 void fpu__init_cpu(void)
49 fpu__init_cpu_generic();
50 fpu__init_cpu_xstate();
53 static bool __init fpu__probe_without_cpuid(void)
61 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
64 asm volatile("fninit ; fnstsw %0 ; fnstcw %1" : "+m" (fsw), "+m" (fcw));
66 pr_info("x86/fpu: Probing for FPU: FSW=0x%04hx FCW=0x%04hx\n", fsw, fcw);
68 return fsw == 0 && (fcw & 0x103f) == 0x003f;
71 static void __init fpu__init_system_early_generic(void)
73 if (!boot_cpu_has(X86_FEATURE_CPUID) &&
74 !test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
75 if (fpu__probe_without_cpuid())
76 setup_force_cpu_cap(X86_FEATURE_FPU);
78 setup_clear_cpu_cap(X86_FEATURE_FPU);
81 #ifndef CONFIG_MATH_EMULATION
82 if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_FPU)) {
83 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
91 * Boot time FPU feature detection code:
93 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
94 EXPORT_SYMBOL_GPL(mxcsr_feature_mask);
96 static void __init fpu__init_system_mxcsr(void)
98 unsigned int mask = 0;
100 if (boot_cpu_has(X86_FEATURE_FXSR)) {
101 /* Static because GCC does not get 16-byte stack alignment right: */
102 static struct fxregs_state fxregs __initdata;
104 asm volatile("fxsave %0" : "+m" (fxregs));
106 mask = fxregs.mxcsr_mask;
109 * If zero then use the default features mask,
110 * which has all features set, except the
111 * denormals-are-zero feature bit:
116 mxcsr_feature_mask &= mask;
120 * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
122 static void __init fpu__init_system_generic(void)
125 * Set up the legacy init FPU context. (xstate init might overwrite this
126 * with a more modern format, if the CPU supports it.)
128 fpstate_init(&init_fpstate);
130 fpu__init_system_mxcsr();
134 * Size of the FPU context state. All tasks in the system use the
135 * same context size, regardless of what portion they use.
136 * This is inherent to the XSAVE architecture which puts all state
137 * components into a single, continuous memory block:
139 unsigned int fpu_kernel_xstate_size;
140 EXPORT_SYMBOL_GPL(fpu_kernel_xstate_size);
143 * Enforce that 'MEMBER' is the last field of 'TYPE'.
145 * Align the computed size with alignment of the TYPE,
146 * because that's how C aligns structs.
148 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
149 BUILD_BUG_ON(sizeof(TYPE) != \
150 ALIGN(offsetofend(TYPE, MEMBER), _Alignof(TYPE)))
153 * We append the 'struct fpu' to the task_struct:
155 static void __init fpu__init_task_struct_size(void)
157 int task_size = sizeof(struct task_struct);
160 * Subtract off the static size of the register state.
161 * It potentially has a bunch of padding.
163 task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state);
166 * Add back the dynamically-calculated register state
169 task_size += fpu_kernel_xstate_size;
172 * We dynamically size 'struct fpu', so we require that
173 * it be at the end of 'thread_struct' and that
174 * 'thread_struct' be at the end of 'task_struct'. If
175 * you hit a compile error here, check the structure to
176 * see if something got added to the end.
178 CHECK_MEMBER_AT_END_OF(struct fpu, state);
179 CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);
180 CHECK_MEMBER_AT_END_OF(struct task_struct, thread);
182 arch_task_struct_size = task_size;
186 * Set up the user and kernel xstate sizes based on the legacy FPU context size.
188 * We set this up first, and later it will be overwritten by
189 * fpu__init_system_xstate() if the CPU knows about xstates.
191 static void __init fpu__init_system_xstate_size_legacy(void)
193 static int on_boot_cpu __initdata = 1;
195 WARN_ON_FPU(!on_boot_cpu);
199 * Note that xstate sizes might be overwritten later during
200 * fpu__init_system_xstate().
203 if (!boot_cpu_has(X86_FEATURE_FPU)) {
204 fpu_kernel_xstate_size = sizeof(struct swregs_state);
206 if (boot_cpu_has(X86_FEATURE_FXSR))
207 fpu_kernel_xstate_size =
208 sizeof(struct fxregs_state);
210 fpu_kernel_xstate_size =
211 sizeof(struct fregs_state);
214 fpu_user_xstate_size = fpu_kernel_xstate_size;
218 * Find supported xfeatures based on cpu features and command-line input.
219 * This must be called after fpu__init_parse_early_param() is called and
220 * xfeatures_mask is enumerated.
222 u64 __init fpu__get_supported_xfeatures_mask(void)
227 /* Legacy code to initialize eager fpu mode. */
228 static void __init fpu__init_system_ctx_switch(void)
230 static bool on_boot_cpu __initdata = 1;
232 WARN_ON_FPU(!on_boot_cpu);
237 * We parse fpu parameters early because fpu__init_system() is executed
238 * before parse_early_param().
240 static void __init fpu__init_parse_early_param(void)
244 int arglen, res, bit;
247 if (cmdline_find_option_bool(boot_command_line, "no387"))
248 #ifdef CONFIG_MATH_EMULATION
249 setup_clear_cpu_cap(X86_FEATURE_FPU);
251 pr_err("Option 'no387' required CONFIG_MATH_EMULATION enabled.\n");
254 if (cmdline_find_option_bool(boot_command_line, "nofxsr"))
255 setup_clear_cpu_cap(X86_FEATURE_FXSR);
258 if (cmdline_find_option_bool(boot_command_line, "noxsave"))
259 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
261 if (cmdline_find_option_bool(boot_command_line, "noxsaveopt"))
262 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
264 if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
265 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
267 arglen = cmdline_find_option(boot_command_line, "clearcpuid", arg, sizeof(arg));
271 pr_info("Clearing CPUID bits:");
273 res = get_option(&argptr, &bit);
274 if (res == 0 || res == 3)
277 /* If the argument was too long, the last bit may be cut off */
278 if (res == 1 && arglen >= sizeof(arg))
281 if (bit >= 0 && bit < NCAPINTS * 32) {
282 pr_cont(" " X86_CAP_FMT, x86_cap_flag(bit));
283 setup_clear_cpu_cap(bit);
290 * Called on the boot CPU once per system bootup, to set up the initial
291 * FPU state that is later cloned into all processes:
293 void __init fpu__init_system(void)
295 fpu__init_parse_early_param();
296 fpu__init_system_early_generic();
299 * The FPU has to be operational for some of the
300 * later FPU init activities:
304 fpu__init_system_generic();
305 fpu__init_system_xstate_size_legacy();
306 fpu__init_system_xstate();
307 fpu__init_task_struct_size();
309 fpu__init_system_ctx_switch();