1 // SPDX-License-Identifier: GPL-2.0-only
3 * x86 APERF/MPERF KHz calculation for
4 * /sys/.../cpufreq/scaling_cur_freq
6 * Copyright (C) 2017 Intel Corp.
7 * Author: Len Brown <len.brown@intel.com>
9 #include <linux/cpufreq.h>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
12 #include <linux/math64.h>
13 #include <linux/percpu.h>
14 #include <linux/rcupdate.h>
15 #include <linux/sched/isolation.h>
16 #include <linux/sched/topology.h>
17 #include <linux/smp.h>
18 #include <linux/syscore_ops.h>
21 #include <asm/cpu_device_id.h>
22 #include <asm/intel-family.h>
28 unsigned long last_update;
35 static DEFINE_PER_CPU_SHARED_ALIGNED(struct aperfmperf, cpu_samples) = {
36 .seq = SEQCNT_ZERO(cpu_samples.seq)
39 static void init_counter_refs(void)
43 rdmsrl(MSR_IA32_APERF, aperf);
44 rdmsrl(MSR_IA32_MPERF, mperf);
46 this_cpu_write(cpu_samples.aperf, aperf);
47 this_cpu_write(cpu_samples.mperf, mperf);
50 #if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
52 * APERF/MPERF frequency ratio computation.
54 * The scheduler wants to do frequency invariant accounting and needs a <1
55 * ratio to account for the 'current' frequency, corresponding to
56 * freq_curr / freq_max.
58 * Since the frequency freq_curr on x86 is controlled by micro-controller and
59 * our P-state setting is little more than a request/hint, we need to observe
60 * the effective frequency 'BusyMHz', i.e. the average frequency over a time
61 * interval after discarding idle time. This is given by:
63 * BusyMHz = delta_APERF / delta_MPERF * freq_base
65 * where freq_base is the max non-turbo P-state.
67 * The freq_max term has to be set to a somewhat arbitrary value, because we
68 * can't know which turbo states will be available at a given point in time:
69 * it all depends on the thermal headroom of the entire package. We set it to
70 * the turbo level with 4 cores active.
72 * Benchmarks show that's a good compromise between the 1C turbo ratio
73 * (freq_curr/freq_max would rarely reach 1) and something close to freq_base,
74 * which would ignore the entire turbo range (a conspicuous part, making
75 * freq_curr/freq_max always maxed out).
77 * An exception to the heuristic above is the Atom uarch, where we choose the
78 * highest turbo level for freq_max since Atom's are generally oriented towards
81 * Setting freq_max to anything less than the 1C turbo ratio makes the ratio
82 * freq_curr / freq_max to eventually grow >1, in which case we clip it to 1.
85 DEFINE_STATIC_KEY_FALSE(arch_scale_freq_key);
87 static u64 arch_turbo_freq_ratio = SCHED_CAPACITY_SCALE;
88 static u64 arch_max_freq_ratio = SCHED_CAPACITY_SCALE;
90 void arch_set_max_freq_ratio(bool turbo_disabled)
92 arch_max_freq_ratio = turbo_disabled ? SCHED_CAPACITY_SCALE :
93 arch_turbo_freq_ratio;
95 EXPORT_SYMBOL_GPL(arch_set_max_freq_ratio);
97 static bool __init turbo_disabled(void)
102 err = rdmsrl_safe(MSR_IA32_MISC_ENABLE, &misc_en);
106 return (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
109 static bool __init slv_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
113 err = rdmsrl_safe(MSR_ATOM_CORE_RATIOS, base_freq);
117 err = rdmsrl_safe(MSR_ATOM_CORE_TURBO_RATIOS, turbo_freq);
121 *base_freq = (*base_freq >> 16) & 0x3F; /* max P state */
122 *turbo_freq = *turbo_freq & 0x3F; /* 1C turbo */
127 #define X86_MATCH(model) \
128 X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, \
129 INTEL_FAM6_##model, X86_FEATURE_APERFMPERF, NULL)
131 static const struct x86_cpu_id has_knl_turbo_ratio_limits[] __initconst = {
132 X86_MATCH(XEON_PHI_KNL),
133 X86_MATCH(XEON_PHI_KNM),
137 static const struct x86_cpu_id has_skx_turbo_ratio_limits[] __initconst = {
138 X86_MATCH(SKYLAKE_X),
142 static const struct x86_cpu_id has_glm_turbo_ratio_limits[] __initconst = {
143 X86_MATCH(ATOM_GOLDMONT),
144 X86_MATCH(ATOM_GOLDMONT_D),
145 X86_MATCH(ATOM_GOLDMONT_PLUS),
149 static bool __init knl_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq,
150 int num_delta_fratio)
152 int fratio, delta_fratio, found;
156 err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
160 *base_freq = (*base_freq >> 8) & 0xFF; /* max P state */
162 err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr);
166 fratio = (msr >> 8) & 0xFF;
170 if (found >= num_delta_fratio) {
171 *turbo_freq = fratio;
175 delta_fratio = (msr >> (i + 5)) & 0x7;
179 fratio -= delta_fratio;
188 static bool __init skx_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, int size)
194 err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
198 *base_freq = (*base_freq >> 8) & 0xFF; /* max P state */
200 err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &ratios);
204 err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT1, &counts);
208 for (i = 0; i < 64; i += 8) {
209 group_size = (counts >> i) & 0xFF;
210 if (group_size >= size) {
211 *turbo_freq = (ratios >> i) & 0xFF;
219 static bool __init core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
224 err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
228 err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr);
232 *base_freq = (*base_freq >> 8) & 0xFF; /* max P state */
233 *turbo_freq = (msr >> 24) & 0xFF; /* 4C turbo */
235 /* The CPU may have less than 4 cores */
237 *turbo_freq = msr & 0xFF; /* 1C turbo */
242 static bool __init intel_set_max_freq_ratio(void)
244 u64 base_freq, turbo_freq;
247 if (slv_set_max_freq_ratio(&base_freq, &turbo_freq))
250 if (x86_match_cpu(has_glm_turbo_ratio_limits) &&
251 skx_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
254 if (x86_match_cpu(has_knl_turbo_ratio_limits) &&
255 knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
258 if (x86_match_cpu(has_skx_turbo_ratio_limits) &&
259 skx_set_max_freq_ratio(&base_freq, &turbo_freq, 4))
262 if (core_set_max_freq_ratio(&base_freq, &turbo_freq))
269 * Some hypervisors advertise X86_FEATURE_APERFMPERF
270 * but then fill all MSR's with zeroes.
271 * Some CPUs have turbo boost but don't declare any turbo ratio
272 * in MSR_TURBO_RATIO_LIMIT.
274 if (!base_freq || !turbo_freq) {
275 pr_debug("Couldn't determine cpu base or turbo frequency, necessary for scale-invariant accounting.\n");
279 turbo_ratio = div_u64(turbo_freq * SCHED_CAPACITY_SCALE, base_freq);
281 pr_debug("Non-zero turbo and base frequencies led to a 0 ratio.\n");
285 arch_turbo_freq_ratio = turbo_ratio;
286 arch_set_max_freq_ratio(turbo_disabled());
291 #ifdef CONFIG_PM_SLEEP
292 static struct syscore_ops freq_invariance_syscore_ops = {
293 .resume = init_counter_refs,
296 static void register_freq_invariance_syscore_ops(void)
298 register_syscore_ops(&freq_invariance_syscore_ops);
301 static inline void register_freq_invariance_syscore_ops(void) {}
304 static void freq_invariance_enable(void)
306 if (static_branch_unlikely(&arch_scale_freq_key)) {
310 static_branch_enable(&arch_scale_freq_key);
311 register_freq_invariance_syscore_ops();
312 pr_info("Estimated ratio of average max frequency by base frequency (times 1024): %llu\n", arch_max_freq_ratio);
315 void freq_invariance_set_perf_ratio(u64 ratio, bool turbo_disabled)
317 arch_turbo_freq_ratio = ratio;
318 arch_set_max_freq_ratio(turbo_disabled);
319 freq_invariance_enable();
322 static void __init bp_init_freq_invariance(void)
324 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
327 if (intel_set_max_freq_ratio())
328 freq_invariance_enable();
331 static void disable_freq_invariance_workfn(struct work_struct *work)
333 static_branch_disable(&arch_scale_freq_key);
336 static DECLARE_WORK(disable_freq_invariance_work,
337 disable_freq_invariance_workfn);
339 DEFINE_PER_CPU(unsigned long, arch_freq_scale) = SCHED_CAPACITY_SCALE;
341 static void scale_freq_tick(u64 acnt, u64 mcnt)
345 if (!arch_scale_freq_invariant())
348 if (check_shl_overflow(acnt, 2*SCHED_CAPACITY_SHIFT, &acnt))
351 if (check_mul_overflow(mcnt, arch_max_freq_ratio, &mcnt) || !mcnt)
354 freq_scale = div64_u64(acnt, mcnt);
358 if (freq_scale > SCHED_CAPACITY_SCALE)
359 freq_scale = SCHED_CAPACITY_SCALE;
361 this_cpu_write(arch_freq_scale, freq_scale);
365 pr_warn("Scheduler frequency invariance went wobbly, disabling!\n");
366 schedule_work(&disable_freq_invariance_work);
369 static inline void bp_init_freq_invariance(void) { }
370 static inline void scale_freq_tick(u64 acnt, u64 mcnt) { }
371 #endif /* CONFIG_X86_64 && CONFIG_SMP */
373 void arch_scale_freq_tick(void)
375 struct aperfmperf *s = this_cpu_ptr(&cpu_samples);
376 u64 acnt, mcnt, aperf, mperf;
378 if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF))
381 rdmsrl(MSR_IA32_APERF, aperf);
382 rdmsrl(MSR_IA32_MPERF, mperf);
383 acnt = aperf - s->aperf;
384 mcnt = mperf - s->mperf;
389 raw_write_seqcount_begin(&s->seq);
390 s->last_update = jiffies;
393 raw_write_seqcount_end(&s->seq);
395 scale_freq_tick(acnt, mcnt);
399 * Discard samples older than the define maximum sample age of 20ms. There
400 * is no point in sending IPIs in such a case. If the scheduler tick was
401 * not running then the CPU is either idle or isolated.
403 #define MAX_SAMPLE_AGE ((unsigned long)HZ / 50)
405 unsigned int arch_freq_get_on_cpu(int cpu)
407 struct aperfmperf *s = per_cpu_ptr(&cpu_samples, cpu);
408 unsigned int seq, freq;
412 if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF))
416 seq = raw_read_seqcount_begin(&s->seq);
417 last = s->last_update;
420 } while (read_seqcount_retry(&s->seq, seq));
423 * Bail on invalid count and when the last update was too long ago,
424 * which covers idle and NOHZ full CPUs.
426 if (!mcnt || (jiffies - last) > MAX_SAMPLE_AGE)
429 return div64_u64((cpu_khz * acnt), mcnt);
432 freq = cpufreq_quick_get(cpu);
433 return freq ? freq : cpu_khz;
436 static int __init bp_init_aperfmperf(void)
438 if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF))
442 bp_init_freq_invariance();
445 early_initcall(bp_init_aperfmperf);
447 void ap_init_aperfmperf(void)
449 if (cpu_feature_enabled(X86_FEATURE_APERFMPERF))