1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_SEGMENT_H
3 #define _ASM_X86_SEGMENT_H
5 #include <linux/const.h>
6 #include <asm/alternative.h>
9 * Constructor for a conventional segment GDT (or LDT) entry.
10 * This is a macro so it can be used in initializers.
12 #define GDT_ENTRY(flags, base, limit) \
13 ((((base) & _AC(0xff000000,ULL)) << (56-24)) | \
14 (((flags) & _AC(0x0000f0ff,ULL)) << 40) | \
15 (((limit) & _AC(0x000f0000,ULL)) << (48-16)) | \
16 (((base) & _AC(0x00ffffff,ULL)) << 16) | \
17 (((limit) & _AC(0x0000ffff,ULL))))
19 /* Simple and small GDT entries for booting only: */
21 #define GDT_ENTRY_BOOT_CS 2
22 #define GDT_ENTRY_BOOT_DS 3
23 #define GDT_ENTRY_BOOT_TSS 4
24 #define __BOOT_CS (GDT_ENTRY_BOOT_CS*8)
25 #define __BOOT_DS (GDT_ENTRY_BOOT_DS*8)
26 #define __BOOT_TSS (GDT_ENTRY_BOOT_TSS*8)
29 * Bottom two bits of selector give the ring
32 #define SEGMENT_RPL_MASK 0x3
35 * When running on Xen PV, the actual privilege level of the kernel is 1,
36 * not 0. Testing the Requested Privilege Level in a segment selector to
37 * determine whether the context is user mode or kernel mode with
38 * SEGMENT_RPL_MASK is wrong because the PV kernel's privilege level
39 * matches the 0x3 mask.
41 * Testing with USER_SEGMENT_RPL_MASK is valid for both native and Xen PV
42 * kernels because privilege level 2 is never used.
44 #define USER_SEGMENT_RPL_MASK 0x2
46 /* User mode is privilege level 3: */
49 /* Bit 2 is Table Indicator (TI): selects between LDT or GDT */
50 #define SEGMENT_TI_MASK 0x4
51 /* LDT segment has TI set ... */
52 #define SEGMENT_LDT 0x4
53 /* ... GDT has it cleared */
54 #define SEGMENT_GDT 0x0
56 #define GDT_ENTRY_INVALID_SEG 0
60 * The layout of the per-CPU GDT under Linux:
62 * 0 - null <=== cacheline #1
67 * 4 - unused <=== cacheline #2
70 * ------- start of TLS (Thread-Local Storage) segments:
72 * 6 - TLS segment #1 [ glibc's TLS segment ]
73 * 7 - TLS segment #2 [ Wine's %fs Win32 segment ]
74 * 8 - TLS segment #3 <=== cacheline #3
79 * ------- start of kernel segments:
81 * 12 - kernel code segment <=== cacheline #4
82 * 13 - kernel data segment
83 * 14 - default user CS
84 * 15 - default user DS
85 * 16 - TSS <=== cacheline #5
87 * 18 - PNPBIOS support (16->32 gate)
88 * 19 - PNPBIOS support
89 * 20 - PNPBIOS support <=== cacheline #6
90 * 21 - PNPBIOS support
91 * 22 - PNPBIOS support
92 * 23 - APM BIOS support
93 * 24 - APM BIOS support <=== cacheline #7
94 * 25 - APM BIOS support
96 * 26 - ESPFIX small SS
97 * 27 - per-cpu [ offset to per-cpu data area ]
101 * 31 - TSS for double fault handler
103 #define GDT_ENTRY_TLS_MIN 6
104 #define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
106 #define GDT_ENTRY_KERNEL_CS 12
107 #define GDT_ENTRY_KERNEL_DS 13
108 #define GDT_ENTRY_DEFAULT_USER_CS 14
109 #define GDT_ENTRY_DEFAULT_USER_DS 15
110 #define GDT_ENTRY_TSS 16
111 #define GDT_ENTRY_LDT 17
112 #define GDT_ENTRY_PNPBIOS_CS32 18
113 #define GDT_ENTRY_PNPBIOS_CS16 19
114 #define GDT_ENTRY_PNPBIOS_DS 20
115 #define GDT_ENTRY_PNPBIOS_TS1 21
116 #define GDT_ENTRY_PNPBIOS_TS2 22
117 #define GDT_ENTRY_APMBIOS_BASE 23
119 #define GDT_ENTRY_ESPFIX_SS 26
120 #define GDT_ENTRY_PERCPU 27
122 #define GDT_ENTRY_DOUBLEFAULT_TSS 31
125 * Number of entries in the GDT table:
127 #define GDT_ENTRIES 32
130 * Segment selector values corresponding to the above entries:
133 #define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
134 #define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
135 #define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
136 #define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
137 #define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS*8)
139 /* segment for calling fn: */
140 #define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32*8)
141 /* code segment for BIOS: */
142 #define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16*8)
144 /* "Is this PNP code selector (PNP_CS32 or PNP_CS16)?" */
145 #define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == PNP_CS32)
147 /* data segment for BIOS: */
148 #define PNP_DS (GDT_ENTRY_PNPBIOS_DS*8)
149 /* transfer data segment: */
150 #define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1*8)
151 /* another data segment: */
152 #define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2*8)
155 # define __KERNEL_PERCPU (GDT_ENTRY_PERCPU*8)
157 # define __KERNEL_PERCPU 0
162 #include <asm/cache.h>
164 #define GDT_ENTRY_KERNEL32_CS 1
165 #define GDT_ENTRY_KERNEL_CS 2
166 #define GDT_ENTRY_KERNEL_DS 3
169 * We cannot use the same code segment descriptor for user and kernel mode,
170 * not even in long flat mode, because of different DPL.
172 * GDT layout to get 64-bit SYSCALL/SYSRET support right. SYSRET hardcodes
175 * if returning to 32-bit userspace: cs = STAR.SYSRET_CS,
176 * if returning to 64-bit userspace: cs = STAR.SYSRET_CS+16,
178 * ss = STAR.SYSRET_CS+8 (in either case)
180 * thus USER_DS should be between 32-bit and 64-bit code selectors:
182 #define GDT_ENTRY_DEFAULT_USER32_CS 4
183 #define GDT_ENTRY_DEFAULT_USER_DS 5
184 #define GDT_ENTRY_DEFAULT_USER_CS 6
186 /* Needs two entries */
187 #define GDT_ENTRY_TSS 8
188 /* Needs two entries */
189 #define GDT_ENTRY_LDT 10
191 #define GDT_ENTRY_TLS_MIN 12
192 #define GDT_ENTRY_TLS_MAX 14
194 #define GDT_ENTRY_CPUNODE 15
197 * Number of entries in the GDT table:
199 #define GDT_ENTRIES 16
202 * Segment selector values corresponding to the above entries:
204 * Note, selectors also need to have a correct RPL,
205 * expressed with the +3 value for user-space selectors:
207 #define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS*8)
208 #define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
209 #define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
210 #define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS*8 + 3)
211 #define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
212 #define __USER32_DS __USER_DS
213 #define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
214 #define __CPUNODE_SEG (GDT_ENTRY_CPUNODE*8 + 3)
218 #define IDT_ENTRIES 256
219 #define NUM_EXCEPTION_VECTORS 32
221 /* Bitmask of exception vectors which push an error code on the stack: */
222 #define EXCEPTION_ERRCODE_MASK 0x20027d00
224 #define GDT_SIZE (GDT_ENTRIES*8)
225 #define GDT_ENTRY_TLS_ENTRIES 3
226 #define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES* 8)
230 /* Bit size and mask of CPU number stored in the per CPU data (and TSC_AUX) */
231 #define VDSO_CPUNODE_BITS 12
232 #define VDSO_CPUNODE_MASK 0xfff
236 /* Helper functions to store/load CPU and node numbers */
238 static inline unsigned long vdso_encode_cpunode(int cpu, unsigned long node)
240 return (node << VDSO_CPUNODE_BITS) | cpu;
243 static inline void vdso_read_cpunode(unsigned *cpu, unsigned *node)
248 * Load CPU and node number from the GDT. LSL is faster than RDTSCP
249 * and works on all CPUs. This is volatile so that it orders
250 * correctly with respect to barrier() and to keep GCC from cleverly
251 * hoisting it out of the calling function.
253 * If RDPID is available, use it.
255 alternative_io ("lsl %[seg],%[p]",
256 ".byte 0xf3,0x0f,0xc7,0xf8", /* RDPID %eax/rax */
258 [p] "=a" (p), [seg] "r" (__CPUNODE_SEG));
261 *cpu = (p & VDSO_CPUNODE_MASK);
263 *node = (p >> VDSO_CPUNODE_BITS);
266 #endif /* !__ASSEMBLY__ */
267 #endif /* CONFIG_X86_64 */
272 * early_idt_handler_array is an array of entry points referenced in the
273 * early IDT. For simplicity, it's a real array with one entry point
274 * every nine bytes. That leaves room for an optional 'push $0' if the
275 * vector has no error code (two bytes), a 'push $vector_number' (two
276 * bytes), and a jump to the common entry code (up to five bytes).
278 #define EARLY_IDT_HANDLER_SIZE 9
281 * xen_early_idt_handler_array is for Xen pv guests: for each entry in
282 * early_idt_handler_array it contains a prequel in the form of
283 * pop %rcx; pop %r11; jmp early_idt_handler_array[i]; summing up to
286 #define XEN_EARLY_IDT_HANDLER_SIZE 8
290 extern const char early_idt_handler_array[NUM_EXCEPTION_VECTORS][EARLY_IDT_HANDLER_SIZE];
291 extern void early_ignore_irq(void);
294 extern const char xen_early_idt_handler_array[NUM_EXCEPTION_VECTORS][XEN_EARLY_IDT_HANDLER_SIZE];
298 * Load a segment. Fall back on loading the zero segment if something goes
299 * wrong. This variant assumes that loading zero fully clears the segment.
300 * This is always the case on Intel CPUs and, even on 64-bit AMD CPUs, any
301 * failure to fully clear the cached descriptor is only observable for
304 #define __loadsegment_simple(seg, value) \
306 unsigned short __val = (value); \
309 "1: movl %k0,%%" #seg " \n" \
311 ".section .fixup,\"ax\" \n" \
312 "2: xorl %k0,%k0 \n" \
316 _ASM_EXTABLE(1b, 2b) \
318 : "+r" (__val) : : "memory"); \
321 #define __loadsegment_ss(value) __loadsegment_simple(ss, (value))
322 #define __loadsegment_ds(value) __loadsegment_simple(ds, (value))
323 #define __loadsegment_es(value) __loadsegment_simple(es, (value))
328 * On 32-bit systems, the hidden parts of FS and GS are unobservable if
329 * the selector is NULL, so there's no funny business here.
331 #define __loadsegment_fs(value) __loadsegment_simple(fs, (value))
332 #define __loadsegment_gs(value) __loadsegment_simple(gs, (value))
336 static inline void __loadsegment_fs(unsigned short value)
339 "1: movw %0, %%fs \n"
342 _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_CLEAR_FS)
344 : : "rm" (value) : "memory");
347 /* __loadsegment_gs is intentionally undefined. Use load_gs_index instead. */
351 #define loadsegment(seg, value) __loadsegment_ ## seg (value)
354 * Save a segment register away:
356 #define savesegment(seg, value) \
357 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
360 * x86-32 user GS accessors. This is ugly and could do with some cleaning up.
363 # define get_user_gs(regs) (u16)({ unsigned long v; savesegment(gs, v); v; })
364 # define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
365 # define task_user_gs(tsk) ((tsk)->thread.gs)
366 # define lazy_save_gs(v) savesegment(gs, (v))
367 # define lazy_load_gs(v) loadsegment(gs, (v))
368 # define load_gs_index(v) loadsegment(gs, (v))
371 #endif /* !__ASSEMBLY__ */
372 #endif /* __KERNEL__ */
374 #endif /* _ASM_X86_SEGMENT_H */